From: Ian Lance Taylor <iant@google.com>
To: Revital Eres <revital.eres@linaro.org>
Cc: gcc@gcc.gnu.org
Subject: Re: A question about sched_analyze_insn in sched-deps.c
Date: Wed, 10 Aug 2011 15:57:00 -0000 [thread overview]
Message-ID: <mcrk4algszd.fsf@coign.corp.google.com> (raw)
In-Reply-To: <CAHz1=dUzgAzbpxGSw1W_Yc1km6YCxj0dahOwOp5VYu3RJ7kNsA@mail.gmail.com> (Revital Eres's message of "Wed, 10 Aug 2011 17:24:57 +0300")
Revital Eres <revital.eres@linaro.org> writes:
> I appriciate explanation regarding the following piece of code in
> sched_analyze_insn function (sched-deps.c): When handling jump instruction
> dependence edges are created between the jump instruction and memory
> writes and volatile reads and I'm not quite sure the reason why.
Jump instructions can be conditional. Note the check for whether the
next instruction is a barrier.
Ian
next prev parent reply other threads:[~2011-08-10 15:57 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-10 14:25 Revital Eres
2011-08-10 15:57 ` Ian Lance Taylor [this message]
2011-08-11 6:37 ` Revital Eres
2011-08-16 0:39 ` Ayal Zaks
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