From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 29457 invoked by alias); 17 Mar 2010 18:10:39 -0000 Received: (qmail 29447 invoked by uid 22791); 17 Mar 2010 18:10:38 -0000 X-SWARE-Spam-Status: No, hits=-2.6 required=5.0 tests=BAYES_00,SPF_HELO_PASS X-Spam-Check-By: sourceware.org Received: from smtp-out.google.com (HELO smtp-out.google.com) (74.125.121.35) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 17 Mar 2010 18:10:34 +0000 Received: from kpbe18.cbf.corp.google.com (kpbe18.cbf.corp.google.com [172.25.105.82]) by smtp-out.google.com with ESMTP id o2HIAVK9007573 for ; Wed, 17 Mar 2010 19:10:31 +0100 Received: from fxm22 (fxm22.prod.google.com [10.184.13.22]) by kpbe18.cbf.corp.google.com with ESMTP id o2HIASof025382 for ; Wed, 17 Mar 2010 11:10:30 -0700 Received: by fxm22 with SMTP id 22so1341921fxm.14 for ; Wed, 17 Mar 2010 11:10:27 -0700 (PDT) Received: by 10.223.64.205 with SMTP id f13mr7842368fai.98.1268849427552; Wed, 17 Mar 2010 11:10:27 -0700 (PDT) Received: from coign.google.com (dhcp-172-19-44-247.mtv.corp.google.com [172.19.44.247]) by mx.google.com with ESMTPS id 14sm1415072fxm.5.2010.03.17.11.10.25 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 17 Mar 2010 11:10:26 -0700 (PDT) To: redriver jiang Cc: gcc@gcc.gnu.org Subject: Re: Is it possible to port GCC backend to a architecture with very limited hard registers? References: <714984df1003170555m6d38cf46y2b916f52ef6fa3f0@mail.gmail.com> From: Ian Lance Taylor Date: Wed, 17 Mar 2010 18:31:00 -0000 In-Reply-To: <714984df1003170555m6d38cf46y2b916f52ef6fa3f0@mail.gmail.com> (redriver jiang's message of "Wed\, 17 Mar 2010 20\:55\:37 +0800") Message-ID: User-Agent: Gnus/5.11 (Gnus v5.11) Emacs/22.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-System-Of-Record: true X-IsSubscribed: yes Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org X-SW-Source: 2010-03/txt/msg00232.txt.bz2 redriver jiang writes: > Right now I attempts to port the GCC backend to a MCU with very > limited hard registers: only one 8 bit ACC reg, one 16 bit base reg > for addressing, one stats reg. > I searched the GCC backend porting, and seems 68HC1X has the similar > scene, but it use many "ram simulated" register. I wonder that if it > is possbile to provided thislimited 3 register to GCC bankend, and let > all 16bit(HImode), 32bit(SImode) operands spilled to stack. It should be possible, though it owuld not be easy to resolve all the reload issues. gcc will not generate particularly good code for such a processor; you will see an awful lot of register shuffling. Ian