From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stan Cox <scox@cygnus.com>
To: egcs@cygnus.com
Subject: Re: Optimizations
Date: Tue, 23 Dec 1997 07:51:00 -0000
Message-id: <nr3ejknjmj.fsf@rtl.cygnus.com>
References: <199712142230.RAA10693@tweedledumb.cygnus.com> <19971216000653.24186.cygnus.egcs@cerebro.laendle>
X-SW-Source: 1997-12/msg01097.html

>I never saw benchmark data (except mine) that said 4 byte is better then
>zero byte alignment (and intel itself recommends 0 on pentiums).

gas and the svr4 assembler have pseudoops that say align to X bytes if it takes no
more than Y bytes to do so.  We used this in the DG/UX configuration
after doing quite a bit of benchmark analysis.
--