Hi.

Attached is the patch that allows to save dependence info obtained on tree  
level by data-reference analysis for usage on RTL level (for RTL memory  
disambiguation and dependence graph construction for modulo scheduling).   
It helps for RTL disambiguation on platforms without base+offset memory  
addressing modes, and impact on SMS is described below.  We would like to  
see it in 4.4 mainline.

We have tested this patch with modulo scheduling on ia64, using SPEC  
CPU2000 benchmark suite.  It allows to apply software pipelining to more  
loops, resulting in ~1-2% speedup (compared to SMS without exported  
info).  The most frequent improvements are removal of cross-iteration  
memory dependencies, as currently SMS adds such dependencies for all pair  
of memory references, even in cases when they cannot alias (for example,  
for different arrays or different fields of a struct).  As I understand,  
SMS does not use RTL alias analysis here because pairs that do not alias  
within one iteration, but may alias when cross-iteration movement is  
performed (like a[i] and a[i+1]), should be marked as dependent.  So, SMS  
data dependence analysis can be greatly improved even without  
data-dependence export patch by using RTL-like memory disambiguation, but  
without pointer arithmetic analysis.

There are currently two miscompiled SPEC tests with this patch; in one of  
them, the problem is related to generation of register moves in the  
prologue of software pipelined loop (which was not pipelined without the  
patch).  The problem is reported and discussed with Revital Eres from IBM  
Haifa.

We would like to ask people interested in SMS performance on PowerPC and  
Cell SPU to conduct tests with this patch.  Any feedback is greatly  
appreciated.

Thanks.

--
Alexander Monakov