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From: Stafford Horne <shorne@sourceware.org>
To: gdb-cvs@sourceware.org
Subject: [binutils-gdb] sim/common: wire up new unordered comparisons
Date: Thu, 13 Jun 2019 12:28:00 -0000	[thread overview]
Message-ID: <20190613122800.88655.qmail@sourceware.org> (raw)

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=f1cc84f59441d59827748e47a5971a12ed1ac283

commit f1cc84f59441d59827748e47a5971a12ed1ac283
Author: Stafford Horne <shorne@gmail.com>
Date:   Thu Jun 13 21:27:10 2019 +0900

    sim/common: wire up new unordered comparisons
    
    Define and wire up unordered floating point comparison operations for cgen
    targets.  This patch depends on my posted cgen patches[0].
    
    [0] https://www.sourceware.org/ml/cgen/2019-q2/msg00013.html
    
    sim/common/ChangeLog:
    
    yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>
    
    	* cgen-accfp.c (unorderedsf, unordereddf): New functions.
    	(cgen_init_accurate_fpu): Wire up unorderedsf and unordereddf.
    	* cgen-fpu.h (cgen_fp_ops): Define fields unorderedsf and unordereddf.

Diff:
---
 sim/common/ChangeLog    |  6 ++++++
 sim/common/cgen-accfp.c | 25 +++++++++++++++++++++++++
 sim/common/cgen-fpu.h   |  2 ++
 3 files changed, 33 insertions(+)

diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog
index 7b0e617..b84980b 100644
--- a/sim/common/ChangeLog
+++ b/sim/common/ChangeLog
@@ -1,5 +1,11 @@
 2019-06-13  Stafford Horne  <shorne@gmail.com>
 
+	* cgen-accfp.c (unorderedsf, unordereddf): New functions.
+	(cgen_init_accurate_fpu): Wire up unorderedsf and unordereddf.
+	* cgen-fpu.h (cgen_fp_ops): Define fields unorderedsf and unordereddf.
+
+2019-06-13  Stafford Horne  <shorne@gmail.com>
+
 	* cgen-accfp.c (floatdidf, fixdfdi): New functions.
 	(cgen_init_accurate_fpu): Add floatdidf and fixdfdi.
 
diff --git a/sim/common/cgen-accfp.c b/sim/common/cgen-accfp.c
index 51f5a29..b898de3 100644
--- a/sim/common/cgen-accfp.c
+++ b/sim/common/cgen-accfp.c
@@ -303,6 +303,18 @@ gesf (CGEN_FPU* fpu, SF x, SF y)
   return sim_fpu_is_ge (&op1, &op2);
 }
 
+static int
+unorderedsf (CGEN_FPU* fpu, SF x, SF y)
+{
+  sim_fpu op1;
+  sim_fpu op2;
+
+  sim_fpu_32to (&op1, x);
+  sim_fpu_32to (&op2, y);
+  return sim_fpu_is_nan (&op1) || sim_fpu_is_nan (&op2);
+}
+
+
 static DF
 fextsfdf (CGEN_FPU* fpu, int how UNUSED, SF x)
 {
@@ -703,6 +715,17 @@ gedf (CGEN_FPU* fpu, DF x, DF y)
   sim_fpu_64to (&op2, y);
   return sim_fpu_is_ge (&op1, &op2);
 }
+
+static int
+unordereddf (CGEN_FPU* fpu, DF x, DF y)
+{
+  sim_fpu op1;
+  sim_fpu op2;
+
+  sim_fpu_64to (&op1, x);
+  sim_fpu_64to (&op2, y);
+  return sim_fpu_is_nan (&op1) || sim_fpu_is_nan (&op2);
+}
 \f
 /* Initialize FP_OPS to use accurate library.  */
 
@@ -738,6 +761,7 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error)
   o->lesf = lesf;
   o->gtsf = gtsf;
   o->gesf = gesf;
+  o->unorderedsf = unorderedsf;
 
   o->adddf = adddf;
   o->subdf = subdf;
@@ -757,6 +781,7 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error)
   o->ledf = ledf;
   o->gtdf = gtdf;
   o->gedf = gedf;
+  o->unordereddf = unordereddf;
   o->fextsfdf = fextsfdf;
   o->ftruncdfsf = ftruncdfsf;
   o->floatsisf = floatsisf;
diff --git a/sim/common/cgen-fpu.h b/sim/common/cgen-fpu.h
index 5f9b55d..cc5d356 100644
--- a/sim/common/cgen-fpu.h
+++ b/sim/common/cgen-fpu.h
@@ -87,6 +87,7 @@ struct cgen_fp_ops {
   int (*lesf) (CGEN_FPU*, SF, SF);
   int (*gtsf) (CGEN_FPU*, SF, SF);
   int (*gesf) (CGEN_FPU*, SF, SF);
+  int (*unorderedsf) (CGEN_FPU*, SF, SF);
 
   /* basic DF ops */
 
@@ -112,6 +113,7 @@ struct cgen_fp_ops {
   int (*ledf) (CGEN_FPU*, DF, DF);
   int (*gtdf) (CGEN_FPU*, DF, DF);
   int (*gedf) (CGEN_FPU*, DF, DF);
+  int (*unordereddf) (CGEN_FPU*, DF, DF);
 
   /* SF/DF conversion ops */


                 reply	other threads:[~2019-06-13 12:28 UTC|newest]

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