From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1936) id 3E81B385801E; Tue, 3 May 2022 23:10:28 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3E81B385801E Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: John Baldwin To: gdb-cvs@sourceware.org Subject: [binutils-gdb] Add an arm-tls feature which includes the tpidruro register from CP15. X-Act-Checkin: binutils-gdb X-Git-Author: John Baldwin X-Git-Refname: refs/heads/master X-Git-Oldrev: 40c23d880386d6e8202567eaa2a6b041feb1a652 X-Git-Newrev: 92d48a1e4eac54db11f1a110328672394fce2853 Message-Id: <20220503231028.3E81B385801E@sourceware.org> Date: Tue, 3 May 2022 23:10:28 +0000 (GMT) X-BeenThere: gdb-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 03 May 2022 23:10:28 -0000 https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D92d48a1e4eac= 54db11f1a110328672394fce2853 commit 92d48a1e4eac54db11f1a110328672394fce2853 Author: John Baldwin Date: Tue May 3 16:05:10 2022 -0700 Add an arm-tls feature which includes the tpidruro register from CP15. Diff: --- gdb/arch/aarch32.c | 2 ++ gdb/arch/arm.c | 6 +++++- gdb/arch/arm.h | 2 +- gdb/arm-fbsd-tdep.c | 4 ++-- gdb/arm-linux-nat.c | 6 +++--- gdb/arm-linux-tdep.c | 4 ++-- gdb/arm-netbsd-nat.c | 4 ++-- gdb/arm-tdep.c | 25 ++++++++++++++++++++----- gdb/arm-tdep.h | 4 +++- gdb/features/Makefile | 1 + gdb/features/arm/arm-tls.c | 14 ++++++++++++++ gdb/features/arm/arm-tls.xml | 11 +++++++++++ 12 files changed, 66 insertions(+), 17 deletions(-) diff --git a/gdb/arch/aarch32.c b/gdb/arch/aarch32.c index 0c544d381f1..4d6ffb44a15 100644 --- a/gdb/arch/aarch32.c +++ b/gdb/arch/aarch32.c @@ -19,6 +19,7 @@ #include "aarch32.h" =20 #include "../features/arm/arm-core.c" +#include "../features/arm/arm-tls.c" #include "../features/arm/arm-vfpv3.c" =20 /* See aarch32.h. */ @@ -38,6 +39,7 @@ aarch32_create_target_description () /* Create a vfpv3 feature, then a blank NEON feature. */ regnum =3D create_feature_arm_arm_vfpv3 (tdesc.get (), regnum); tdesc_create_feature (tdesc.get (), "org.gnu.gdb.arm.neon"); + regnum =3D create_feature_arm_arm_tls (tdesc.get (), regnum); =20 return tdesc.release (); } diff --git a/gdb/arch/arm.c b/gdb/arch/arm.c index bc6e5ce3f09..14f0a7a7f6c 100644 --- a/gdb/arch/arm.c +++ b/gdb/arch/arm.c @@ -22,6 +22,7 @@ #include "arm.h" =20 #include "../features/arm/arm-core.c" +#include "../features/arm/arm-tls.c" #include "../features/arm/arm-vfpv2.c" #include "../features/arm/arm-vfpv3.c" #include "../features/arm/xscale-iwmmxt.c" @@ -374,7 +375,7 @@ shifted_reg_val (struct regcache *regcache, unsigned lo= ng inst, /* See arch/arm.h. */ =20 target_desc * -arm_create_target_description (arm_fp_type fp_type) +arm_create_target_description (arm_fp_type fp_type, bool tls) { target_desc_up tdesc =3D allocate_target_description (); =20 @@ -410,6 +411,9 @@ arm_create_target_description (arm_fp_type fp_type) error (_("Invalid Arm FP type: %d"), fp_type); } =20 + if (tls) + regnum =3D create_feature_arm_arm_tls (tdesc.get (), regnum); + return tdesc.release (); } =20 diff --git a/gdb/arch/arm.h b/gdb/arch/arm.h index 0728bea1501..4ad329f6f1f 100644 --- a/gdb/arch/arm.h +++ b/gdb/arch/arm.h @@ -207,7 +207,7 @@ unsigned long shifted_reg_val (struct regcache *regcach= e, =20 /* Create an Arm target description with the given FP hardware type. */ =20 -target_desc *arm_create_target_description (arm_fp_type fp_type); +target_desc *arm_create_target_description (arm_fp_type fp_type, bool tls); =20 /* Create an Arm M-profile target description with the given hardware type= . */ =20 diff --git a/gdb/arm-fbsd-tdep.c b/gdb/arm-fbsd-tdep.c index bf337b13f98..06745a36186 100644 --- a/gdb/arm-fbsd-tdep.c +++ b/gdb/arm-fbsd-tdep.c @@ -188,9 +188,9 @@ arm_fbsd_read_description_auxv (struct target_ops *targ= et) return aarch32_read_description (); else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPD32)) =3D=3D (HWCAP_VFPv3 | HWCAP_VFPD32)) - return arm_read_description (ARM_FP_TYPE_VFPV3); + return arm_read_description (ARM_FP_TYPE_VFPV3, false); else - return arm_read_description (ARM_FP_TYPE_VFPV2); + return arm_read_description (ARM_FP_TYPE_VFPV2, false); } =20 return nullptr; diff --git a/gdb/arm-linux-nat.c b/gdb/arm-linux-nat.c index f0f09acf2f9..2abaf5a675d 100644 --- a/gdb/arm-linux-nat.c +++ b/gdb/arm-linux-nat.c @@ -550,7 +550,7 @@ arm_linux_nat_target::read_description () } =20 if (arm_hwcap & HWCAP_IWMMXT) - return arm_read_description (ARM_FP_TYPE_IWMMXT); + return arm_read_description (ARM_FP_TYPE_IWMMXT, false); =20 if (arm_hwcap & HWCAP_VFP) { @@ -567,9 +567,9 @@ arm_linux_nat_target::read_description () if (arm_hwcap & HWCAP_NEON) return aarch32_read_description (); else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) =3D=3D HWCAP_V= FPv3) - return arm_read_description (ARM_FP_TYPE_VFPV3); + return arm_read_description (ARM_FP_TYPE_VFPV3, false); =20 - return arm_read_description (ARM_FP_TYPE_VFPV2); + return arm_read_description (ARM_FP_TYPE_VFPV2, false); } =20 return this->beneath ()->read_description (); diff --git a/gdb/arm-linux-tdep.c b/gdb/arm-linux-tdep.c index c8e882ab096..f299e9665d5 100644 --- a/gdb/arm-linux-tdep.c +++ b/gdb/arm-linux-tdep.c @@ -741,9 +741,9 @@ arm_linux_core_read_description (struct gdbarch *gdbarc= h, if (arm_hwcap & HWCAP_NEON) return aarch32_read_description (); else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) =3D=3D HWCAP_V= FPv3) - return arm_read_description (ARM_FP_TYPE_VFPV3); + return arm_read_description (ARM_FP_TYPE_VFPV3, false); =20 - return arm_read_description (ARM_FP_TYPE_VFPV2); + return arm_read_description (ARM_FP_TYPE_VFPV2, false); } =20 return nullptr; diff --git a/gdb/arm-netbsd-nat.c b/gdb/arm-netbsd-nat.c index 591a0ab1d54..764bbe8cd3d 100644 --- a/gdb/arm-netbsd-nat.c +++ b/gdb/arm-netbsd-nat.c @@ -346,13 +346,13 @@ arm_netbsd_nat_target::read_description () =20 if (sysctlbyname("machdep.fpu_present", &flag, &len, NULL, 0) !=3D 0 || !flag) - return arm_read_description (ARM_FP_TYPE_NONE); + return arm_read_description (ARM_FP_TYPE_NONE, false); =20 len =3D sizeof(flag); if (sysctlbyname("machdep.neon_present", &flag, &len, NULL, 0) =3D=3D 0 = && flag) return aarch32_read_description (); =20 - return arm_read_description (ARM_FP_TYPE_VFPV3); + return arm_read_description (ARM_FP_TYPE_VFPV3, false); } =20 void _initialize_arm_netbsd_nat (); diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index aa5d8e6e6bd..49664093f00 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -240,7 +240,7 @@ static const char **valid_disassembly_styles; static const char *disassembly_style; =20 /* All possible arm target descriptors. */ -static struct target_desc *tdesc_arm_list[ARM_FP_TYPE_INVALID]; +static struct target_desc *tdesc_arm_list[ARM_FP_TYPE_INVALID][2]; static struct target_desc *tdesc_arm_mprofile_list[ARM_M_TYPE_INVALID]; =20 /* This is used to keep the bfd arch_info in sync with the disassembly @@ -9606,6 +9606,7 @@ arm_gdbarch_init (struct gdbarch_info info, struct gd= barch_list *arches) int m_profile_psp_ns_regnum =3D -1; int m_profile_msp_s_regnum =3D -1; int m_profile_psp_s_regnum =3D -1; + int tls_regnum =3D 0; =20 /* If we have an object to base this architecture on, try to determine its ABI. */ @@ -9973,6 +9974,19 @@ arm_gdbarch_init (struct gdbarch_info info, struct g= dbarch_list *arches) } } =20 + /* Check for the TLS register feature. */ + feature =3D tdesc_find_feature (tdesc, "org.gnu.gdb.arm.tls"); + if (feature !=3D nullptr) + { + valid_p &=3D tdesc_numbered_register (feature, tdesc_data.get (), + register_count, "tpidruro"); + if (!valid_p) + return nullptr; + + tls_regnum =3D register_count; + register_count++; + } + /* Check for MVE after all the checks for GPR's, VFP and Neon. MVE (Helium) is an M-profile extension. */ if (is_m) @@ -10128,6 +10142,7 @@ arm_gdbarch_init (struct gdbarch_info info, struct = gdbarch_list *arches) tdep->have_s_pseudos =3D have_s_pseudos; tdep->have_q_pseudos =3D have_q_pseudos; tdep->have_neon =3D have_neon; + tdep->tls_regnum =3D tls_regnum; =20 /* Adjust the MVE feature settings. */ if (have_mve) @@ -14416,14 +14431,14 @@ arm_process_record (struct gdbarch *gdbarch, stru= ct regcache *regcache, /* See arm-tdep.h. */ =20 const target_desc * -arm_read_description (arm_fp_type fp_type) +arm_read_description (arm_fp_type fp_type, bool tls) { - struct target_desc *tdesc =3D tdesc_arm_list[fp_type]; + struct target_desc *tdesc =3D tdesc_arm_list[fp_type][tls]; =20 if (tdesc =3D=3D nullptr) { - tdesc =3D arm_create_target_description (fp_type); - tdesc_arm_list[fp_type] =3D tdesc; + tdesc =3D arm_create_target_description (fp_type, tls); + tdesc_arm_list[fp_type][tls] =3D tdesc; } =20 return tdesc; diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h index 864406e98d2..0fc4774a20c 100644 --- a/gdb/arm-tdep.h +++ b/gdb/arm-tdep.h @@ -134,6 +134,8 @@ struct arm_gdbarch_tdep : gdbarch_tdep int m_profile_msp_s_regnum =3D ARM_SP_REGNUM; /* M-profile MSP_S registe= r number. */ int m_profile_psp_s_regnum =3D ARM_SP_REGNUM; /* M-profile PSP_S registe= r number. */ =20 + int tls_regnum =3D 0; /* Number of the tpidruro register. */ + bool is_m =3D false; /* Does the target follow the "M" profile. */ bool have_sec_ext =3D false; /* Do we have security extensions? */ CORE_ADDR lowest_pc =3D 0; /* Lowest address at which instructions @@ -317,7 +319,7 @@ extern void const struct regcache *regcache); =20 /* Get the correct Arm target description with given FP hardware type. */ -const target_desc *arm_read_description (arm_fp_type fp_type); +const target_desc *arm_read_description (arm_fp_type fp_type, bool tls); =20 /* Get the correct Arm M-Profile target description with given hardware type. */ diff --git a/gdb/features/Makefile b/gdb/features/Makefile index 737d9cbd3db..5f1826baa6f 100644 --- a/gdb/features/Makefile +++ b/gdb/features/Makefile @@ -208,6 +208,7 @@ FEATURE_XMLFILES =3D aarch64-core.xml \ arm/arm-m-profile-mve.xml \ arm/arm-m-system.xml \ arm/arm-m-profile-with-fpa.xml \ + arm/arm-tls.xml \ arm/arm-vfpv2.xml \ arm/arm-vfpv3.xml \ arm/xscale-iwmmxt.xml \ diff --git a/gdb/features/arm/arm-tls.c b/gdb/features/arm/arm-tls.c new file mode 100644 index 00000000000..d1214dda8ec --- /dev/null +++ b/gdb/features/arm/arm-tls.c @@ -0,0 +1,14 @@ +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: + Original: arm-tls.xml */ + +#include "gdbsupport/tdesc.h" + +static int +create_feature_arm_arm_tls (struct target_desc *result, long regnum) +{ + struct tdesc_feature *feature; + + feature =3D tdesc_create_feature (result, "org.gnu.gdb.arm.tls"); + tdesc_create_reg (feature, "tpidruro", regnum++, 1, NULL, 32, "data_ptr"= ); + return regnum; +} diff --git a/gdb/features/arm/arm-tls.xml b/gdb/features/arm/arm-tls.xml new file mode 100644 index 00000000000..3cdf73e776f --- /dev/null +++ b/gdb/features/arm/arm-tls.xml @@ -0,0 +1,11 @@ + + + + + + +