From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1936) id 9DE673858010; Tue, 3 May 2022 23:11:04 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9DE673858010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: John Baldwin To: gdb-cvs@sourceware.org Subject: [binutils-gdb] Fetch the NT_ARM_TLS register set for native FreeBSD/Aarch64 processes. X-Act-Checkin: binutils-gdb X-Git-Author: John Baldwin X-Git-Refname: refs/heads/master X-Git-Oldrev: f9fbb7636a5b67abae41a35f02ae70f58523d375 X-Git-Newrev: b7fe5463cf0dd6d7701d0be5ae129a9d4ecd28bc Message-Id: <20220503231104.9DE673858010@sourceware.org> Date: Tue, 3 May 2022 23:11:04 +0000 (GMT) X-BeenThere: gdb-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 03 May 2022 23:11:04 -0000 https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3Db7fe5463cf0d= d6d7701d0be5ae129a9d4ecd28bc commit b7fe5463cf0dd6d7701d0be5ae129a9d4ecd28bc Author: John Baldwin Date: Tue May 3 16:05:10 2022 -0700 Fetch the NT_ARM_TLS register set for native FreeBSD/Aarch64 processes. =20 This permits resolving TLS variables. Diff: --- gdb/aarch64-fbsd-nat.c | 54 ++++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 54 insertions(+) diff --git a/gdb/aarch64-fbsd-nat.c b/gdb/aarch64-fbsd-nat.c index 99e2bf35276..910bf5bb190 100644 --- a/gdb/aarch64-fbsd-nat.c +++ b/gdb/aarch64-fbsd-nat.c @@ -24,12 +24,15 @@ #include "target.h" #include "nat/aarch64-hw-point.h" =20 +#include "elf/common.h" + #include #include #include #include =20 #include "fbsd-nat.h" +#include "aarch64-tdep.h" #include "aarch64-fbsd-tdep.h" #include "aarch64-nat.h" #include "inf-ptrace.h" @@ -50,6 +53,8 @@ struct aarch64_fbsd_nat_target final : public fbsd_nat_ta= rget void fetch_registers (struct regcache *, int) override; void store_registers (struct regcache *, int) override; =20 + const struct target_desc *read_description () override; + #ifdef HAVE_DBREG /* Hardware breakpoints and watchpoints. */ bool stopped_by_watchpoint () override; @@ -84,6 +89,26 @@ aarch64_fbsd_nat_target::fetch_registers (struct regcach= e *regcache, &aarch64_fbsd_gregset); fetch_register_set (regcache, regnum, PT_GETFPREGS, &aarch64_fbsd_fpregset); + + gdbarch *gdbarch =3D regcache->arch (); + aarch64_gdbarch_tdep *tdep =3D (aarch64_gdbarch_tdep *) gdbarch_tdep (gd= barch); + if (tdep->has_tls ()) + { + const struct regcache_map_entry aarch64_fbsd_tls_regmap[] =3D + { + { 1, tdep->tls_regnum, 8 }, + { 0 } + }; + + const struct regset aarch64_fbsd_tls_regset =3D + { + aarch64_fbsd_tls_regmap, + regcache_supply_regset, regcache_collect_regset + }; + + fetch_regset (regcache, regnum, NT_ARM_TLS, + &aarch64_fbsd_tls_regset); + } } =20 /* Store register REGNUM back into the inferior. If REGNUM is -1, do @@ -97,6 +122,35 @@ aarch64_fbsd_nat_target::store_registers (struct regcac= he *regcache, &aarch64_fbsd_gregset); store_register_set (regcache, regnum, PT_GETFPREGS, PT_SETFPREGS, &aarch64_fbsd_fpregset); + + gdbarch *gdbarch =3D regcache->arch (); + aarch64_gdbarch_tdep *tdep =3D (aarch64_gdbarch_tdep *) gdbarch_tdep (gd= barch); + if (tdep->has_tls ()) + { + const struct regcache_map_entry aarch64_fbsd_tls_regmap[] =3D + { + { 1, tdep->tls_regnum, 8 }, + { 0 } + }; + + const struct regset aarch64_fbsd_tls_regset =3D + { + aarch64_fbsd_tls_regmap, + regcache_supply_regset, regcache_collect_regset + }; + + store_regset (regcache, regnum, NT_ARM_TLS, + &aarch64_fbsd_tls_regset); + } +} + +/* Implement the target read_description method. */ + +const struct target_desc * +aarch64_fbsd_nat_target::read_description () +{ + bool tls =3D have_regset (inferior_ptid, NT_ARM_TLS) !=3D 0; + return aarch64_read_description (0, false, false, tls); } =20 #ifdef HAVE_DBREG