From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2126) id 3E11F3857359; Thu, 2 Jun 2022 15:29:44 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3E11F3857359 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Tom Tromey To: gdb-cvs@sourceware.org Subject: [binutils-gdb] ODR warnings for "struct insn_info" X-Act-Checkin: binutils-gdb X-Git-Author: Tom Tromey X-Git-Refname: refs/heads/master X-Git-Oldrev: c8e41b5f14d38c4317b2d1b82974a48828f014f7 X-Git-Newrev: 131430937d0eac8a7143306b8d1afa1bc5762877 Message-Id: <20220602152944.3E11F3857359@sourceware.org> Date: Thu, 2 Jun 2022 15:29:44 +0000 (GMT) X-BeenThere: gdb-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 02 Jun 2022 15:29:44 -0000 https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D131430937d0e= ac8a7143306b8d1afa1bc5762877 commit 131430937d0eac8a7143306b8d1afa1bc5762877 Author: Tom Tromey Date: Wed May 18 10:08:43 2022 -0600 ODR warnings for "struct insn_info" =20 "struct insn_info" is defined in multiple .c files, causing ODR warnings. This patch renames the type in z80-tdep.c, leaving the other one alone. =20 Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=3D22395 Diff: --- gdb/z80-tdep.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/gdb/z80-tdep.c b/gdb/z80-tdep.c index 0b282237c4a..d27e567c358 100644 --- a/gdb/z80-tdep.c +++ b/gdb/z80-tdep.c @@ -139,7 +139,7 @@ enum z80_instruction_type insn_force_nop /* invalid opcode prefix */ }; =20 -struct insn_info +struct z80_insn_info { gdb_byte code; gdb_byte mask; @@ -149,7 +149,7 @@ struct insn_info =20 /* Constants */ =20 -static const struct insn_info * +static const struct z80_insn_info * z80_get_insn_info (struct gdbarch *gdbarch, const gdb_byte *buf, int *size= ); =20 static const char *z80_reg_names[] =3D @@ -776,7 +776,7 @@ z80_software_single_step (struct regcache *regcache) ULONGEST addr; int opcode; int size; - const struct insn_info *info; + const struct z80_insn_info *info; std::vector ret (1); struct gdbarch *gdbarch =3D target_gdbarch (); =20 @@ -1007,7 +1007,7 @@ z80_insn_is_call (struct gdbarch *gdbarch, CORE_ADDR = addr) { gdb_byte buf[8]; int size; - const struct insn_info *info; + const struct z80_insn_info *info; read_memory (addr, buf, sizeof(buf)); info =3D z80_get_insn_info (gdbarch, buf, &size); if (info) @@ -1027,7 +1027,7 @@ z80_insn_is_ret (struct gdbarch *gdbarch, CORE_ADDR a= ddr) { gdb_byte buf[8]; int size; - const struct insn_info *info; + const struct z80_insn_info *info; read_memory (addr, buf, sizeof(buf)); info =3D z80_get_insn_info (gdbarch, buf, &size); if (info) @@ -1046,7 +1046,7 @@ z80_insn_is_jump (struct gdbarch *gdbarch, CORE_ADDR = addr) { gdb_byte buf[8]; int size; - const struct insn_info *info; + const struct z80_insn_info *info; read_memory (addr, buf, sizeof(buf)); info =3D z80_get_insn_info (gdbarch, buf, &size); if (info) @@ -1190,7 +1190,7 @@ z80_gdbarch_init (struct gdbarch_info info, struct gd= barch_list *arches) } =20 /* Table to disassemble machine codes without prefix. */ -static const struct insn_info +static const struct z80_insn_info ez80_main_insn_table[] =3D { /* table with double prefix check */ { 0100, 0377, 0, insn_force_nop}, //double prefix @@ -1237,7 +1237,7 @@ ez80_main_insn_table[] =3D { 0000, 0000, 1, insn_default } //others } ; =20 -static const struct insn_info +static const struct z80_insn_info ez80_adl_main_insn_table[] =3D { /* table with double prefix check */ { 0100, 0377, 0, insn_force_nop}, //double prefix @@ -1286,7 +1286,7 @@ ez80_adl_main_insn_table[] =3D /* ED prefix opcodes table. Note the instruction length does include the ED prefix (+ 1 byte) */ -static const struct insn_info +static const struct z80_insn_info ez80_ed_insn_table[] =3D { /* eZ80 only instructions */ @@ -1306,7 +1306,7 @@ ez80_ed_insn_table[] =3D { 0000, 0000, 1, insn_default } }; =20 -static const struct insn_info +static const struct z80_insn_info ez80_adl_ed_insn_table[] =3D { { 0002, 0366, 2, insn_default }, //"lea rr,ii+d" @@ -1324,7 +1324,7 @@ ez80_adl_ed_insn_table[] =3D }; =20 /* table for FD and DD prefixed instructions */ -static const struct insn_info +static const struct z80_insn_info ez80_ddfd_insn_table[] =3D { /* ez80 only instructions */ @@ -1355,7 +1355,7 @@ ez80_ddfd_insn_table[] =3D { 0000, 0000, 0, insn_default } //not an instruction, exec DD/FD as NOP }; =20 -static const struct insn_info +static const struct z80_insn_info ez80_adl_ddfd_insn_table[] =3D { { 0007, 0307, 2, insn_default }, //"ld rr,(ii+d)" @@ -1386,11 +1386,11 @@ ez80_adl_ddfd_insn_table[] =3D =20 /* Return pointer to instruction information structure corresponded to opc= ode in buf. */ -static const struct insn_info * +static const struct z80_insn_info * z80_get_insn_info (struct gdbarch *gdbarch, const gdb_byte *buf, int *size) { int code; - const struct insn_info *info; + const struct z80_insn_info *info; unsigned long mach =3D gdbarch_bfd_arch_info (gdbarch)->mach; *size =3D 0; switch (mach)