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* [binutils-gdb] gdb/arm: Terminate unwinding when LR is 0xffffffff
@ 2022-06-09 14:33 Yvan Roux
  0 siblings, 0 replies; only message in thread
From: Yvan Roux @ 2022-06-09 14:33 UTC (permalink / raw)
  To: gdb-cvs

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=148ca9dd5cf96049c0db17c1230e4b96c0ac054a

commit 148ca9dd5cf96049c0db17c1230e4b96c0ac054a
Author: Yvan Roux <yvan.roux@foss.st.com>
Date:   Thu Jun 9 16:31:40 2022 +0200

    gdb/arm: Terminate unwinding when LR is 0xffffffff
    
    ARMv7-M Architecture Reference "A2.3.1 Arm core registers" states
    that LR is set to 0xffffffff on reset.
    
    ARMv8-M Architecture Reference "B3.3 Registers" states that LR is set
    to 0xffffffff on warm reset if Main Extension is implemented,
    otherwise the value is unknown.
    
    Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@st.com>
    Signed-off-by: Yvan Roux <yvan.roux@foss.st.com>

Diff:
---
 gdb/arm-tdep.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 591a2da99f2..09670b69a1d 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -3330,6 +3330,17 @@ arm_m_exception_cache (struct frame_info *this_frame)
   lr = get_frame_register_unsigned (this_frame, ARM_LR_REGNUM);
   sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
 
+  /* ARMv7-M Architecture Reference "A2.3.1 Arm core registers"
+     states that LR is set to 0xffffffff on reset.  ARMv8-M Architecture
+     Reference "B3.3 Registers" states that LR is set to 0xffffffff on warm
+     reset if Main Extension is implemented, otherwise the value is unknown.  */
+  if (lr == 0xffffffff)
+    {
+      /* Terminate any further stack unwinding by referring to self.  */
+      arm_cache_set_active_sp_value (cache, tdep, sp);
+      return cache;
+    }
+
   fnc_return = ((lr & 0xfffffffe) == 0xfefffffe);
   if (tdep->have_sec_ext && fnc_return)
     {


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