From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1844) id 80AE63853547; Thu, 9 Jun 2022 14:33:36 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 80AE63853547 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Yvan Roux To: gdb-cvs@sourceware.org Subject: [binutils-gdb] gdb/arm: Terminate unwinding when LR is 0xffffffff X-Act-Checkin: binutils-gdb X-Git-Author: Yvan Roux X-Git-Refname: refs/heads/master X-Git-Oldrev: 575a212a78c6f7e213933cf96d9a63642edc5069 X-Git-Newrev: 148ca9dd5cf96049c0db17c1230e4b96c0ac054a Message-Id: <20220609143336.80AE63853547@sourceware.org> Date: Thu, 9 Jun 2022 14:33:36 +0000 (GMT) X-BeenThere: gdb-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 09 Jun 2022 14:33:36 -0000 https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D148ca9dd5cf9= 6049c0db17c1230e4b96c0ac054a commit 148ca9dd5cf96049c0db17c1230e4b96c0ac054a Author: Yvan Roux Date: Thu Jun 9 16:31:40 2022 +0200 gdb/arm: Terminate unwinding when LR is 0xffffffff =20 ARMv7-M Architecture Reference "A2.3.1 Arm core registers" states that LR is set to 0xffffffff on reset. =20 ARMv8-M Architecture Reference "B3.3 Registers" states that LR is set to 0xffffffff on warm reset if Main Extension is implemented, otherwise the value is unknown. =20 Signed-off-by: Torbj=C3=B6rn SVENSSON Signed-off-by: Yvan Roux Diff: --- gdb/arm-tdep.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 591a2da99f2..09670b69a1d 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -3330,6 +3330,17 @@ arm_m_exception_cache (struct frame_info *this_frame) lr =3D get_frame_register_unsigned (this_frame, ARM_LR_REGNUM); sp =3D get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); =20 + /* ARMv7-M Architecture Reference "A2.3.1 Arm core registers" + states that LR is set to 0xffffffff on reset. ARMv8-M Architecture + Reference "B3.3 Registers" states that LR is set to 0xffffffff on warm + reset if Main Extension is implemented, otherwise the value is unknow= n. */ + if (lr =3D=3D 0xffffffff) + { + /* Terminate any further stack unwinding by referring to self. */ + arm_cache_set_active_sp_value (cache, tdep, sp); + return cache; + } + fnc_return =3D ((lr & 0xfffffffe) =3D=3D 0xfefffffe); if (tdep->have_sec_ext && fnc_return) {