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From: Yvan Roux <yroux@sourceware.org> To: gdb-cvs@sourceware.org Subject: [binutils-gdb] gdb/arm: Track msp and psp Date: Wed, 15 Jun 2022 14:09:39 +0000 (GMT) [thread overview] Message-ID: <20220615140939.D312D3858C2C@sourceware.org> (raw) https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=0d12d61b9a646f317d9793492971c9a28f83b754 commit 0d12d61b9a646f317d9793492971c9a28f83b754 Author: Yvan Roux <yvan.roux@foss.st.com> Date: Wed Jun 15 16:01:46 2022 +0200 gdb/arm: Track msp and psp For Arm Cortex-M33 with security extensions, there are 4 different stack pointers (msp_s, msp_ns, psp_s, psp_ns). To be compatible with earlier Cortex-M derivates, the msp and psp registers are aliases for one of the 4 real stack pointer registers. These are the combinations that exist: sp -> msp -> msp_s sp -> msp -> msp_ns sp -> psp -> psp_s sp -> psp -> psp_ns This means that when the GDB client is to show the value of "msp", the value should always be equal to either "msp_s" or "msp_ns". Same goes for "psp". To add a bit more context; GDB does not really use the register msp (or psp) internally, but they are part of the set of registers which are provided by the target.xml file. As a result, they will be part of the set of registers printed by the "info r" command. Without this particular patch, GDB will hit the assert in the bottom of arm_cache_get_sp_register function. Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=29121 Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> Signed-off-by: Yvan Roux <yvan.roux@foss.st.com> Diff: --- gdb/arm-tdep.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 7c36133a091..38ce85e9cbc 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -288,6 +288,8 @@ struct arm_prologue_cache /* Active stack pointer. */ int active_sp_regnum; + int active_msp_regnum; + int active_psp_regnum; /* The frame base for this frame is just prev_sp - frame size. FRAMESIZE is the distance from the frame pointer to the @@ -345,11 +347,23 @@ arm_cache_init (struct arm_prologue_cache *cache, struct frame_info *frame) if (tdep->have_sec_ext) { + CORE_ADDR msp_val = get_frame_register_unsigned (frame, tdep->m_profile_msp_regnum); + CORE_ADDR psp_val = get_frame_register_unsigned (frame, tdep->m_profile_psp_regnum); + arm_cache_init_sp (tdep->m_profile_msp_s_regnum, &cache->msp_s, cache, frame); arm_cache_init_sp (tdep->m_profile_psp_s_regnum, &cache->psp_s, cache, frame); arm_cache_init_sp (tdep->m_profile_msp_ns_regnum, &cache->msp_ns, cache, frame); arm_cache_init_sp (tdep->m_profile_psp_ns_regnum, &cache->psp_ns, cache, frame); + if (msp_val == cache->msp_s) + cache->active_msp_regnum = tdep->m_profile_msp_s_regnum; + else if (msp_val == cache->msp_ns) + cache->active_msp_regnum = tdep->m_profile_msp_ns_regnum; + if (psp_val == cache->psp_s) + cache->active_psp_regnum = tdep->m_profile_psp_s_regnum; + else if (psp_val == cache->psp_ns) + cache->active_psp_regnum = tdep->m_profile_psp_ns_regnum; + /* Use MSP_S as default stack pointer. */ if (cache->active_sp_regnum == ARM_SP_REGNUM) cache->active_sp_regnum = tdep->m_profile_msp_s_regnum; @@ -384,6 +398,10 @@ arm_cache_get_sp_register (struct arm_prologue_cache *cache, return cache->psp_s; if (regnum == tdep->m_profile_psp_ns_regnum) return cache->psp_ns; + if (regnum == tdep->m_profile_msp_regnum) + return arm_cache_get_sp_register (cache, tdep, cache->active_msp_regnum); + if (regnum == tdep->m_profile_psp_regnum) + return arm_cache_get_sp_register (cache, tdep, cache->active_psp_regnum); } else if (tdep->is_m) {
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