From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1844) id E48223857BA9; Wed, 15 Jun 2022 14:09:44 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E48223857BA9 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Yvan Roux To: gdb-cvs@sourceware.org Subject: [binutils-gdb] gdb/arm: Make sp alias for one of the other stack pointers X-Act-Checkin: binutils-gdb X-Git-Author: Yvan Roux X-Git-Refname: refs/heads/master X-Git-Oldrev: 0d12d61b9a646f317d9793492971c9a28f83b754 X-Git-Newrev: b9b66a3a5740dfa0cf929a9c9abcdbaabe989358 Message-Id: <20220615140944.E48223857BA9@sourceware.org> Date: Wed, 15 Jun 2022 14:09:44 +0000 (GMT) X-BeenThere: gdb-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Jun 2022 14:09:45 -0000 https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3Db9b66a3a5740= dfa0cf929a9c9abcdbaabe989358 commit b9b66a3a5740dfa0cf929a9c9abcdbaabe989358 Author: Yvan Roux Date: Wed Jun 15 16:07:22 2022 +0200 gdb/arm: Make sp alias for one of the other stack pointers =20 For Cortex-M targets, SP register is never detached from msp or psp, it always has the same value as one of them. Let GDB treat ARM_SP_REGNUM as an alias similar to what is done in hardware. =20 Signed-off-by: Torbj=C3=B6rn SVENSSON Signed-off-by: Yvan Roux Diff: --- gdb/arm-tdep.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 38ce85e9cbc..0c907482036 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -385,9 +385,6 @@ static CORE_ADDR arm_cache_get_sp_register (struct arm_prologue_cache *cache, arm_gdbarch_tdep *tdep, int regnum) { - if (regnum =3D=3D ARM_SP_REGNUM) - return cache->sp; - if (tdep->have_sec_ext) { if (regnum =3D=3D tdep->m_profile_msp_s_regnum) @@ -402,6 +399,8 @@ arm_cache_get_sp_register (struct arm_prologue_cache *c= ache, return arm_cache_get_sp_register (cache, tdep, cache->active_msp_regnum); if (regnum =3D=3D tdep->m_profile_psp_regnum) return arm_cache_get_sp_register (cache, tdep, cache->active_psp_regnum); + if (regnum =3D=3D ARM_SP_REGNUM) + return arm_cache_get_sp_register (cache, tdep, cache->active_sp_regnum); } else if (tdep->is_m) { @@ -409,7 +408,11 @@ arm_cache_get_sp_register (struct arm_prologue_cache *= cache, return cache->msp_s; if (regnum =3D=3D tdep->m_profile_psp_regnum) return cache->psp_s; + if (regnum =3D=3D ARM_SP_REGNUM) + return arm_cache_get_sp_register (cache, tdep, cache->active_sp_regnum); } + else if (regnum =3D=3D ARM_SP_REGNUM) + return cache->sp; =20 gdb_assert_not_reached ("Invalid SP selection"); } @@ -430,12 +433,6 @@ static void arm_cache_set_active_sp_value (struct arm_prologue_cache *cache, arm_gdbarch_tdep *tdep, CORE_ADDR val) { - if (cache->active_sp_regnum =3D=3D ARM_SP_REGNUM) - { - cache->sp =3D val; - return; - } - if (tdep->have_sec_ext) { if (cache->active_sp_regnum =3D=3D tdep->m_profile_msp_s_regnum) @@ -458,6 +455,11 @@ arm_cache_set_active_sp_value (struct arm_prologue_cac= he *cache, =20 return; } + else if (cache->active_sp_regnum =3D=3D ARM_SP_REGNUM) + { + cache->sp =3D val; + return; + } =20 gdb_assert_not_reached ("Invalid SP selection"); }