From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1844) id DC9A0386F0CC; Fri, 24 Jun 2022 15:18:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org DC9A0386F0CC Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Yvan Roux To: gdb-cvs@sourceware.org Subject: [binutils-gdb] gdb/arm: Update the value of active sp when base sp changes X-Act-Checkin: binutils-gdb X-Git-Author: Yvan Roux X-Git-Refname: refs/heads/master X-Git-Oldrev: 9704b8b4bc58f4f464961cca97d362fd33740ce8 X-Git-Newrev: 10245fe8171a292dcf50051a33ec5bae7b08cb54 Message-Id: <20220624151848.DC9A0386F0CC@sourceware.org> Date: Fri, 24 Jun 2022 15:18:48 +0000 (GMT) X-BeenThere: gdb-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 24 Jun 2022 15:18:49 -0000 https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D10245fe8171a= 292dcf50051a33ec5bae7b08cb54 commit 10245fe8171a292dcf50051a33ec5bae7b08cb54 Author: Yvan Roux Date: Fri Jun 24 17:16:54 2022 +0200 gdb/arm: Update the value of active sp when base sp changes =20 For Arm Cortex-M33 with security extensions, there are 4 different stacks pointers (msp_s, msp_ns, psp_s, psp_ns). When plain "sp" is updated during unwinding of the stack, the active stack pointer of the 4 stack pointers needs to be kept in sync. =20 Signed-off-by: Torbj=C3=B6rn SVENSSON Signed-off-by: Yvan Roux Diff: --- gdb/arm-tdep.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 0c907482036..96d70d40b28 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -923,6 +923,7 @@ thumb_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR start, CORE_ADDR limit, struct arm_prologue_cache *cache) { + arm_gdbarch_tdep *tdep =3D (arm_gdbarch_tdep *) gdbarch_tdep (gdbarch); enum bfd_endian byte_order =3D gdbarch_byte_order (gdbarch); enum bfd_endian byte_order_for_code =3D gdbarch_byte_order_for_code (gdb= arch); int i; @@ -1398,9 +1399,6 @@ thumb_analyze_prologue (struct gdbarch *gdbarch, unrecognized_pc =3D start; } =20 - arm_gdbarch_tdep *tdep - =3D (arm_gdbarch_tdep *) gdbarch_tdep (gdbarch); - /* Make sure we are dealing with a target that supports ARMv8.1-m PACBTI. */ if (cache !=3D nullptr && tdep->have_pacbti @@ -1460,7 +1458,11 @@ thumb_analyze_prologue (struct gdbarch *gdbarch, =20 for (i =3D 0; i < gdbarch_num_regs (gdbarch); i++) if (stack.find_reg (gdbarch, i, &offset)) - cache->saved_regs[i].set_addr (offset); + { + cache->saved_regs[i].set_addr (offset); + if (i =3D=3D ARM_SP_REGNUM) + arm_cache_set_active_sp_value(cache, tdep, offset); + } =20 return unrecognized_pc; } @@ -2087,7 +2089,11 @@ arm_analyze_prologue (struct gdbarch *gdbarch, =20 for (regno =3D 0; regno < ARM_FPS_REGNUM; regno++) if (stack.find_reg (gdbarch, regno, &offset)) - cache->saved_regs[regno].set_addr (offset); + { + cache->saved_regs[regno].set_addr (offset); + if (regno =3D=3D ARM_SP_REGNUM) + arm_cache_set_active_sp_value(cache, tdep, offset); + } } =20 arm_debug_printf ("Prologue scan stopped at %s",