From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1726) id 377B03857400; Tue, 9 Aug 2022 11:13:26 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 377B03857400 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Andrew Burgess To: gdb-cvs@sourceware.org Subject: [binutils-gdb] gdb/riscv: use register name enum values in riscv-linux-nat.c X-Act-Checkin: binutils-gdb X-Git-Author: Andrew Burgess X-Git-Refname: refs/heads/master X-Git-Oldrev: 298d6e70a89a156e43d327c6c2c6efe08911d4f0 X-Git-Newrev: 8cf61a33bba791c38e1b2f6cf2f276d052a1f17e Message-Id: <20220809111326.377B03857400@sourceware.org> Date: Tue, 9 Aug 2022 11:13:26 +0000 (GMT) X-BeenThere: gdb-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 09 Aug 2022 11:13:26 -0000 https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D8cf61a33bba7= 91c38e1b2f6cf2f276d052a1f17e commit 8cf61a33bba791c38e1b2f6cf2f276d052a1f17e Author: Andrew Burgess Date: Tue Aug 9 12:10:03 2022 +0100 gdb/riscv: use register name enum values in riscv-linux-nat.c =20 There were a few places where we were using integer values rather than the RISCV_*_REGNUM constants defined in riscv-tdep.h. This commit replaces 0 with RISCV_ZERO_REGNUM and 32 with RISCV_PC_REGNUM in a few places. =20 There should be no user visible changes after this commit. Diff: --- gdb/riscv-linux-nat.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/gdb/riscv-linux-nat.c b/gdb/riscv-linux-nat.c index 70634941483..5fbb0ca5add 100644 --- a/gdb/riscv-linux-nat.c +++ b/gdb/riscv-linux-nat.c @@ -66,17 +66,17 @@ supply_gregset_regnum (struct regcache *regcache, const= prgregset_t *gregs, regcache->raw_supply (i, regp + i); =20 /* GDB stores PC in reg 32. Linux kernel stores it in reg 0. */ - regcache->raw_supply (32, regp + 0); + regcache->raw_supply (RISCV_PC_REGNUM, regp + 0); =20 /* Fill the inaccessible zero register with zero. */ - regcache->raw_supply_zeroed (0); + regcache->raw_supply_zeroed (RISCV_ZERO_REGNUM); } else if (regnum =3D=3D RISCV_ZERO_REGNUM) - regcache->raw_supply_zeroed (0); + regcache->raw_supply_zeroed (RISCV_ZERO_REGNUM); else if (regnum > RISCV_ZERO_REGNUM && regnum < RISCV_PC_REGNUM) regcache->raw_supply (regnum, regp + regnum); else if (regnum =3D=3D RISCV_PC_REGNUM) - regcache->raw_supply (32, regp + 0); + regcache->raw_supply (RISCV_PC_REGNUM, regp + 0); } =20 /* Copy all general purpose registers from regset GREGS into REGCACHE. */ @@ -147,7 +147,7 @@ fill_gregset (const struct regcache *regcache, prgregse= t_t *gregs, int regnum) for (int i =3D RISCV_ZERO_REGNUM + 1; i < RISCV_PC_REGNUM; i++) regcache->raw_collect (i, regp + i); =20 - regcache->raw_collect (32, regp + 0); + regcache->raw_collect (RISCV_PC_REGNUM, regp + 0); } else if (regnum =3D=3D RISCV_ZERO_REGNUM) /* Nothing to do here. */ @@ -155,7 +155,7 @@ fill_gregset (const struct regcache *regcache, prgregse= t_t *gregs, int regnum) else if (regnum > RISCV_ZERO_REGNUM && regnum < RISCV_PC_REGNUM) regcache->raw_collect (regnum, regp + regnum); else if (regnum =3D=3D RISCV_PC_REGNUM) - regcache->raw_collect (32, regp + 0); + regcache->raw_collect (RISCV_PC_REGNUM, regp + 0); } =20 /* Copy floating point register REGNUM (or all fp regs if REGNUM =3D=3D -1)