From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1521) id D93C93855589; Mon, 31 Oct 2022 16:54:38 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D93C93855589 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1667235283; bh=Hk5m2s8B166XmCSvkpYpzvJZDzP11NTmd2+LxS1yFzo=; h=From:To:Subject:Date:From; b=rwmELwjgVCPHPd6M7Sa3UGGCUOfCumNo5+82DwqEOLhizmikRaLJOt2BW7w+I+eDo /QMPCV2NkEVBXqnbIPy1rA/gbrsnfm98dLsmv3GfHvfA5fUsOQreP2W+GH8aax+8z4 rtg/23cI99J/AinkdaKHz7NrENXGlAe9KrBKYJpk= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Frysinger To: bfd-cvs@sourceware.org, gdb-cvs@sourceware.org Subject: [binutils-gdb] sim: common: change sim_read & sim_write to use void* buffers X-Act-Checkin: binutils-gdb X-Git-Author: Mike Frysinger X-Git-Refname: refs/heads/master X-Git-Oldrev: f2462532e24ebfc137598d73ee6541948121f040 X-Git-Newrev: 5b94c3808140206d3b5204a3780f294d590cc458 Message-Id: <20221031165443.D93C93855589@sourceware.org> Date: Mon, 31 Oct 2022 16:54:38 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D5b94c3808140= 206d3b5204a3780f294d590cc458 commit 5b94c3808140206d3b5204a3780f294d590cc458 Author: Mike Frysinger Date: Wed Oct 26 21:53:30 2022 +0545 sim: common: change sim_read & sim_write to use void* buffers =20 When reading/writing arbitrary data to the system's memory, the unsigned char pointer type doesn't make that much sense. Switch it to void so we align a bit with standard C library read/write functions, and to avoid having to sprinkle casts everywhere. Diff: --- include/sim/sim.h | 4 ++-- sim/arm/wrapper.c | 10 ++++++---- sim/avr/interp.c | 14 ++++++++------ sim/bfin/dv-bfin_dma.c | 6 +++--- sim/bfin/dv-bfin_mmu.c | 4 ++-- sim/bfin/interp.c | 28 ++++++++++++++-------------- sim/common/sim-hrw.c | 8 ++++---- sim/common/sim-utils.h | 2 +- sim/cris/sim-if.c | 2 +- sim/d10v/interp.c | 4 ++-- sim/erc32/interf.c | 10 ++++++---- sim/h8300/compile.c | 7 ++++--- sim/iq2000/iq2000.c | 6 ++---- sim/m32c/gdb-if.c | 4 ++-- sim/mips/interp.c | 30 +++++++++++++++--------------- sim/ppc/sim_calls.c | 4 ++-- sim/riscv/sim-main.c | 10 +++++----- sim/rl78/gdb-if.c | 4 ++-- sim/rx/gdb-if.c | 10 ++++++---- sim/sh/interp.c | 12 +++++++----- sim/v850/simops.c | 6 +++--- 21 files changed, 97 insertions(+), 88 deletions(-) diff --git a/include/sim/sim.h b/include/sim/sim.h index 8611cf01d57..ae8f19499ee 100644 --- a/include/sim/sim.h +++ b/include/sim/sim.h @@ -170,14 +170,14 @@ SIM_RC sim_create_inferior (SIM_DESC sd, struct bfd *= abfd, at virtual address MEM and store in BUF. Result is number of bytes read, or zero if error. */ =20 -int sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length); +int sim_read (SIM_DESC sd, SIM_ADDR mem, void *buf, int length); =20 =20 /* Store LENGTH bytes from BUF into the simulated program's memory. Store bytes starting at virtual address MEM. Result is number of bytes write, or zero if error. */ =20 -int sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int le= ngth); +int sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length); =20 =20 /* Fetch register REGNO storing its raw (target endian) value in the diff --git a/sim/arm/wrapper.c b/sim/arm/wrapper.c index c97bae89dad..38a1f27a3b0 100644 --- a/sim/arm/wrapper.c +++ b/sim/arm/wrapper.c @@ -153,15 +153,16 @@ ARMul_ConsolePrint (ARMul_State * state, int sim_write (SIM_DESC sd ATTRIBUTE_UNUSED, SIM_ADDR addr, - const unsigned char * buffer, + const void * buffer, int size) { int i; + const unsigned char * data =3D buffer; =20 init (); =20 for (i =3D 0; i < size; i++) - ARMul_SafeWriteByte (state, addr + i, buffer[i]); + ARMul_SafeWriteByte (state, addr + i, data[i]); =20 return size; } @@ -169,15 +170,16 @@ sim_write (SIM_DESC sd ATTRIBUTE_UNUSED, int sim_read (SIM_DESC sd ATTRIBUTE_UNUSED, SIM_ADDR addr, - unsigned char * buffer, + void * buffer, int size) { int i; + unsigned char * data =3D buffer; =20 init (); =20 for (i =3D 0; i < size; i++) - buffer[i] =3D ARMul_SafeReadByte (state, addr + i); + data[i] =3D ARMul_SafeReadByte (state, addr + i); =20 return size; } diff --git a/sim/avr/interp.c b/sim/avr/interp.c index 8efdffab8af..1b147c482d7 100644 --- a/sim/avr/interp.c +++ b/sim/avr/interp.c @@ -1526,25 +1526,26 @@ sim_engine_run (SIM_DESC sd, } =20 int -sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int si= ze) +sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size) { int osize =3D size; =20 if (addr >=3D 0 && addr < SRAM_VADDR) { + const unsigned char *data =3D buffer; while (size > 0 && addr < (MAX_AVR_FLASH << 1)) { word val =3D flash[addr >> 1].op; =20 if (addr & 1) - val =3D (val & 0xff) | (buffer[0] << 8); + val =3D (val & 0xff) | (data[0] << 8); else - val =3D (val & 0xff00) | buffer[0]; + val =3D (val & 0xff00) | data[0]; =20 flash[addr >> 1].op =3D val; flash[addr >> 1].code =3D OP_unknown; addr++; - buffer++; + data++; size--; } return osize - size; @@ -1562,12 +1563,13 @@ sim_write (SIM_DESC sd, SIM_ADDR addr, const unsign= ed char *buffer, int size) } =20 int -sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size) +sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size) { int osize =3D size; =20 if (addr >=3D 0 && addr < SRAM_VADDR) { + unsigned char *data =3D buffer; while (size > 0 && addr < (MAX_AVR_FLASH << 1)) { word val =3D flash[addr >> 1].op; @@ -1575,7 +1577,7 @@ sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *= buffer, int size) if (addr & 1) val >>=3D 8; =20 - *buffer++ =3D val; + *data++ =3D val; addr++; size--; } diff --git a/sim/bfin/dv-bfin_dma.c b/sim/bfin/dv-bfin_dma.c index b93a96090c3..52fcd615354 100644 --- a/sim/bfin/dv-bfin_dma.c +++ b/sim/bfin/dv-bfin_dma.c @@ -138,17 +138,17 @@ bfin_dma_process_desc (struct hw *me, struct bfin_dma= *dma) case DMAFLOW_ARRAY: if (ndsize =3D=3D 0 || ndsize > 7) hw_abort (me, "DMA config error: DMAFLOW_ARRAY requires NDSIZE 1...7"); - sim_read (hw_system (me), dma->curr_desc_ptr, (void *)flows, ndsize = * 2); + sim_read (hw_system (me), dma->curr_desc_ptr, flows, ndsize * 2); break; case DMAFLOW_SMALL: if (ndsize =3D=3D 0 || ndsize > 8) hw_abort (me, "DMA config error: DMAFLOW_SMALL requires NDSIZE 1...8"); - sim_read (hw_system (me), dma->next_desc_ptr, (void *)flows, ndsize = * 2); + sim_read (hw_system (me), dma->next_desc_ptr, flows, ndsize * 2); break; case DMAFLOW_LARGE: if (ndsize =3D=3D 0 || ndsize > 9) hw_abort (me, "DMA config error: DMAFLOW_LARGE requires NDSIZE 1...9"); - sim_read (hw_system (me), dma->next_desc_ptr, (void *)flows, ndsize = * 2); + sim_read (hw_system (me), dma->next_desc_ptr, flows, ndsize * 2); break; default: hw_abort (me, "DMA config error: invalid DMAFLOW %#x", dma->config); diff --git a/sim/bfin/dv-bfin_mmu.c b/sim/bfin/dv-bfin_mmu.c index b2ca30df02f..82320f4ea00 100644 --- a/sim/bfin/dv-bfin_mmu.c +++ b/sim/bfin/dv-bfin_mmu.c @@ -157,9 +157,9 @@ bfin_mmu_io_write_buffer (struct hw *me, const void *so= urce, hw_abort (me, "DTEST_COMMAND bits undefined"); =20 if (value & TEST_WRITE) - sim_write (hw_system (me), addr, (void *)mmu->dtest_data, 8); + sim_write (hw_system (me), addr, mmu->dtest_data, 8); else - sim_read (hw_system (me), addr, (void *)mmu->dtest_data, 8); + sim_read (hw_system (me), addr, mmu->dtest_data, 8); } break; default: diff --git a/sim/bfin/interp.c b/sim/bfin/interp.c index 58bec8b9b30..f63690cfac4 100644 --- a/sim/bfin/interp.c +++ b/sim/bfin/interp.c @@ -703,7 +703,7 @@ sim_open (SIM_OPEN_KIND kind, host_callback *callback, { bu16 emuexcpt =3D 0x25; sim_do_commandf (sd, "memory-size 0x%x", BFIN_DEFAULT_MEM_SIZE); - sim_write (sd, 0, (void *)&emuexcpt, 2); + sim_write (sd, 0, &emuexcpt, 2); } =20 /* Check for/establish the a reference program image. */ @@ -791,7 +791,7 @@ bfin_fdpic_load (SIM_DESC sd, SIM_CPU *cpu, struct bfd = *abfd, bu32 *sp, /* Push the Ehdr onto the stack. */ *sp -=3D sizeof (ehdr); elf_addrs[3] =3D *sp; - sim_write (sd, *sp, (void *)&ehdr, sizeof (ehdr)); + sim_write (sd, *sp, &ehdr, sizeof (ehdr)); if (STATE_OPEN_KIND (sd) =3D=3D SIM_OPEN_DEBUG) sim_io_printf (sd, " Elf_Ehdr: %#x\n", *sp); =20 @@ -850,9 +850,9 @@ bfin_fdpic_load (SIM_DESC sd, SIM_CPU *cpu, struct bfd = *abfd, bu32 *sp, max_load_addr =3D max (paddr + memsz, max_load_addr); =20 *sp -=3D 12; - sim_write (sd, *sp+0, (void *)&paddr, 4); /* loadseg.addr */ - sim_write (sd, *sp+4, (void *)&vaddr, 4); /* loadseg.p_vaddr */ - sim_write (sd, *sp+8, (void *)&memsz, 4); /* loadseg.p_memsz */ + sim_write (sd, *sp+0, &paddr, 4); /* loadseg.addr */ + sim_write (sd, *sp+4, &vaddr, 4); /* loadseg.p_vaddr */ + sim_write (sd, *sp+8, &memsz, 4); /* loadseg.p_memsz */ ++nsegs; } else if (phdrs[i].p_type =3D=3D PT_DYNAMIC) @@ -885,7 +885,7 @@ bfin_fdpic_load (SIM_DESC sd, SIM_CPU *cpu, struct bfd = *abfd, bu32 *sp, /* Push the summary loadmap info onto the stack last. */ *sp -=3D 4; sim_write (sd, *sp+0, null, 2); /* loadmap.version */ - sim_write (sd, *sp+2, (void *)&nsegs, 2); /* loadmap.nsegs */ + sim_write (sd, *sp+2, &nsegs, 2); /* loadmap.nsegs */ =20 ret =3D true; skip_fdpic_init: @@ -1012,10 +1012,10 @@ bfin_user_init (SIM_DESC sd, SIM_CPU *cpu, struct b= fd *abfd, auxvt_size +=3D 8; \ sp -=3D 4; \ auxvt =3D (val); \ - sim_write (sd, sp, (void *)&auxvt, 4); \ + sim_write (sd, sp, &auxvt, 4); \ sp -=3D 4; \ auxvt =3D (at); \ - sim_write (sd, sp, (void *)&auxvt, 4) + sim_write (sd, sp, &auxvt, 4) unsigned int egid =3D getegid (), gid =3D getgid (); unsigned int euid =3D geteuid (), uid =3D getuid (); bu32 auxvt_size =3D 0; @@ -1043,15 +1043,15 @@ bfin_user_init (SIM_DESC sd, SIM_CPU *cpu, struct b= fd *abfd, SET_SPREG (sp); =20 /* First push the argc value. */ - sim_write (sd, sp, (void *)&argc, 4); + sim_write (sd, sp, &argc, 4); sp +=3D 4; =20 /* Then the actual argv strings so we know where to point argv[]. */ for (i =3D 0; i < argc; ++i) { unsigned len =3D strlen (argv[i]) + 1; - sim_write (sd, sp_flat, (void *)argv[i], len); - sim_write (sd, sp, (void *)&sp_flat, 4); + sim_write (sd, sp_flat, argv[i], len); + sim_write (sd, sp, &sp_flat, 4); sp_flat +=3D len; sp +=3D 4; } @@ -1062,8 +1062,8 @@ bfin_user_init (SIM_DESC sd, SIM_CPU *cpu, struct bfd= *abfd, for (i =3D 0; i < envc; ++i) { unsigned len =3D strlen (env[i]) + 1; - sim_write (sd, sp_flat, (void *)env[i], len); - sim_write (sd, sp, (void *)&sp_flat, 4); + sim_write (sd, sp_flat, env[i], len); + sim_write (sd, sp, &sp_flat, 4); sp_flat +=3D len; sp +=3D 4; } @@ -1093,7 +1093,7 @@ bfin_os_init (SIM_DESC sd, SIM_CPU *cpu, char * const= *argv) while (argv[i]) { bu32 len =3D strlen (argv[i]); - sim_write (sd, cmdline, (void *)argv[i], len); + sim_write (sd, cmdline, argv[i], len); cmdline +=3D len; sim_write (sd, cmdline, &byte, 1); ++cmdline; diff --git a/sim/common/sim-hrw.c b/sim/common/sim-hrw.c index 01a4f213930..2596019e6e5 100644 --- a/sim/common/sim-hrw.c +++ b/sim/common/sim-hrw.c @@ -27,17 +27,17 @@ along with this program. If not, see . */ modeling real hardware */ =20 int -sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length) +sim_read (SIM_DESC sd, SIM_ADDR mem, void *buffer, int length) { SIM_ASSERT (STATE_MAGIC (sd) =3D=3D SIM_MAGIC_NUMBER); return sim_core_read_buffer (sd, NULL, read_map, - buf, mem, length); + buffer, mem, length); } =20 int -sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length) +sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buffer, int length) { SIM_ASSERT (STATE_MAGIC (sd) =3D=3D SIM_MAGIC_NUMBER); return sim_core_write_buffer (sd, NULL, write_map, - buf, mem, length); + buffer, mem, length); } diff --git a/sim/common/sim-utils.h b/sim/common/sim-utils.h index c111854a94f..cd8aca9f401 100644 --- a/sim/common/sim-utils.h +++ b/sim/common/sim-utils.h @@ -64,7 +64,7 @@ SIM_RC sim_analyze_program (SIM_DESC sd, const char *prog= _name, =20 typedef struct host_callback_struct host_callback; typedef int sim_write_fn (SIM_DESC sd, SIM_ADDR mem, - const unsigned char *buf, int length); + const void *buf, int length); struct bfd *sim_load_file (SIM_DESC sd, const char *myname, host_callback *callback, const char *prog, struct bfd *prog_bfd, int verbose_p, diff --git a/sim/cris/sim-if.c b/sim/cris/sim-if.c index 75176d0c020..bedc0d08fc0 100644 --- a/sim/cris/sim-if.c +++ b/sim/cris/sim-if.c @@ -486,7 +486,7 @@ aux_ent_entry (struct bfd *ebfd) interp_load_addr offset. */ =20 static int -cris_write_interp (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, in= t length) +cris_write_interp (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length) { return sim_write (sd, mem + interp_load_addr, buf, length); } diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c index fde96aa70e3..c82bb4ce8c9 100644 --- a/sim/d10v/interp.c +++ b/sim/d10v/interp.c @@ -706,7 +706,7 @@ xfer_mem (SIM_DESC sd, =20 =20 int -sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int si= ze) +sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size) { /* FIXME: this should be performing a virtual transfer */ /* FIXME: We cast the const away, but it's safe because xfer_mem only re= ads @@ -715,7 +715,7 @@ sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned c= har *buffer, int size) } =20 int -sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size) +sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size) { /* FIXME: this should be performing a virtual transfer */ return xfer_mem (sd, addr, buffer, size, 0); diff --git a/sim/erc32/interf.c b/sim/erc32/interf.c index aa3ffdc7ada..fc4336c5f6f 100644 --- a/sim/erc32/interf.c +++ b/sim/erc32/interf.c @@ -329,23 +329,25 @@ sim_fetch_register(SIM_DESC sd, int regno, unsigned c= har *buf, int length) } =20 int -sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length) +sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buffer, int length) { int i, len; + const unsigned char *data =3D buffer; =20 for (i =3D 0; i < length; i++) { - sis_memory_write ((mem + i) ^ EBT, &buf[i], 1); + sis_memory_write ((mem + i) ^ EBT, &data[i], 1); } return length; } =20 int -sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length) +sim_read (SIM_DESC sd, SIM_ADDR mem, void *buffer, int length) { int i, len; + unsigned char *data =3D buffer; =20 for (i =3D 0; i < length; i++) { - sis_memory_read ((mem + i) ^ EBT, &buf[i], 1); + sis_memory_read ((mem + i) ^ EBT, &data[i], 1); } return length; } diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c index 5f64b4752f0..f49e83d6b19 100644 --- a/sim/h8300/compile.c +++ b/sim/h8300/compile.c @@ -4442,9 +4442,10 @@ sim_engine_run (SIM_DESC sd, } =20 int -sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int si= ze) +sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size) { int i; + const unsigned char *data =3D buffer; =20 init_pointers (sd); if (addr < 0) @@ -4453,7 +4454,7 @@ sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned= char *buffer, int size) { if (addr < memory_size) { - h8_set_memory (sd, addr + i, buffer[i]); + h8_set_memory (sd, addr + i, data[i]); } else break; @@ -4462,7 +4463,7 @@ sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned= char *buffer, int size) } =20 int -sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size) +sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size) { init_pointers (sd); if (addr < 0) diff --git a/sim/iq2000/iq2000.c b/sim/iq2000/iq2000.c index 2c01434c308..9b1f4bd0179 100644 --- a/sim/iq2000/iq2000.c +++ b/sim/iq2000/iq2000.c @@ -47,8 +47,7 @@ fetch_str (SIM_CPU *current_cpu, PCADDR pc, DI addr) pc, read_map, CPU2DATA(addr + nr)) !=3D 0) nr++; buf =3D NZALLOC (char, nr + 1); - sim_read (CPU_STATE (current_cpu), CPU2DATA(addr), (unsigned char *) buf, - nr); + sim_read (CPU_STATE (current_cpu), CPU2DATA(addr), buf, nr); return buf; } =20 @@ -83,8 +82,7 @@ do_syscall (SIM_CPU *current_cpu, PCADDR pc) =20 case TARGET_NEWLIB_SYS_write: buf =3D zalloc (PARM3); - sim_read (CPU_STATE (current_cpu), CPU2DATA(PARM2), - (unsigned char *) buf, PARM3); + sim_read (CPU_STATE (current_cpu), CPU2DATA(PARM2), buf, PARM3); SET_H_GR (ret_reg, sim_io_write (CPU_STATE (current_cpu), PARM1, buf, PARM3)); diff --git a/sim/m32c/gdb-if.c b/sim/m32c/gdb-if.c index ffbdbd28d57..8bb8e9bb563 100644 --- a/sim/m32c/gdb-if.c +++ b/sim/m32c/gdb-if.c @@ -159,7 +159,7 @@ sim_create_inferior (SIM_DESC sd, struct bfd * abfd, } =20 int -sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length) +sim_read (SIM_DESC sd, SIM_ADDR mem, void *buf, int length) { check_desc (sd); =20 @@ -172,7 +172,7 @@ sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf= , int length) } =20 int -sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length) +sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length) { check_desc (sd); =20 diff --git a/sim/mips/interp.c b/sim/mips/interp.c index e46e817eed9..28421b3a831 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -722,7 +722,7 @@ sim_open (SIM_OPEN_KIND kind, host_callback *cb, (((loop >> 2) & RSVD_INSTRUCTION_ARG_MASK) << RSVD_INSTRUCTION_ARG_SHIFT)); H2T (insn); - sim_write (sd, vaddr, (unsigned char *)&insn, sizeof (insn)); + sim_write (sd, vaddr, &insn, sizeof (insn)); } } =20 @@ -770,13 +770,13 @@ sim_open (SIM_OPEN_KIND kind, host_callback *cb, if (pmon_monitor_base !=3D 0) { address_word vaddr =3D (pmon_monitor_base + (loop * 4)); - sim_write (sd, vaddr, (unsigned char *)&value, sizeof (value)); + sim_write (sd, vaddr, &value, sizeof (value)); } =20 if (lsipmon_monitor_base !=3D 0) { address_word vaddr =3D (lsipmon_monitor_base + (loop * 4)); - sim_write (sd, vaddr, (unsigned char *)&value, sizeof (value)); + sim_write (sd, vaddr, &value, sizeof (value)); } } =20 @@ -791,13 +791,13 @@ sim_open (SIM_OPEN_KIND kind, host_callback *cb, HALT_INSTRUCTION /* BREAK */ }; H2T (halt[0]); H2T (halt[1]); - sim_write (sd, 0x80000000, (unsigned char *) halt, sizeof (halt)); - sim_write (sd, 0x80000180, (unsigned char *) halt, sizeof (halt)); - sim_write (sd, 0x80000200, (unsigned char *) halt, sizeof (halt)); + sim_write (sd, 0x80000000, halt, sizeof (halt)); + sim_write (sd, 0x80000180, halt, sizeof (halt)); + sim_write (sd, 0x80000200, halt, sizeof (halt)); /* XXX: Write here unconditionally? */ - sim_write (sd, 0xBFC00200, (unsigned char *) halt, sizeof (halt)); - sim_write (sd, 0xBFC00380, (unsigned char *) halt, sizeof (halt)); - sim_write (sd, 0xBFC00400, (unsigned char *) halt, sizeof (halt)); + sim_write (sd, 0xBFC00200, halt, sizeof (halt)); + sim_write (sd, 0xBFC00380, halt, sizeof (halt)); + sim_write (sd, 0xBFC00400, halt, sizeof (halt)); } } =20 @@ -1066,7 +1066,7 @@ fetch_str (SIM_DESC sd, while (sim_read (sd, addr + nr, &null, 1) =3D=3D 1 && null !=3D 0) nr++; buf =3D NZALLOC (char, nr + 1); - sim_read (sd, addr, (unsigned char *)buf, nr); + sim_read (sd, addr, buf, nr); return buf; } =20 @@ -1211,7 +1211,7 @@ sim_monitor (SIM_DESC sd, int nr =3D A2; char *buf =3D zalloc (nr); V0 =3D sim_io_read (sd, fd, buf, nr); - sim_write (sd, A1, (unsigned char *)buf, nr); + sim_write (sd, A1, buf, nr); free (buf); } break; @@ -1221,7 +1221,7 @@ sim_monitor (SIM_DESC sd, int fd =3D A0; int nr =3D A2; char *buf =3D zalloc (nr); - sim_read (sd, A1, (unsigned char *)buf, nr); + sim_read (sd, A1, buf, nr); V0 =3D sim_io_write (sd, fd, buf, nr); if (fd =3D=3D 1) sim_io_flush_stdout (sd); @@ -1368,9 +1368,9 @@ sim_monitor (SIM_DESC sd, =20 value =3D mem_size; H2T (value); - sim_write (sd, A0 + 0, (unsigned char *)&value, 4); - sim_write (sd, A0 + 4, (unsigned char *)&zero, 4); - sim_write (sd, A0 + 8, (unsigned char *)&zero, 4); + sim_write (sd, A0 + 0, &value, 4); + sim_write (sd, A0 + 4, &zero, 4); + sim_write (sd, A0 + 8, &zero, 4); /* sim_io_eprintf (sd, "sim: get_mem_info() deprecated\n"); */ break; } diff --git a/sim/ppc/sim_calls.c b/sim/ppc/sim_calls.c index 3dcce19f628..6ca6c2ce2c2 100644 --- a/sim/ppc/sim_calls.c +++ b/sim/ppc/sim_calls.c @@ -125,7 +125,7 @@ sim_load (SIM_DESC sd, const char *prog, bfd *abfd, int= from_tty) =20 =20 int -sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length) +sim_read (SIM_DESC sd, SIM_ADDR mem, void *buf, int length) { int result =3D psim_read_memory(simulator, MAX_NR_PROCESSORS, buf, mem, length); @@ -136,7 +136,7 @@ sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf= , int length) =20 =20 int -sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length) +sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length) { int result =3D psim_write_memory(simulator, MAX_NR_PROCESSORS, buf, mem, length, diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c index 0156f791d4b..5932c0de979 100644 --- a/sim/riscv/sim-main.c +++ b/sim/riscv/sim-main.c @@ -1192,15 +1192,15 @@ initialize_env (SIM_DESC sd, const char * const *ar= gv, const char * const *env) cpu->sp =3D sp; =20 /* First push the argc value. */ - sim_write (sd, sp, (void *)&argc, sizeof (unsigned_word)); + sim_write (sd, sp, &argc, sizeof (unsigned_word)); sp +=3D sizeof (unsigned_word); =20 /* Then the actual argv strings so we know where to point argv[]. */ for (i =3D 0; i < argc; ++i) { unsigned len =3D strlen (argv[i]) + 1; - sim_write (sd, sp_flat, (void *)argv[i], len); - sim_write (sd, sp, (void *)&sp_flat, sizeof (address_word)); + sim_write (sd, sp_flat, argv[i], len); + sim_write (sd, sp, &sp_flat, sizeof (address_word)); sp_flat +=3D len; sp +=3D sizeof (address_word); } @@ -1211,8 +1211,8 @@ initialize_env (SIM_DESC sd, const char * const *argv= , const char * const *env) for (i =3D 0; i < envc; ++i) { unsigned len =3D strlen (env[i]) + 1; - sim_write (sd, sp_flat, (void *)env[i], len); - sim_write (sd, sp, (void *)&sp_flat, sizeof (address_word)); + sim_write (sd, sp_flat, env[i], len); + sim_write (sd, sp, &sp_flat, sizeof (address_word)); sp_flat +=3D len; sp +=3D sizeof (address_word); } diff --git a/sim/rl78/gdb-if.c b/sim/rl78/gdb-if.c index a27cc56f3c8..8129c0924dc 100644 --- a/sim/rl78/gdb-if.c +++ b/sim/rl78/gdb-if.c @@ -205,7 +205,7 @@ sim_create_inferior (SIM_DESC sd, struct bfd *abfd, /* Read memory. */ =20 int -sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length) +sim_read (SIM_DESC sd, SIM_ADDR mem, void *buf, int length) { check_desc (sd); =20 @@ -221,7 +221,7 @@ sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf= , int length) /* Write memory. */ =20 int -sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length) +sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length) { check_desc (sd); =20 diff --git a/sim/rx/gdb-if.c b/sim/rx/gdb-if.c index ccc81c9756f..c116bdcf608 100644 --- a/sim/rx/gdb-if.c +++ b/sim/rx/gdb-if.c @@ -226,9 +226,10 @@ sim_create_inferior (SIM_DESC sd, struct bfd *abfd, } =20 int -sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length) +sim_read (SIM_DESC sd, SIM_ADDR mem, void *buffer, int length) { int i; + unsigned char *data =3D buffer; =20 check_desc (sd); =20 @@ -241,7 +242,7 @@ sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf= , int length) { bfd_vma addr =3D mem + i; int do_swap =3D addr_in_swap_list (addr); - buf[i] =3D mem_get_qi (addr ^ (do_swap ? 3 : 0)); + data[i] =3D mem_get_qi (addr ^ (do_swap ? 3 : 0)); =20 if (execution_error_get_last_error () !=3D SIM_ERR_NONE) return i; @@ -251,9 +252,10 @@ sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *bu= f, int length) } =20 int -sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length) +sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buffer, int length) { int i; + const unsigned char *data =3D buffer; =20 check_desc (sd); =20 @@ -263,7 +265,7 @@ sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned ch= ar *buf, int length) { bfd_vma addr =3D mem + i; int do_swap =3D addr_in_swap_list (addr); - mem_put_qi (addr ^ (do_swap ? 3 : 0), buf[i]); + mem_put_qi (addr ^ (do_swap ? 3 : 0), data[i]); =20 if (execution_error_get_last_error () !=3D SIM_ERR_NONE) return i; diff --git a/sim/sh/interp.c b/sim/sh/interp.c index b6f29880d74..6a33cce065a 100644 --- a/sim/sh/interp.c +++ b/sim/sh/interp.c @@ -1049,7 +1049,7 @@ trap (SIM_DESC sd, int i, int *regs, unsigned char *i= nsn_ptr, { /* Include the termination byte. */ int i =3D strlen (prog_argv[regs[5]]) + 1; - regs[0] =3D sim_write (0, regs[6], (void *) prog_argv[regs[5]], i); + regs[0] =3D sim_write (0, regs[6], prog_argv[regs[5]], i); } else regs[0] =3D -1; @@ -1874,29 +1874,31 @@ sim_resume (SIM_DESC sd, int step, int siggnal) } =20 int -sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int si= ze) +sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size) { int i; + const unsigned char *data =3D buffer; =20 init_pointers (); =20 for (i =3D 0; i < size; i++) { - saved_state.asregs.memory[(MMASKB & (addr + i)) ^ endianb] =3D buffe= r[i]; + saved_state.asregs.memory[(MMASKB & (addr + i)) ^ endianb] =3D data[= i]; } return size; } =20 int -sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size) +sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size) { int i; + unsigned char *data =3D buffer; =20 init_pointers (); =20 for (i =3D 0; i < size; i++) { - buffer[i] =3D saved_state.asregs.memory[(MMASKB & (addr + i)) ^ endi= anb]; + data[i] =3D saved_state.asregs.memory[(MMASKB & (addr + i)) ^ endian= b]; } return size; } diff --git a/sim/v850/simops.c b/sim/v850/simops.c index f90a0f7573c..573ece54ec7 100644 --- a/sim/v850/simops.c +++ b/sim/v850/simops.c @@ -398,7 +398,7 @@ fetch_str (SIM_DESC sd, address_word addr) nr++; =20 buf =3D NZALLOC (char, nr + 1); - sim_read (simulator, addr, (unsigned char *) buf, nr); + sim_read (simulator, addr, buf, nr); =20 return buf; } @@ -1692,7 +1692,7 @@ OP_10007E0 (void) { char *buf =3D zalloc (PARM3); RETVAL =3D sim_io_read (simulator, PARM1, buf, PARM3); - sim_write (simulator, PARM2, (unsigned char *) buf, PARM3); + sim_write (simulator, PARM2, buf, PARM3); free (buf); if ((int) RETVAL < 0) RETERR =3D sim_io_get_errno (simulator); @@ -1702,7 +1702,7 @@ OP_10007E0 (void) case TARGET_NEWLIB_V850_SYS_write: { char *buf =3D zalloc (PARM3); - sim_read (simulator, PARM2, (unsigned char *) buf, PARM3); + sim_read (simulator, PARM2, buf, PARM3); if (PARM1 =3D=3D 1) RETVAL =3D sim_io_write_stdout (simulator, buf, PARM3); else