From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1521) id ADBF13858D38; Sat, 5 Nov 2022 04:22:55 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org ADBF13858D38 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1667622175; bh=0bY0VMPmkqx41EN9etmaCdujUImcjOazssWffYgbfiU=; h=From:To:Subject:Date:From; b=MHDJHrZGuILyvkzmrbotHrNvVGfbDhZ0N277aNgsmOEd3GauK24EVRP/njI7zJ0eq ebIIhpI+cpeKVxb7p3Cq+Rtlh90DhqsnHfBTKHoV1LxghjQU0r06XF/olo6PYso5+k i8/+Bx2duf4s2bgvyYwgA7GT+AJ+r9IzAPQ636ik= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Frysinger To: gdb-cvs@sourceware.org Subject: [binutils-gdb] sim: cris: move rvdummy linking to top-level X-Act-Checkin: binutils-gdb X-Git-Author: Mike Frysinger X-Git-Refname: refs/heads/master X-Git-Oldrev: bfc96c1039d33b1ed0c8b2e1b6fb3859a693cfe9 X-Git-Newrev: cb9bdc02fdf1650341276861f6ca7e7a215a1ce6 Message-Id: <20221105042255.ADBF13858D38@sourceware.org> Date: Sat, 5 Nov 2022 04:22:55 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3Dcb9bdc02fdf1= 650341276861f6ca7e7a215a1ce6 commit cb9bdc02fdf1650341276861f6ca7e7a215a1ce6 Author: Mike Frysinger Date: Sat Nov 5 10:38:37 2022 +0700 sim: cris: move rvdummy linking to top-level =20 This is only used by `make check`, so we can move it out of the default build too. Diff: --- sim/Makefile.in | 113 +++++++++++++++++++++++++++++++----------------= ---- sim/cris/Makefile.in | 13 +----- sim/cris/local.mk | 7 ++++ 3 files changed, 77 insertions(+), 56 deletions(-) diff --git a/sim/Makefile.in b/sim/Makefile.in index 06d5da1ecf5..b9015b351e2 100644 --- a/sim/Makefile.in +++ b/sim/Makefile.in @@ -106,7 +106,7 @@ POST_UNINSTALL =3D : build_triplet =3D @build@ host_triplet =3D @host@ target_triplet =3D @target@ -check_PROGRAMS =3D $(am__EXEEXT_8) +check_PROGRAMS =3D $(am__EXEEXT_8) $(am__EXEEXT_9) EXTRA_PROGRAMS =3D $(am__EXEEXT_2) testsuite/common/bits-gen$(EXEEXT) \ testsuite/common/fpu-tst$(EXEEXT) $(am__EXEEXT_3) \ $(am__EXEEXT_4) $(am__EXEEXT_5) $(am__EXEEXT_6) \ @@ -129,39 +129,40 @@ TESTS =3D testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_cr16_TRUE@am__append_8 =3D $(cr16_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_cr16_TRUE@am__append_9 =3D cr16/gencode @SIM_ENABLE_ARCH_cr16_TRUE@am__append_10 =3D $(cr16_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_cris_TRUE@am__append_11 =3D $(cris_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_cris_TRUE@am__append_11 =3D cris/rvdummy @SIM_ENABLE_ARCH_cris_TRUE@am__append_12 =3D $(cris_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_13 =3D $(d10v_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_14 =3D d10v/gencode -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_15 =3D $(d10v_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_frv_TRUE@am__append_16 =3D $(frv_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_cris_TRUE@am__append_13 =3D $(cris_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_14 =3D $(d10v_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_15 =3D d10v/gencode +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_16 =3D $(d10v_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_frv_TRUE@am__append_17 =3D $(frv_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_18 =3D $(iq2000_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_frv_TRUE@am__append_18 =3D $(frv_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_19 =3D $(iq2000_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_20 =3D $(lm32_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_20 =3D $(iq2000_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_lm32_TRUE@am__append_21 =3D $(lm32_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_22 =3D $(m32c_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_23 =3D m32c/opc2c -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_24 =3D \ +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_22 =3D $(lm32_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_23 =3D $(m32c_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_24 =3D m32c/opc2c +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_25 =3D \ @SIM_ENABLE_ARCH_m32c_TRUE@ $(m32c_BUILD_OUTPUTS) \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c.log \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c.log =20 -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_25 =3D $(m32r_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_m32r_TRUE@am__append_26 =3D $(m32r_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_27 =3D $(m68hc11_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_28 =3D m68hc11/gencode -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_29 =3D $(m68hc11_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_30 =3D $(mn10300_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_27 =3D $(m32r_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_28 =3D $(m68hc11_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_29 =3D m68hc11/gencode +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_30 =3D $(m68hc11_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_31 =3D $(mn10300_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_moxie_TRUE@am__append_32 =3D moxie/$(am__dirstamp) -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_33 =3D $(or1k_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_32 =3D $(mn10300_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_moxie_TRUE@am__append_33 =3D moxie/$(am__dirstamp) @SIM_ENABLE_ARCH_or1k_TRUE@am__append_34 =3D $(or1k_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_sh_TRUE@am__append_35 =3D $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_sh_TRUE@am__append_36 =3D sh/gencode -@SIM_ENABLE_ARCH_sh_TRUE@am__append_37 =3D $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_v850_TRUE@am__append_38 =3D $(v850_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_35 =3D $(or1k_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_sh_TRUE@am__append_36 =3D $(sh_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_sh_TRUE@am__append_37 =3D sh/gencode +@SIM_ENABLE_ARCH_sh_TRUE@am__append_38 =3D $(sh_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_v850_TRUE@am__append_39 =3D $(v850_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_40 =3D $(v850_BUILD_OUTPUTS) subdir =3D . ACLOCAL_M4 =3D $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps =3D $(top_srcdir)/../config/acx.m4 \ @@ -267,6 +268,7 @@ am__EXEEXT_8 =3D testsuite/common/bits32m0$(EXEEXT) \ testsuite/common/bits64m0$(EXEEXT) \ testsuite/common/bits64m63$(EXEEXT) \ testsuite/common/alu-tst$(EXEEXT) +@SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_9 =3D cris/rvdummy$(EXEEXT) @SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_gencode_OBJECTS =3D \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/gencode.$(OBJEXT) cr16_gencode_OBJECTS =3D $(am_cr16_gencode_OBJECTS) @@ -276,6 +278,10 @@ AM_V_lt =3D $(am__v_lt_@AM_V@) am__v_lt_ =3D $(am__v_lt_@AM_DEFAULT_V@) am__v_lt_0 =3D --silent am__v_lt_1 =3D=20 +@SIM_ENABLE_ARCH_cris_TRUE@am_cris_rvdummy_OBJECTS =3D \ +@SIM_ENABLE_ARCH_cris_TRUE@ cris/rvdummy.$(OBJEXT) +cris_rvdummy_OBJECTS =3D $(am_cris_rvdummy_OBJECTS) +cris_rvdummy_DEPENDENCIES =3D @SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_gencode_OBJECTS =3D \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/gencode.$(OBJEXT) d10v_gencode_OBJECTS =3D $(am_d10v_gencode_OBJECTS) @@ -380,16 +386,16 @@ am__v_CCLD_ =3D $(am__v_CCLD_@AM_DEFAULT_V@) am__v_CCLD_0 =3D @echo " CCLD " $@; am__v_CCLD_1 =3D=20 SOURCES =3D $(common_libcommon_a_SOURCES) $(igen_libigen_a_SOURCES) \ - $(cr16_gencode_SOURCES) $(d10v_gencode_SOURCES) \ - $(igen_filter_SOURCES) $(igen_gen_SOURCES) \ - $(igen_igen_SOURCES) $(igen_ld_cache_SOURCES) \ - $(igen_ld_decode_SOURCES) $(igen_ld_insn_SOURCES) \ - $(igen_table_SOURCES) $(m32c_opc2c_SOURCES) \ - $(m68hc11_gencode_SOURCES) $(sh_gencode_SOURCES) \ - testsuite/common/alu-tst.c testsuite/common/bits-gen.c \ - testsuite/common/bits32m0.c testsuite/common/bits32m31.c \ - testsuite/common/bits64m0.c testsuite/common/bits64m63.c \ - testsuite/common/fpu-tst.c + $(cr16_gencode_SOURCES) $(cris_rvdummy_SOURCES) \ + $(d10v_gencode_SOURCES) $(igen_filter_SOURCES) \ + $(igen_gen_SOURCES) $(igen_igen_SOURCES) \ + $(igen_ld_cache_SOURCES) $(igen_ld_decode_SOURCES) \ + $(igen_ld_insn_SOURCES) $(igen_table_SOURCES) \ + $(m32c_opc2c_SOURCES) $(m68hc11_gencode_SOURCES) \ + $(sh_gencode_SOURCES) testsuite/common/alu-tst.c \ + testsuite/common/bits-gen.c testsuite/common/bits32m0.c \ + testsuite/common/bits32m31.c testsuite/common/bits64m0.c \ + testsuite/common/bits64m63.c testsuite/common/fpu-tst.c RECURSIVE_TARGETS =3D all-recursive check-recursive cscopelist-recursive \ ctags-recursive dvi-recursive html-recursive info-recursive \ install-data-recursive install-dvi-recursive \ @@ -915,13 +921,13 @@ CLEANFILES =3D common/version.c common/version.c-stam= p \ testsuite/common/bits-gen testsuite/common/bits32m0.c \ testsuite/common/bits32m31.c testsuite/common/bits64m0.c \ testsuite/common/bits64m63.c -DISTCLEANFILES =3D $(am__append_32) +DISTCLEANFILES =3D $(am__append_33) MOSTLYCLEANFILES =3D core $(am__append_5) site-sim-config.exp \ testrun.log testrun.sum $(am__append_7) $(am__append_10) \ - $(am__append_12) $(am__append_15) $(am__append_17) \ - $(am__append_19) $(am__append_21) $(am__append_24) \ - $(am__append_26) $(am__append_29) $(am__append_31) \ - $(am__append_34) $(am__append_37) $(am__append_39) + $(am__append_13) $(am__append_16) $(am__append_18) \ + $(am__append_20) $(am__append_22) $(am__append_25) \ + $(am__append_27) $(am__append_30) $(am__append_32) \ + $(am__append_35) $(am__append_38) $(am__append_40) AM_CFLAGS =3D $(WERROR_CFLAGS) $(WARN_CFLAGS) AM_CPPFLAGS =3D $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \ $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \ @@ -931,11 +937,11 @@ AM_CPPFLAGS_FOR_BUILD =3D -I$(srcroot)/include $(SIM_= HW_CFLAGS) \ COMPILE_FOR_BUILD =3D $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_= FOR_BUILD) $(CFLAGS_FOR_BUILD) LINK_FOR_BUILD =3D $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD= ) -o $@ SIM_ALL_RECURSIVE_DEPS =3D common/libcommon.a $(am__append_2) \ - $(am__append_6) $(am__append_8) $(am__append_11) \ - $(am__append_13) $(am__append_16) $(am__append_18) \ - $(am__append_20) $(am__append_22) $(am__append_25) \ - $(am__append_27) $(am__append_30) $(am__append_33) \ - $(am__append_35) $(am__append_38) + $(am__append_6) $(am__append_8) $(am__append_12) \ + $(am__append_14) $(am__append_17) $(am__append_19) \ + $(am__append_21) $(am__append_23) $(am__append_26) \ + $(am__append_28) $(am__append_31) $(am__append_34) \ + $(am__append_36) $(am__append_39) common_libcommon_a_SOURCES =3D \ common/callback.c \ common/portability.c \ @@ -1028,6 +1034,8 @@ testsuite_common_CPPFLAGS =3D \ =20 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES =3D cr16/gencode.c @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD =3D cr16/cr16-opc.o +@SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES =3D cris/rvdummy.c +@SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD =3D $(LIBIBERTY_LIB) @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS =3D \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv10.h \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv10f.c \ @@ -1413,6 +1421,18 @@ cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \ @SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS)= $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am_= _dirstamp) @SIM_ENABLE_ARCH_cr16_FALSE@ @rm -f cr16/gencode$(EXEEXT) @SIM_ENABLE_ARCH_cr16_FALSE@ $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $= (cr16_gencode_LDADD) $(LIBS) +cris/$(am__dirstamp): + @$(MKDIR_P) cris + @: > cris/$(am__dirstamp) +cris/$(DEPDIR)/$(am__dirstamp): + @$(MKDIR_P) cris/$(DEPDIR) + @: > cris/$(DEPDIR)/$(am__dirstamp) +cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \ + cris/$(DEPDIR)/$(am__dirstamp) + +cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES= ) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp) + @rm -f cris/rvdummy$(EXEEXT) + $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS) d10v/$(am__dirstamp): @$(MKDIR_P) d10v @: > d10v/$(am__dirstamp) @@ -1517,6 +1537,7 @@ mostlyclean-compile: -rm -f *.$(OBJEXT) -rm -f common/*.$(OBJEXT) -rm -f cr16/*.$(OBJEXT) + -rm -f cris/*.$(OBJEXT) -rm -f d10v/*.$(OBJEXT) -rm -f igen/*.$(OBJEXT) -rm -f m32c/*.$(OBJEXT) @@ -1537,6 +1558,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-syscal= l.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/version.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@cr16/$(DEPDIR)/gencode.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@cris/$(DEPDIR)/rvdummy.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@d10v/$(DEPDIR)/gencode.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/filter.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/filter_host.Po@am__quo= te@ @@ -1596,6 +1618,7 @@ mostlyclean-libtool: clean-libtool: -rm -rf .libs _libs -rm -rf cr16/.libs cr16/_libs + -rm -rf cris/.libs cris/_libs -rm -rf d10v/.libs d10v/_libs -rm -rf igen/.libs igen/_libs -rm -rf m32c/.libs m32c/_libs @@ -2147,6 +2170,8 @@ distclean-generic: -rm -f common/$(am__dirstamp) -rm -f cr16/$(DEPDIR)/$(am__dirstamp) -rm -f cr16/$(am__dirstamp) + -rm -f cris/$(DEPDIR)/$(am__dirstamp) + -rm -f cris/$(am__dirstamp) -rm -f d10v/$(DEPDIR)/$(am__dirstamp) -rm -f d10v/$(am__dirstamp) -rm -f igen/$(DEPDIR)/$(am__dirstamp) @@ -2171,7 +2196,7 @@ clean-am: clean-checkPROGRAMS clean-generic clean-lib= tool \ =20 distclean: distclean-recursive -rm -f $(am__CONFIG_DISTCLEAN_FILES) - -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) d10v/$(DEPDIR) igen/$(DEPDIR) m32= c/$(DEPDIR) m68hc11/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR) + -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) ige= n/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) sh/$(DEPDIR) testsuite/common/= $(DEPDIR) -rm -f Makefile distclean-am: clean-am distclean-DEJAGNU distclean-compile \ distclean-generic distclean-hdr distclean-libtool \ @@ -2222,7 +2247,7 @@ installcheck-am: maintainer-clean: maintainer-clean-recursive -rm -f $(am__CONFIG_DISTCLEAN_FILES) -rm -rf $(top_srcdir)/autom4te.cache - -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) d10v/$(DEPDIR) igen/$(DEPDIR) m32= c/$(DEPDIR) m68hc11/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR) + -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) ige= n/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) sh/$(DEPDIR) testsuite/common/= $(DEPDIR) -rm -f Makefile maintainer-clean-am: distclean-am maintainer-clean-generic =20 diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in index 7b69c114d92..3474eb9a827 100644 --- a/sim/cris/Makefile.in +++ b/sim/cris/Makefile.in @@ -39,20 +39,9 @@ SIM_EXTRA_CLEAN =3D cris-clean =20 arch =3D cris =20 -# rvdummy is just used for testing. It does nothing if -# --enable-sim-hardware isn't active. - -all: rvdummy$(EXEEXT) - -check: rvdummy$(EXEEXT) - -rvdummy$(EXEEXT): rvdummy.o $(EXTRA_LIBDEPS) - $(ECHO_CCLD) $(LIBTOOL) $(AM_V_lt) --tag=3DCC --mode=3Dlink \ - $(CC) $(ALL_CFLAGS) -o rvdummy$(EXEEXT) rvdummy.o $(EXTRA_LIBS) - cris-clean: -rm -f stamp-arch - -rm -f tmp-* rvdummy$(EXEEXT) + -rm -f tmp-* =20 # Useful when making CGEN-generated files manually, without --enable-cgen-= maint. stamps: stamp-arch stamp-v10fcpu stamp-v32fcpu diff --git a/sim/cris/local.mk b/sim/cris/local.mk index 9416b7e8c01..62a3f8e80ab 100644 --- a/sim/cris/local.mk +++ b/sim/cris/local.mk @@ -16,6 +16,13 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 +## rvdummy is just used for testing -- it runs on the same host as `run`. +## It does nothing if --enable-sim-hardware isn't active. +%C%_rvdummy_SOURCES =3D %D%/rvdummy.c +%C%_rvdummy_LDADD =3D $(LIBIBERTY_LIB) + +check_PROGRAMS +=3D %D%/rvdummy + %C%_BUILD_OUTPUTS =3D \ %D%/engv10.h \ %D%/mloopv10f.c \