From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1521) id 1E4273858C2B; Tue, 8 Nov 2022 07:56:52 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1E4273858C2B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1667894212; bh=hZC8DY8q8ah86CdjZofUh7yRvQv4d33U2raWdMonPcY=; h=From:To:Subject:Date:From; b=aoCTqxFtsMBReywgdQp9FD7LvHeklcL5hpHrY88pTKuXyvoGAt9BiAI+NaMpyGpgM F86/H40D8On5yBJwVheuB4Mr7GLNU4y3gowXohka0jUwcDK5Zkw28HYf0v3kvsMSPC fyNkhtdyBCDoxnbGKAV7ZeMiUWaO/9MWbdjmZ0zo= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Frysinger To: gdb-cvs@sourceware.org Subject: [binutils-gdb] sim: mips: call Unpredictable instead of setting bogus values [PR sim/29276] X-Act-Checkin: binutils-gdb X-Git-Author: Mike Frysinger X-Git-Refname: refs/heads/master X-Git-Oldrev: 195064c8da5a86a602d6312c5ad31b2bdb3721f9 X-Git-Newrev: 2756004fe78954754946b61d3f6338d8b72b8332 Message-Id: <20221108075652.1E4273858C2B@sourceware.org> Date: Tue, 8 Nov 2022 07:56:52 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D2756004fe789= 54754946b61d3f6338d8b72b8332 commit 2756004fe78954754946b61d3f6338d8b72b8332 Author: Mike Frysinger Date: Fri Nov 4 07:38:20 2022 +0700 sim: mips: call Unpredictable instead of setting bogus values [PR sim/2= 9276] =20 The intention of this code seems to be to indicate that this insn should not be used and produces undefined behavior, so instead of setting registers to bogus values, call Unpredictable. This fixes build warnings due to 32-bit/64-bit type conversions, and outputs a log message for users at runtime instead of silent corruption. =20 Bug: https://sourceware.org/PR29276 Diff: --- sim/mips/mips.igen | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen index dfad4227615..0746a52d5ab 100644 --- a/sim/mips/mips.igen +++ b/sim/mips/mips.igen @@ -1450,7 +1450,7 @@ else if ((fs & 0x1) =3D=3D 0) GPR[rt] =3D SET64HI (FGR[fs+1]) | FGR[fs]; else - GPR[rt] =3D SET64HI (0xDEADC0DE) | 0xBAD0BAD0; + Unpredictable (); TRACE_ALU_RESULT (GPR[rt]); } =20 @@ -5782,7 +5782,7 @@ else if ((FS & 0x1) =3D=3D 0) v =3D SET64HI (FGR[FS+1]) | FGR[FS]; else - v =3D SET64HI (0xDEADC0DE) | 0xBAD0BAD0; + Unpredictable (); PENDING_FILL (RT, v); TRACE_ALU_RESULT (v); }