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From: Michael Frysinger <vapier@sourceware.org>
To: gdb-cvs@sourceware.org
Subject: [binutils-gdb] sim: v850: rename v850.dc to align with other ports
Date: Thu, 10 Nov 2022 18:43:58 +0000 (GMT) [thread overview]
Message-ID: <20221110184358.BC8EA3858298@sourceware.org> (raw)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=897fc27b25fe24167ce80b56e97f61d14140b6b1
commit 897fc27b25fe24167ce80b56e97f61d14140b6b1
Author: Mike Frysinger <vapier@gentoo.org>
Date: Fri Nov 11 00:58:59 2022 +0700
sim: v850: rename v850.dc to align with other ports
Other arches use the .dc extension for the instruction decode table.
Diff:
---
sim/Makefile.in | 2 +-
sim/v850/local.mk | 2 +-
sim/v850/{v850-dc => v850.dc} | 0
3 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/sim/Makefile.in b/sim/Makefile.in
index 8eece9224ee..84c48c5b72c 100644
--- a/sim/Makefile.in
+++ b/sim/Makefile.in
@@ -1628,7 +1628,7 @@ testsuite_common_CPPFLAGS = \
@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
-@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850-dc
+@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
all: config.h
$(MAKE) $(AM_MAKEFLAGS) all-recursive
diff --git a/sim/v850/local.mk b/sim/v850/local.mk
index 367ca6ef1f4..f5d47882dce 100644
--- a/sim/v850/local.mk
+++ b/sim/v850/local.mk
@@ -51,7 +51,7 @@ $(%C%_BUILT_SRC_FROM_IGEN): %D%/stamp-igen
%C%_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
%C%_IGEN_INSN = $(srcdir)/%D%/v850.igen
-%C%_IGEN_DC = $(srcdir)/%D%/v850-dc
+%C%_IGEN_DC = $(srcdir)/%D%/v850.dc
%D%/stamp-igen: $(%C%_IGEN_INSN) $(%C%_IGEN_DC) $(IGEN)
$(AM_V_GEN)$(IGEN_RUN) \
$(%C%_IGEN_TRACE) \
diff --git a/sim/v850/v850-dc b/sim/v850/v850.dc
similarity index 100%
rename from sim/v850/v850-dc
rename to sim/v850/v850.dc
reply other threads:[~2022-11-10 18:43 UTC|newest]
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