From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7897) id A9CBC3852C67; Wed, 23 Nov 2022 13:20:29 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A9CBC3852C67 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1669209629; bh=QpQ7foL0db10ynwrqYYcKszuMcuDw2jWnZHVYQPd5xU=; h=From:To:Subject:Date:From; b=EALnrzmJ5X50Pp8mayh9hax+27Mj7KyxqrLh3k6c7KkmTlF6qzj5cnnA4QHH+quAc tnbygk57mMxCe7l2s0AHMDYDAPwMAE20lWmfKpvpaUKaBBmjRZG+YriTY2Q1Cf8uav ydc3Zy1/l+o2QbN1f8dbOKpyAJx3knUdLYsIDARQ= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Torbjorn Svensson To: gdb-cvs@sourceware.org Subject: [binutils-gdb] gdb/arm: Include FType bit in EXC_RETURN pattern on v8m X-Act-Checkin: binutils-gdb X-Git-Author: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= X-Git-Refname: refs/heads/master X-Git-Oldrev: 9bd83c444e3c73ee44cd9e9ec6f7d94940e467f1 X-Git-Newrev: 8db533e7d6d28db1be0ae4c95ddea7aa3a6224c8 Message-Id: <20221123132029.A9CBC3852C67@sourceware.org> Date: Wed, 23 Nov 2022 13:20:29 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D8db533e7d6d2= 8db1be0ae4c95ddea7aa3a6224c8 commit 8db533e7d6d28db1be0ae4c95ddea7aa3a6224c8 Author: Torbj=C3=B6rn SVENSSON Date: Wed Nov 23 11:58:31 2022 +0100 gdb/arm: Include FType bit in EXC_RETURN pattern on v8m =20 For v8m, the EXC_RETURN pattern, without security extension, consists of FType, Mode and SPSEL. These are the same bits that are used in v7m. This patch extends the list of patterns to include also the FType bit and not just Mode and SPSEL bits for v8m targets without security extension. =20 Signed-off-by: Torbj=C3=B6rn SVENSSON Diff: --- gdb/arm-tdep.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index a839f957440..6f02f04b5cb 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -828,13 +828,17 @@ arm_m_addr_is_lockup (CORE_ADDR addr) For more details see "B1.5.8 Exception return behavior" in both ARMv6-M and ARMv7-M Architecture Reference Manuals. =20 - In the ARMv8-M Architecture Technical Reference also adds - for implementations without the Security Extension: + From ARMv8-M Architecture Technical Reference, D1.2.95 + FType, Mode and SPSEL bits are to be considered when the Security + Extension is not implemented. =20 - EXC_RETURN Condition - 0xFFFFFFB0 Return to Handler mode. - 0xFFFFFFB8 Return to Thread mode using the main stack. - 0xFFFFFFBC Return to Thread mode using the process stack. */ + EXC_RETURN Return To Return Stack Frame Type + 0xFFFFFFA0 Handler mode Main Extended + 0xFFFFFFA8 Thread mode Main Extended + 0xFFFFFFAC Thread mode Process Extended + 0xFFFFFFB0 Handler mode Main Standard + 0xFFFFFFB8 Thread mode Main Standard + 0xFFFFFFBC Thread mode Process Standard */ =20 static int arm_m_addr_is_magic (struct gdbarch *gdbarch, CORE_ADDR addr) @@ -859,6 +863,9 @@ arm_m_addr_is_magic (struct gdbarch *gdbarch, CORE_ADDR= addr) switch (addr) { /* Values from ARMv8-M Architecture Technical Reference. */ + case 0xffffffa0: + case 0xffffffa8: + case 0xffffffac: case 0xffffffb0: case 0xffffffb8: case 0xffffffbc: