From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1521) id 0CE203857C43; Fri, 23 Dec 2022 13:40:13 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 0CE203857C43 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1671802813; bh=j2etl416v9Ea3UBaJqG58zxl5wGPd4soFZRXnP+UAWQ=; h=From:To:Subject:Date:From; b=k6bDo/TRB9LZ/Qtcmg2fTKOZqLY7eGdQPPEqmaXkkyaNUfa7s0U/GRYYEIhD1SHH5 zgTToWBgaPF29P/Ny0knCTYR9T3WJVYafF//6JhdR9D4GrFyH8f7QQsX9pSYg9K/kZ wP9EtNm7UMr5BucpQxrzugQZ3O8c3DMcmORTg9d8= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Frysinger To: gdb-cvs@sourceware.org Subject: [binutils-gdb] sim: microblaze: move arch-specific settings to internal header X-Act-Checkin: binutils-gdb X-Git-Author: Mike Frysinger X-Git-Refname: refs/heads/master X-Git-Oldrev: ca6fd350844c81c64cd145e50823bc806d446935 X-Git-Newrev: 7790fabeb76850df5ffa36577a8a5cf40541fc37 Message-Id: <20221223134013.0CE203857C43@sourceware.org> Date: Fri, 23 Dec 2022 13:40:13 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D7790fabeb768= 50df5ffa36577a8a5cf40541fc37 commit 7790fabeb76850df5ffa36577a8a5cf40541fc37 Author: Mike Frysinger Date: Thu Dec 22 23:29:21 2022 -0500 sim: microblaze: move arch-specific settings to internal header =20 There's no need for these settings to be in sim-main.h which is shared with common/ sim code, so move it all out to a new header which only this port will include. Diff: --- sim/microblaze/interp.c | 1 + sim/microblaze/microblaze-sim.h | 46 +++++++++++++++++++++++++++++++++++++= ++++ sim/microblaze/sim-main.h | 24 --------------------- 3 files changed, 47 insertions(+), 24 deletions(-) diff --git a/sim/microblaze/interp.c b/sim/microblaze/interp.c index 3d7fde0af3e..8a8cb9f2b83 100644 --- a/sim/microblaze/interp.c +++ b/sim/microblaze/interp.c @@ -33,6 +33,7 @@ #include "sim-signal.h" #include "sim-syscall.h" =20 +#include "microblaze-sim.h" #include "microblaze-dis.h" =20 #define target_big_endian (CURRENT_TARGET_BYTE_ORDER =3D=3D BFD_ENDIAN_BIG) diff --git a/sim/microblaze/microblaze-sim.h b/sim/microblaze/microblaze-si= m.h new file mode 100644 index 00000000000..9e5fb0711c5 --- /dev/null +++ b/sim/microblaze/microblaze-sim.h @@ -0,0 +1,46 @@ +/* Copyright 2009-2022 Free Software Foundation, Inc. + + This file is part of the Xilinx MicroBlaze simulator. + + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see . */ + +#ifndef MICROBLAZE_SIM_H +#define MICROBLAZE_SIM_H + +#include "microblaze.h" + +/* The machine state. + This state is maintained in host byte order. The + fetch/store register functions must translate between host + byte order and the target processor byte order. + Keeping this data in target byte order simplifies the register + read/write functions. Keeping this data in native order improves + the performance of the simulator. Simulation speed is deemed more + important. */ + +/* The ordering of the microblaze_regset structure is matched in the + gdb/config/microblaze/tm-microblaze.h file in the REGISTER_NAMES macro.= */ + struct microblaze_regset +{ + signed_4 regs[32]; /* primary registers */ + signed_4 spregs[2]; /* pc + msr */ + int cycles; + int insts; + unsigned_1 imm_enable; + signed_2 imm_high; +}; + +#define MICROBLAZE_SIM_CPU(cpu) ((struct microblaze_regset *) CPU_ARCH_DAT= A (cpu)) + +#endif /* MICROBLAZE_SIM_H */ diff --git a/sim/microblaze/sim-main.h b/sim/microblaze/sim-main.h index 160f10156ff..7646dad044f 100644 --- a/sim/microblaze/sim-main.h +++ b/sim/microblaze/sim-main.h @@ -18,31 +18,7 @@ #ifndef MICROBLAZE_SIM_MAIN #define MICROBLAZE_SIM_MAIN =20 -#include "microblaze.h" #include "sim-basics.h" #include "sim-base.h" =20 -/* The machine state. - This state is maintained in host byte order. The - fetch/store register functions must translate between host - byte order and the target processor byte order. - Keeping this data in target byte order simplifies the register - read/write functions. Keeping this data in native order improves - the performance of the simulator. Simulation speed is deemed more - important. */ - -/* The ordering of the microblaze_regset structure is matched in the - gdb/config/microblaze/tm-microblaze.h file in the REGISTER_NAMES macro.= */ - struct microblaze_regset -{ - signed_4 regs[32]; /* primary registers */ - signed_4 spregs[2]; /* pc + msr */ - int cycles; - int insts; - unsigned_1 imm_enable; - signed_2 imm_high; -}; - -#define MICROBLAZE_SIM_CPU(cpu) ((struct microblaze_regset *) CPU_ARCH_DAT= A (cpu)) - #endif /* MICROBLAZE_SIM_MAIN */