From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1521) id 462313857C45; Fri, 23 Dec 2022 13:40:28 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 462313857C45 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1671802828; bh=U1iKsNAme64X4hP4krod+C1KOSnfxSzHYx7Oe701CIs=; h=From:To:Subject:Date:From; b=ZoPkp84UYr9fyOE7S8mplogAmlGLqbA0m1Gl/u26lkPHgphmBMWfOj0T4rFxDDHph +UBxFjx3ti8/pBLX7nf/CUAa+7RXLlVlqaJ3mtWBr6h5aV7pKLCFUFqvo8yQ0IVIuF 04r+WMwTUPXmFznsYPrPSnZPv2roER9TM1ATj3/0= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Frysinger To: gdb-cvs@sourceware.org Subject: [binutils-gdb] sim: h8300: move arch-specific settings to internal header X-Act-Checkin: binutils-gdb X-Git-Author: Mike Frysinger X-Git-Refname: refs/heads/master X-Git-Oldrev: 2a91447ab87a8dc8432ef37d4647c8ac9935a03d X-Git-Newrev: 758f5a9875a0f5568f62f4a528674e2cbed775c4 Message-Id: <20221223134028.462313857C45@sourceware.org> Date: Fri, 23 Dec 2022 13:40:28 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D758f5a9875a0= f5568f62f4a528674e2cbed775c4 commit 758f5a9875a0f5568f62f4a528674e2cbed775c4 Author: Mike Frysinger Date: Thu Dec 22 23:56:19 2022 -0500 sim: h8300: move arch-specific settings to internal header =20 There's no need for these settings to be in sim-main.h which is shared with common/ sim code, so move it all out to a new header which only this port will include. Diff: --- sim/h8300/compile.c | 2 + sim/h8300/h8300-sim.h | 153 ++++++++++++++++++++++++++++++++++++++++++++++= ++++ sim/h8300/sim-main.h | 147 ----------------------------------------------= -- 3 files changed, 155 insertions(+), 147 deletions(-) diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c index 077bc6dff09..cc8b52c5d65 100644 --- a/sim/h8300/compile.c +++ b/sim/h8300/compile.c @@ -36,6 +36,8 @@ #include "sim-signal.h" #include "sim/callback.h" =20 +#include "h8300-sim.h" + #ifndef SIGTRAP # define SIGTRAP 5 #endif diff --git a/sim/h8300/h8300-sim.h b/sim/h8300/h8300-sim.h new file mode 100644 index 00000000000..a6bea633d24 --- /dev/null +++ b/sim/h8300/h8300-sim.h @@ -0,0 +1,153 @@ +/* Main header for the Hitachi h8/300 architecture. */ + +#ifndef H8300_SIM_H +#define H8300_SIM_H + +#define DEBUG + +/* These define the size of main memory for the simulator. + + Note the size of main memory for the H8/300H is only 256k. Keeping it + small makes the simulator run much faster and consume less memory. + + The linker knows about the limited size of the simulator's main memory + on the H8/300H (via the h8300h.sc linker script). So if you change + H8300H_MSIZE, be sure to fix the linker script too. + + Also note that there's a separate "eightbit" area aside from main + memory. For simplicity, the simulator assumes any data memory reference + outside of main memory refers to the eightbit area (in theory, this + can only happen when simulating H8/300H programs). We make no attempt + to catch overlapping addresses, wrapped addresses, etc etc. */ + +#define H8300_MSIZE (1 << 16) + +/* avolkov: + Next 2 macros are ugly for any workstation, but while they're work. + Memory size MUST be configurable. */ +#define H8300H_MSIZE (1 << 24) +#define H8300S_MSIZE (1 << 24) + +#define CSIZE 1024 + +enum h8_regnum { + R0_REGNUM =3D 0, + R1_REGNUM =3D 1, + R2_REGNUM =3D 2, + R3_REGNUM =3D 3, + R4_REGNUM =3D 4, + R5_REGNUM =3D 5, + R6_REGNUM =3D 6, + R7_REGNUM =3D 7, + + SP_REGNUM =3D R7_REGNUM, /* Contains address of top of stack */ + FP_REGNUM =3D R6_REGNUM, /* Contains address of executing + stack frame */ + CCR_REGNUM =3D 8, /* Contains processor status */ + PC_REGNUM =3D 9, /* Contains program counter */ + CYCLE_REGNUM =3D 10, + EXR_REGNUM =3D 11, + INST_REGNUM =3D 12, + TICK_REGNUM =3D 13, + MACH_REGNUM =3D 14, + MACL_REGNUM =3D 15, + SBR_REGNUM =3D 16, + VBR_REGNUM =3D 17, + + ZERO_REGNUM =3D 18 +}; + +enum h8_typecodes { + OP_NULL, + OP_REG, /* Register direct. */ + OP_LOWREG, /* Special reg syntax for "bra". */ + OP_DISP, /* Register indirect w/displacement. */ + /* Note: h8300, h8300h, and h8300s permit only pre-decr and post-incr. = */ + OP_PREDEC, /* Register indirect w/pre-decrement. */ + OP_POSTDEC, /* Register indirect w/post-decrement. */ + OP_PREINC, /* Register indirect w/pre-increment. */ + OP_POSTINC, /* Register indirect w/post-increment. */ + OP_PCREL, /* PC Relative. */ + OP_MEM, /* Absolute memory address. */ + OP_CCR, /* Condition Code Register. */ + OP_IMM, /* Immediate value. */ + /*OP_ABS*/ /* Un-used (duplicates op_mem?). */ + OP_EXR, /* EXtended control Register. */ + OP_SBR, /* Vector Base Register. */ + OP_VBR, /* Short-address Base Register. */ + OP_MACH, /* Multiply Accumulator - high. */ + OP_MACL, /* Multiply Accumulator - low. */ + /* FIXME: memory indirect? */ + OP_INDEXB, /* Byte index mode */ + OP_INDEXW, /* Word index mode */ + OP_INDEXL, /* Long index mode */ + OP_REG_DEC, /* Register direct. affect address decrement. */ + OP_REG_INC, /* Register direct. affect address increment. */ +}; + +/* Structure used to describe addressing */ + +typedef struct +{ + int type; + int reg; + int literal; +} ea_type; + +/* Struct for instruction decoder. */ +typedef struct +{ + ea_type src; + ea_type dst; + ea_type op3; + int opcode; + int next_pc; + int oldpc; + int cycles; +#ifdef DEBUG + struct h8_opcode *op; +#endif +} decoded_inst; + +struct h8300_sim_cpu { + unsigned int regs[20]; /* 8 GR's plus ZERO, SBR, and VBR. */ + unsigned int pc; + + int macS; /* MAC Saturating mode */ + int macV; /* MAC Overflow */ + int macN; /* MAC Negative */ + int macZ; /* MAC Zero */ + + int delayed_branch; + char **command_line; /* Pointer to command line arguments. */ + + unsigned char *memory; + int mask; +}; +#define H8300_SIM_CPU(sd) ((struct h8300_sim_cpu *) CPU_ARCH_DATA (sd)) + +struct h8300_sim_state { + unsigned long memory_size; +#ifdef ADEBUG + int stats[O_LAST]; +#endif +}; +#define H8300_SIM_STATE(sd) ((struct h8300_sim_state *) STATE_ARCH_DATA (s= d)) + +/* The current state of the processor; registers, memory, etc. */ + +#define cpu_set_pc(cpu, val) (H8300_SIM_CPU (cpu)->pc =3D (val)) +#define cpu_get_pc(cpu) (H8300_SIM_CPU (cpu)->pc) + +/* Magic numbers used to distinguish an exit from a breakpoint. */ +#define LIBC_EXIT_MAGIC1 0xdead +#define LIBC_EXIT_MAGIC2 0xbeef +/* Local version of macros for decoding exit status. + (included here rather than try to find target version of wait.h) +*/ +#define SIM_WIFEXITED(V) (((V) & 0xff) =3D=3D 0) +#define SIM_WIFSTOPPED(V) (!SIM_WIFEXITED (V)) +#define SIM_WEXITSTATUS(V) (((V) >> 8) & 0xff) +#define SIM_WSTOPSIG(V) ((V) & 0x7f) + +#endif /* H8300_SIM_H */ diff --git a/sim/h8300/sim-main.h b/sim/h8300/sim-main.h index c034699e5c5..003e19ce512 100644 --- a/sim/h8300/sim-main.h +++ b/sim/h8300/sim-main.h @@ -3,154 +3,7 @@ #ifndef SIM_MAIN_H #define SIM_MAIN_H =20 -#define DEBUG - -/* These define the size of main memory for the simulator. - - Note the size of main memory for the H8/300H is only 256k. Keeping it - small makes the simulator run much faster and consume less memory. - - The linker knows about the limited size of the simulator's main memory - on the H8/300H (via the h8300h.sc linker script). So if you change - H8300H_MSIZE, be sure to fix the linker script too. - - Also note that there's a separate "eightbit" area aside from main - memory. For simplicity, the simulator assumes any data memory reference - outside of main memory refers to the eightbit area (in theory, this - can only happen when simulating H8/300H programs). We make no attempt - to catch overlapping addresses, wrapped addresses, etc etc. */ - -#define H8300_MSIZE (1 << 16) - -/* avolkov:=20 - Next 2 macros are ugly for any workstation, but while they're work. - Memory size MUST be configurable. */ -#define H8300H_MSIZE (1 << 24)=20 -#define H8300S_MSIZE (1 << 24)=20 - -#define CSIZE 1024 - -enum h8_regnum { - R0_REGNUM =3D 0, - R1_REGNUM =3D 1, - R2_REGNUM =3D 2, - R3_REGNUM =3D 3, - R4_REGNUM =3D 4, - R5_REGNUM =3D 5, - R6_REGNUM =3D 6, - R7_REGNUM =3D 7, - - SP_REGNUM =3D R7_REGNUM, /* Contains address of top of stack */ - FP_REGNUM =3D R6_REGNUM, /* Contains address of executing - stack frame */ - CCR_REGNUM =3D 8, /* Contains processor status */ - PC_REGNUM =3D 9, /* Contains program counter */ - CYCLE_REGNUM =3D 10, - EXR_REGNUM =3D 11, - INST_REGNUM =3D 12, - TICK_REGNUM =3D 13, - MACH_REGNUM =3D 14, - MACL_REGNUM =3D 15, - SBR_REGNUM =3D 16, - VBR_REGNUM =3D 17, - - ZERO_REGNUM =3D 18 -}; - -enum h8_typecodes { - OP_NULL, - OP_REG, /* Register direct. */ - OP_LOWREG, /* Special reg syntax for "bra". */ - OP_DISP, /* Register indirect w/displacement. */ - /* Note: h8300, h8300h, and h8300s permit only pre-decr and post-incr. = */ - OP_PREDEC, /* Register indirect w/pre-decrement. */ - OP_POSTDEC, /* Register indirect w/post-decrement. */ - OP_PREINC, /* Register indirect w/pre-increment. */ - OP_POSTINC, /* Register indirect w/post-increment. */ - OP_PCREL, /* PC Relative. */ - OP_MEM, /* Absolute memory address. */ - OP_CCR, /* Condition Code Register. */ - OP_IMM, /* Immediate value. */ - /*OP_ABS*/ /* Un-used (duplicates op_mem?). */ - OP_EXR, /* EXtended control Register. */ - OP_SBR, /* Vector Base Register. */ - OP_VBR, /* Short-address Base Register. */ - OP_MACH, /* Multiply Accumulator - high. */ - OP_MACL, /* Multiply Accumulator - low. */ - /* FIXME: memory indirect? */ - OP_INDEXB, /* Byte index mode */ - OP_INDEXW, /* Word index mode */ - OP_INDEXL, /* Long index mode */ - OP_REG_DEC, /* Register direct. affect address decrement. */ - OP_REG_INC, /* Register direct. affect address increment. */ -}; - #include "sim-basics.h" #include "sim-base.h" =20 -/* Structure used to describe addressing */ - -typedef struct -{ - int type; - int reg; - int literal; -} ea_type; - -/* Struct for instruction decoder. */ -typedef struct -{ - ea_type src; - ea_type dst; - ea_type op3; - int opcode; - int next_pc; - int oldpc; - int cycles; -#ifdef DEBUG - struct h8_opcode *op; -#endif -} decoded_inst; - -struct h8300_sim_cpu { - unsigned int regs[20]; /* 8 GR's plus ZERO, SBR, and VBR. */ - unsigned int pc; - - int macS; /* MAC Saturating mode */ - int macV; /* MAC Overflow */ - int macN; /* MAC Negative */ - int macZ; /* MAC Zero */ - - int delayed_branch; - char **command_line; /* Pointer to command line arguments. */ - - unsigned char *memory; - int mask; -}; -#define H8300_SIM_CPU(sd) ((struct h8300_sim_cpu *) CPU_ARCH_DATA (sd)) - -struct h8300_sim_state { - unsigned long memory_size; -#ifdef ADEBUG - int stats[O_LAST]; -#endif -}; -#define H8300_SIM_STATE(sd) ((struct h8300_sim_state *) STATE_ARCH_DATA (s= d)) - -/* The current state of the processor; registers, memory, etc. */ - -#define cpu_set_pc(cpu, val) (H8300_SIM_CPU (cpu)->pc =3D (val)) -#define cpu_get_pc(cpu) (H8300_SIM_CPU (cpu)->pc) - -/* Magic numbers used to distinguish an exit from a breakpoint. */ -#define LIBC_EXIT_MAGIC1 0xdead=09 -#define LIBC_EXIT_MAGIC2 0xbeef=09 -/* Local version of macros for decoding exit status. =20 - (included here rather than try to find target version of wait.h) -*/ -#define SIM_WIFEXITED(V) (((V) & 0xff) =3D=3D 0) -#define SIM_WIFSTOPPED(V) (!SIM_WIFEXITED (V)) -#define SIM_WEXITSTATUS(V) (((V) >> 8) & 0xff) -#define SIM_WSTOPSIG(V) ((V) & 0x7f) - #endif /* SIM_MAIN_H */