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From: Michael Frysinger <vapier@sourceware.org>
To: gdb-cvs@sourceware.org
Subject: [binutils-gdb] sim: iq2000: hoist cgen rules to top-level
Date: Tue, 3 Jan 2023 01:34:03 +0000 (GMT) [thread overview]
Message-ID: <20230103013403.A05D13858D37@sourceware.org> (raw)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=d5dd8f5d164db2e833c85dab7a94006b9554ce80
commit d5dd8f5d164db2e833c85dab7a94006b9554ce80
Author: Mike Frysinger <vapier@gentoo.org>
Date: Sun Jan 1 21:20:36 2023 -0500
sim: iq2000: hoist cgen rules to top-level
Diff:
---
sim/Makefile.in | 10 ++++++++++
sim/iq2000/Makefile.in | 26 --------------------------
sim/iq2000/local.mk | 11 +++++++++++
3 files changed, 21 insertions(+), 26 deletions(-)
diff --git a/sim/Makefile.in b/sim/Makefile.in
index 9d821d309a3..3cf2baf4815 100644
--- a/sim/Makefile.in
+++ b/sim/Makefile.in
@@ -3626,6 +3626,16 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo
@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)touch $@
+@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode
+
+@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
+@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
+@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch
+
+@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
+@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
+@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
+
@SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
@SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
diff --git a/sim/iq2000/Makefile.in b/sim/iq2000/Makefile.in
index ca03dfa7825..c0fb6507ca6 100644
--- a/sim/iq2000/Makefile.in
+++ b/sim/iq2000/Makefile.in
@@ -26,32 +26,6 @@ SIM_OBJS = \
sim-if.o arch.o \
$(IQ2000_OBJS)
-SIM_EXTRA_CLEAN = iq2000-clean
-
## COMMON_POST_CONFIG_FRAG
arch = iq2000
-
-# IQ2000 objs
-
-iq2000-clean:
- rm -f tmp-*
- rm -f stamp-arch stamp-cpu
-
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/iq2000.cpu Makefile
- $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=iq2000 \
- archfile=$(CPU_DIR)/iq2000.cpu \
- FLAGS="with-scache with-profile=fn"
- $(SILENCE) touch $@
-arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
- @true
-
-stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/iq2000.cpu Makefile
- $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
- cpu=iq2000bf mach=iq2000 \
- archfile=$(CPU_DIR)/iq2000.cpu \
- FLAGS="with-scache with-profile=fn" \
- EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
- $(SILENCE) touch $@
-cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
- @true
diff --git a/sim/iq2000/local.mk b/sim/iq2000/local.mk
index f2ebbb2a5ea..639a712c1f7 100644
--- a/sim/iq2000/local.mk
+++ b/sim/iq2000/local.mk
@@ -44,3 +44,14 @@ SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
$(AM_V_at)touch $@
MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
+
+## Target that triggers all cgen targets that works when --disable-cgen-maint.
+%D%/cgen: %D%/cgen-arch %D%/cgen-cpu-decode
+
+%D%/cgen-arch:
+ $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
+%D%/arch.h %D%/arch.c %D%/cpuall.h: @CGEN_MAINT@ %D%/cgen-arch
+
+%D%/cgen-cpu-decode:
+ $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
+%D%/cpu.h %D%/sem.c %D%/sem-switch.c %D%/model.c %D%/decode.c %D%/decode.h: @CGEN_MAINT@ %D%/cgen-cpu-decode
reply other threads:[~2023-01-03 1:34 UTC|newest]
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