From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1521) id 1BEF33858CDB; Tue, 10 Jan 2023 06:22:35 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1BEF33858CDB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1673331755; bh=t2qNFYUDubV/ZTgvCkY+Bcp6jaLhfZvlWekEsgN4Ogo=; h=From:To:Subject:Date:From; b=fUQUnGs2WFATT+A6QFfQbD4eltqNxToX65fQ2h4nCX5nZPpi4P0JmLx/fWlGii3Zo hXzzAeJ9g8cd9XmFPqALIu/sPq4Ata1EQrYkB6jMFsU/8M53u4tERG8Ubb/xfCIaC/ xC23nLulYKjH62BvpL6E4t5Vr492/lu2sQ7rLTqQ= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Frysinger To: gdb-cvs@sourceware.org Subject: [binutils-gdb] sim: modules: trigger generation from top-level X-Act-Checkin: binutils-gdb X-Git-Author: Mike Frysinger X-Git-Refname: refs/heads/master X-Git-Oldrev: 7dd38e31d67c2548b52bea313ab18e40824c05da X-Git-Newrev: 437eeee95c10c613d992fc786350618bbafcdf57 Message-Id: <20230110062235.1BEF33858CDB@sourceware.org> Date: Tue, 10 Jan 2023 06:22:35 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D437eeee95c10= c613d992fc786350618bbafcdf57 commit 437eeee95c10c613d992fc786350618bbafcdf57 Author: Mike Frysinger Date: Sun Dec 25 14:40:47 2022 -0500 sim: modules: trigger generation from top-level =20 Add rules for tracking generated subdir modules.c files. This doesn't actually generate the file from the top-level, but allows us to add rules that need to be ordered wrt it. Once those changes land, we can rework this to actually generate from the top-level. =20 This currently builds off of the objects that go into the libsim.a as we don't build those from the top-level either. Once we migrate that up, we can switch this to the source files directly. It's a bit hacky overall, but makes it easier to migrate things in smaller chunks, and we aren't going to keep this logic long term. Diff: --- sim/Makefile.in | 41 ++++++++++++++++++++++++++++++++++------- sim/bpf/local.mk | 1 + sim/common/Make-common.in | 5 ++--- sim/common/local.mk | 16 ++++++++++++++++ sim/cr16/local.mk | 1 + sim/cris/local.mk | 1 + sim/d10v/local.mk | 1 + sim/frv/local.mk | 1 + sim/iq2000/local.mk | 1 + sim/lm32/local.mk | 1 + sim/m32c/local.mk | 1 + sim/m32r/local.mk | 1 + sim/m68hc11/local.mk | 1 + sim/mips/local.mk | 1 + sim/mn10300/local.mk | 1 + sim/or1k/local.mk | 1 + sim/sh/local.mk | 1 + sim/v850/local.mk | 1 + 18 files changed, 67 insertions(+), 10 deletions(-) diff --git a/sim/Makefile.in b/sim/Makefile.in index 96305a397ce..d04260f0e74 100644 --- a/sim/Makefile.in +++ b/sim/Makefile.in @@ -1271,7 +1271,9 @@ CLEANFILES =3D common/version.c common/version.c-stam= p \ testsuite/common/bits64m63.c DISTCLEANFILES =3D $(am__append_76) MOSTLYCLEANFILES =3D core $(common_HW_CONFIG_H_TARGETS) $(patsubst \ - %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) $(am__append_7) \ + %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \ + $(common_GEN_MODULES_C_TARGETS) $(patsubst \ + %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_7) \ site-sim-config.exp testrun.log testrun.sum $(am__append_16) \ $(am__append_21) $(am__append_27) $(am__append_32) \ $(am__append_40) $(am__append_46) $(am__append_51) \ @@ -1287,12 +1289,13 @@ AM_CPPFLAGS_FOR_BUILD =3D -I$(srcroot)/include $(SI= M_HW_CFLAGS) \ COMPILE_FOR_BUILD =3D $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_= FOR_BUILD) $(CFLAGS_FOR_BUILD) LINK_FOR_BUILD =3D $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD= ) -o $@ SIM_ALL_RECURSIVE_DEPS =3D common/libcommon.a \ - $(common_HW_CONFIG_H_TARGETS) $(am__append_4) $(am__append_15) \ - $(am__append_19) $(am__append_26) $(am__append_30) \ - $(am__append_39) $(am__append_45) $(am__append_50) \ - $(am__append_53) $(am__append_59) $(am__append_63) \ - $(am__append_74) $(am__append_80) $(am__append_86) \ - $(am__append_95) $(am__append_100) + $(common_HW_CONFIG_H_TARGETS) $(common_GEN_MODULES_C_TARGETS) \ + $(am__append_4) $(am__append_15) $(am__append_19) \ + $(am__append_26) $(am__append_30) $(am__append_39) \ + $(am__append_45) $(am__append_50) $(am__append_53) \ + $(am__append_59) $(am__append_63) $(am__append_74) \ + $(am__append_80) $(am__append_86) $(am__append_95) \ + $(am__append_100) SIM_INSTALL_DATA_LOCAL_DEPS =3D=20 SIM_INSTALL_EXEC_LOCAL_DEPS =3D $(am__append_34) SIM_UNINSTALL_LOCAL_DEPS =3D $(am__append_35) @@ -1328,6 +1331,13 @@ SIM_NEW_COMMON_OBJS =3D sim-arange.o sim-bits.o sim-= close.o \ sim-watch.o $(am__append_2) SIM_HW_DEVICES =3D cfi core pal glue common_HW_CONFIG_H_TARGETS =3D $(patsubst %,%/hw-config.h,$(SIM_ENABLED_AR= CHES)) +am_arch_d =3D $(subst -,_,$(@D)) +GEN_MODULES_C_SRCS =3D \ + $(wildcard \ + $(patsubst %.o,$(abs_srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am= _arch_d)_libsim_a_LIBADD)) \ + $(filter-out %.o,$(patsubst $(@D)/%.o,$(abs_srcdir)/common/%.c,$($(am_ar= ch_d)_libsim_a_LIBADD)))) + +common_GEN_MODULES_C_TARGETS =3D $(patsubst %,%/modules.c,$(filter-out ppc= ,$(SIM_ENABLED_ARCHES))) LIBIBERTY_LIB =3D ../libiberty/libiberty.a BFD_LIB =3D ../bfd/libbfd.la OPCODES_LIB =3D ../opcodes/libopcodes.la @@ -3370,6 +3380,8 @@ common/version.c-stamp: $(srcroot)/gdb/version.in $(s= rcroot)/bfd/version.h $(src $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \ touch $@ .PRECIOUS: %/stamp-hw +%/modules.c: + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) GEN_MODULES_C_SRCS=3D"$(GEN_MODULES_C_S= RCS)" -C $(@D) $(@F) =20 # Alias for developers. @SIM_ENABLE_IGEN_TRUE@igen: $(IGEN) @@ -3502,6 +3514,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_bfin_TRUE@ ) > $@.tmp @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $= @.tmp $(srcdir)/bfin/linux-fixed-code.h @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-cod= e.h +@SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS) =20 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le = ; @true @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/ml= oop.in @@ -3549,6 +3562,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be: @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=3Debpfbe cpu=3Dbpfbf mach=3Dbpf = FLAGS=3D"with-scache" SUFFIX=3D"-be" EXTRAFILES=3D"$(CGEN_CPU_SEM)"; $(CGEN= _GEN_DECODE) @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @C= GEN_MAINT@ bpf/cgen-decode-be +@SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS) =20 # These rules are copied from automake, but tweaked to use FOR_BUILD varia= bles. @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) = $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp) @@ -3565,6 +3579,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo =20 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT) @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< >$@ +@SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS) =20 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloo= p-v10f ; @true @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cr= is/mloop.in @@ -3601,6 +3616,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)cpu=3Dcrisv32f mach=3Dcrisv32 SUFFI= X=3Dv32 FLAGS=3D"with-scache with-profile=3Dfn" EXTRAFILES=3D"$(CGEN_CPU_SE= MSW)"; $(CGEN_GEN_CPU_DECODE) @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $= (srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-sw= itch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris= /cgen-cpu-decode-v32f +@SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS) =20 # These rules are copied from automake, but tweaked to use FOR_BUILD varia= bles. @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) = $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp) @@ -3629,6 +3645,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_erc32_TRUE@ $(LIBTOOL) --mode=3Dinstall $(INSTALL_PROGRAM= ) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local: @SIM_ENABLE_ARCH_erc32_TRUE@ rm -f $(DESTDIR)$(bindir)/sis +@SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS) =20 @SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true @SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop= .in @@ -3649,6 +3666,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode: @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)cpu=3Dfrvbf mach=3Dfrv,fr550,fr500,f= r450,fr400,tomcat,simple FLAGS=3D"with-scache with-profile=3Dfn with-generi= c-write with-parallel-only" EXTRAFILES=3D"$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_= DECODE) @SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv= /decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode +@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS) =20 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mlo= op ; @true @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2= 000/mloop.in @@ -3669,6 +3687,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode: @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)cpu=3Diq2000bf mach=3Diq2000 FLAG= S=3D"with-scache with-profile=3Dfn" EXTRAFILES=3D"$(CGEN_CPU_SEM) $(CGEN_CP= U_SEMSW)"; $(CGEN_GEN_CPU_DECODE) @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c= iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-c= pu-decode +@SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS) =20 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @tr= ue @SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/ml= oop.in @@ -3692,6 +3711,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo =20 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: m32c/%.c | m32c/libsim.a $(SIM_ALL_RE= CURSIVE_DEPS) @SIM_ENABLE_ARCH_m32c_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) +@SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS) =20 # These rules are copied from automake, but tweaked to use FOR_BUILD varia= bles. @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m3= 2c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp) @@ -3708,6 +3728,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT) @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@= .tmp @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@ +@SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS) =20 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @tr= ue @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/ml= oop.in @@ -3756,6 +3777,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2: @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=3Dm32r2f mach=3Dm32r2 SUFFIX=3D= 2 FLAGS=3D"with-scache with-profile=3Dfn" EXTRAFILES=3D"$(CGEN_CPU_SEMSW)";= $(CGEN_GEN_CPU_DECODE) @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m3= 2r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2 +@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS) =20 # These rules are copied from automake, but tweaked to use FOR_BUILD varia= bles. @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_= OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp) @@ -3770,6 +3792,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo =20 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEX= T) @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6812 >$@ +@SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS) =20 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-= igen-itable @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/st= amp-gen-mode-single @@ -3968,6 +3991,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_mips_TRUE@ esac \ @SIM_ENABLE_ARCH_mips_TRUE@ done @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@ +@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS) =20 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stam= p-igen @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(m= n10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN) @@ -4008,6 +4032,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_moxie_TRUE@ echo "tree compiler tool (dtc) is missing. = Install the tool to "; \ @SIM_ENABLE_ARCH_moxie_TRUE@ echo "update the device tree blob."; \ @SIM_ENABLE_ARCH_moxie_TRUE@ fi +@SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS) =20 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @tr= ue @SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/ml= oop.in @@ -4050,6 +4075,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo =20 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c | rx/libsim.a $(SIM_ALL_RECURSIVE_= DEPS) @SIM_ENABLE_ARCH_rx_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) +@SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS) =20 # These rules are copied from automake, but tweaked to use FOR_BUILD varia= bles. @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_g= encode_DEPENDENCIES) sh/$(am__dirstamp) @@ -4067,6 +4093,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-g= en$(EXEEXT) testsuite/commo =20 @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT) @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -s >$@ +@SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS) =20 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen @SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_= DC) $(IGEN) diff --git a/sim/bpf/local.mk b/sim/bpf/local.mk index 4ba1f461303..f86f3306a8a 100644 --- a/sim/bpf/local.mk +++ b/sim/bpf/local.mk @@ -35,6 +35,7 @@ BUILT_SOURCES +=3D \ =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 %D%/mloop-le.c %D%/eng-le.h: %D%/stamp-mloop-le ; @true %D%/stamp-mloop-le: $(srccom)/genmloop.sh %D%/mloop.in diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in index 35477d94bb8..b56a49a0051 100644 --- a/sim/common/Make-common.in +++ b/sim/common/Make-common.in @@ -186,8 +186,7 @@ endif =20 all_object_files =3D $(LIB_OBJS) $(SIM_RUN_OBJS) generated_files =3D \ - $(SIM_EXTRA_DEPS) \ - modules.c + $(SIM_EXTRA_DEPS) =20 # Ensure that generated files are created early. Use order-only # dependencies if available. They require GNU make 3.80 or newer, @@ -212,7 +211,7 @@ stamp-modules: Makefile $(SIM_OBJS:.o=3D.c) $(ECHO_STAMP) modules.c $(SILENCE) LANG=3DC ; export LANG ; \ LC_ALL=3DC ; export LC_ALL ; \ - sed -n -e '/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $^ = | sort >$@.l-tmp + sed -n -e '/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $^ = $(GEN_MODULES_C_SRCS) | sort >$@.l-tmp @set -e; (\ echo '/* Do not modify this file. */'; \ echo '/* It is created automatically by the Makefile. */'; \ diff --git a/sim/common/local.mk b/sim/common/local.mk index dd6ed5fec83..128b770dbe1 100644 --- a/sim/common/local.mk +++ b/sim/common/local.mk @@ -130,6 +130,22 @@ endif MOSTLYCLEANFILES +=3D $(%C%_HW_CONFIG_H_TARGETS) $(patsubst %,%/stamp-hw,$= (SIM_ENABLED_ARCHES)) SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_HW_CONFIG_H_TARGETS) =20 +## See sim_pre_argv_init and sim_module_install in sim-module.c for more d= etails. +## TODO: Switch this to xxx_SOURCES once projects build objects in local.m= k. +am_arch_d =3D $(subst -,_,$(@D)) +GEN_MODULES_C_SRCS =3D \ + $(wildcard \ + $(patsubst %.o,$(abs_srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am= _arch_d)_libsim_a_LIBADD)) \ + $(filter-out %.o,$(patsubst $(@D)/%.o,$(abs_srcdir)/common/%.c,$($(am_ar= ch_d)_libsim_a_LIBADD)))) +%/modules.c: + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) GEN_MODULES_C_SRCS=3D"$(GEN_MODULES_C_S= RCS)" -C $(@D) $(@F) + +## NB: The ppc port doesn't currently utilize the modules API, so skip it. +%C%_GEN_MODULES_C_TARGETS =3D $(patsubst %,%/modules.c,$(filter-out ppc,$(= SIM_ENABLED_ARCHES))) +MOSTLYCLEANFILES +=3D $(%C%_GEN_MODULES_C_TARGETS) $(patsubst %,%/stamp-mo= dules,$(SIM_ENABLED_ARCHES)) +## TODO: Drop this once each port's local.mk:libsim.a depends on it themse= lf. +SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_GEN_MODULES_C_TARGETS) + LIBIBERTY_LIB =3D ../libiberty/libiberty.a BFD_LIB =3D ../bfd/libbfd.la OPCODES_LIB =3D ../opcodes/libopcodes.la diff --git a/sim/cr16/local.mk b/sim/cr16/local.mk index f5401f6d5f9..8e28cc356f5 100644 --- a/sim/cr16/local.mk +++ b/sim/cr16/local.mk @@ -32,6 +32,7 @@ BUILT_SOURCES +=3D %D%/simops.h =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 %C%_gencode_SOURCES =3D %D%/gencode.c %C%_gencode_LDADD =3D %D%/cr16-opc.o diff --git a/sim/cris/local.mk b/sim/cris/local.mk index 0e56fefa960..d55e7b84e25 100644 --- a/sim/cris/local.mk +++ b/sim/cris/local.mk @@ -46,6 +46,7 @@ BUILT_SOURCES +=3D \ =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 ## FIXME: What is mono and what does "Use of `mono' is wip" mean (other ## than the apparent; some "mono" feature is work in progress)? diff --git a/sim/d10v/local.mk b/sim/d10v/local.mk index 38a3c9263d6..2556845ed1d 100644 --- a/sim/d10v/local.mk +++ b/sim/d10v/local.mk @@ -32,6 +32,7 @@ BUILT_SOURCES +=3D %D%/simops.h =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 %C%_gencode_SOURCES =3D %D%/gencode.c %C%_gencode_LDADD =3D %D%/d10v-opc.o diff --git a/sim/frv/local.mk b/sim/frv/local.mk index 11db636a715..471b0adc653 100644 --- a/sim/frv/local.mk +++ b/sim/frv/local.mk @@ -35,6 +35,7 @@ BUILT_SOURCES +=3D %D%/eng.h =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 ## FIXME: Use of `mono' is wip. %D%/mloop.c %D%/eng.h: %D%/stamp-mloop ; @true diff --git a/sim/iq2000/local.mk b/sim/iq2000/local.mk index 881cf2c55dc..4113b4bc2f3 100644 --- a/sim/iq2000/local.mk +++ b/sim/iq2000/local.mk @@ -32,6 +32,7 @@ BUILT_SOURCES +=3D %D%/eng.h =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 ## FIXME: Use of `mono' is wip. %D%/mloop.c %D%/eng.h: %D%/stamp-mloop ; @true diff --git a/sim/lm32/local.mk b/sim/lm32/local.mk index 3f9606410d6..311de7df47e 100644 --- a/sim/lm32/local.mk +++ b/sim/lm32/local.mk @@ -35,6 +35,7 @@ BUILT_SOURCES +=3D %D%/eng.h =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 ## FIXME: Use of `mono' is wip. %D%/mloop.c %D%/eng.h: %D%/stamp-mloop ; @true diff --git a/sim/m32c/local.mk b/sim/m32c/local.mk index 1a542f18655..75909075a1e 100644 --- a/sim/m32c/local.mk +++ b/sim/m32c/local.mk @@ -35,6 +35,7 @@ noinst_PROGRAMS +=3D %D%/run =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 %C%_opc2c_SOURCES =3D %D%/opc2c.c =20 diff --git a/sim/m32r/local.mk b/sim/m32r/local.mk index 4f9f2bc257d..9814ae5c6c1 100644 --- a/sim/m32r/local.mk +++ b/sim/m32r/local.mk @@ -42,6 +42,7 @@ BUILT_SOURCES +=3D \ =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 ## FIXME: Use of `mono' is wip. %D%/mloop.c %D%/eng.h: %D%/stamp-mloop ; @true diff --git a/sim/m68hc11/local.mk b/sim/m68hc11/local.mk index 187bd389cef..d2e04576a77 100644 --- a/sim/m68hc11/local.mk +++ b/sim/m68hc11/local.mk @@ -34,6 +34,7 @@ AM_MAKEFLAGS +=3D %C%_SIM_EXTRA_HW_DEVICES=3D"$(%C%_SIM_E= XTRA_HW_DEVICES)" =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 %C%_gencode_SOURCES =3D %D%/gencode.c =20 diff --git a/sim/mips/local.mk b/sim/mips/local.mk index 9db960ca4be..5a7b12c29a1 100644 --- a/sim/mips/local.mk +++ b/sim/mips/local.mk @@ -96,6 +96,7 @@ endif =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 $(%C%_BUILT_SRC_FROM_IGEN_ITABLE): %D%/stamp-igen-itable $(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE): %D%/stamp-gen-mode-single diff --git a/sim/mn10300/local.mk b/sim/mn10300/local.mk index afb1df75f2e..d24e6b8d040 100644 --- a/sim/mn10300/local.mk +++ b/sim/mn10300/local.mk @@ -58,6 +58,7 @@ BUILT_SOURCES +=3D \ =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 $(%C%_BUILT_SRC_FROM_IGEN): %D%/stamp-igen =20 diff --git a/sim/or1k/local.mk b/sim/or1k/local.mk index ef8ae2a6abc..7d999f6f3aa 100644 --- a/sim/or1k/local.mk +++ b/sim/or1k/local.mk @@ -34,6 +34,7 @@ BUILT_SOURCES +=3D %D%/eng.h =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 ## FIXME: Use of `mono' is wip. %D%/mloop.c %D%/eng.h: %D%/stamp-mloop ; @true diff --git a/sim/sh/local.mk b/sim/sh/local.mk index 8c2ce0da149..c25ab536c68 100644 --- a/sim/sh/local.mk +++ b/sim/sh/local.mk @@ -36,6 +36,7 @@ BUILT_SOURCES +=3D \ =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 %C%_gencode_SOURCES =3D %D%/gencode.c =20 diff --git a/sim/v850/local.mk b/sim/v850/local.mk index 4741e070a30..2c27d0c6d7e 100644 --- a/sim/v850/local.mk +++ b/sim/v850/local.mk @@ -55,6 +55,7 @@ BUILT_SOURCES +=3D \ =20 ## This makes sure build tools are available before building the arch-subd= irs. SIM_ALL_RECURSIVE_DEPS +=3D $(%C%_BUILD_OUTPUTS) +%D%/modules.c: | $(%C%_BUILD_OUTPUTS) =20 $(%C%_BUILT_SRC_FROM_IGEN): %D%/stamp-igen