From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1521) id 3B0F93858C27; Tue, 10 Jan 2023 06:25:02 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3B0F93858C27 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1673331902; bh=VtQiSP2b0ph9HQyKfFHyEVqZ15OwJgEMtefGqLXfGuk=; h=From:To:Subject:Date:From; b=pklfPKzhVRpmnEK/4fK+leqJoC3UtH0vUFY+m2eZ1LFsITo8+xd9a0Dfs5tveI+CN upvNNZDTfUbV+s2tCT55C9XzPhdzTZ2WfWsuoU10/BiqAwCtwNDO+5VTEYOlRsfXwi 9jnRQkxsqTr7dVqMz0/Lx4L/ALdxFvKUxlL8tlgQ= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Frysinger To: gdb-cvs@sourceware.org Subject: [binutils-gdb] sim: rl78: move libsim.a creation to top-level X-Act-Checkin: binutils-gdb X-Git-Author: Mike Frysinger X-Git-Refname: refs/heads/master X-Git-Oldrev: 91344291e0cf157491d3e828efd7b7ff02dc5f7c X-Git-Newrev: 91a335f9fd982cfd3b9f9318a1086f715a048d8b Message-Id: <20230110062502.3B0F93858C27@sourceware.org> Date: Tue, 10 Jan 2023 06:25:02 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D91a335f9fd98= 2cfd3b9f9318a1086f715a048d8b commit 91a335f9fd982cfd3b9f9318a1086f715a048d8b Author: Mike Frysinger Date: Mon Dec 26 22:27:31 2022 -0500 sim: rl78: move libsim.a creation to top-level =20 The objects are still compiled in the subdir, but the creation of the archive itself is in the top-level. This is a required step before we can move compilation itself up, and makes it easier to review. =20 The downside is that each object compile is a recursive make instead of a single one. On my 4 core system, it adds ~100msec to the build per port, so it's not great, but it shouldn't be a big deal. This will go away of course once the top-level compiles objects. Diff: --- sim/Makefile.in | 83 +++++++++++++++++++++++++++++++++++-------------= ---- sim/rl78/Makefile.in | 12 ++------ sim/rl78/local.mk | 24 ++++++++++++--- 3 files changed, 78 insertions(+), 41 deletions(-) diff --git a/sim/Makefile.in b/sim/Makefile.in index 58ffbe50752..d9fc1d82462 100644 --- a/sim/Makefile.in +++ b/sim/Makefile.in @@ -314,18 +314,19 @@ TESTS =3D testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_pru_TRUE@am__append_118 =3D pru/run @SIM_ENABLE_ARCH_riscv_TRUE@am__append_119 =3D riscv/libsim.a @SIM_ENABLE_ARCH_riscv_TRUE@am__append_120 =3D riscv/run -@SIM_ENABLE_ARCH_rl78_TRUE@am__append_121 =3D rl78/run -@SIM_ENABLE_ARCH_rx_TRUE@am__append_122 =3D rx/run -@SIM_ENABLE_ARCH_sh_TRUE@am__append_123 =3D sh/run -@SIM_ENABLE_ARCH_sh_TRUE@am__append_124 =3D \ +@SIM_ENABLE_ARCH_rl78_TRUE@am__append_121 =3D rl78/libsim.a +@SIM_ENABLE_ARCH_rl78_TRUE@am__append_122 =3D rl78/run +@SIM_ENABLE_ARCH_rx_TRUE@am__append_123 =3D rx/run +@SIM_ENABLE_ARCH_sh_TRUE@am__append_124 =3D sh/run +@SIM_ENABLE_ARCH_sh_TRUE@am__append_125 =3D \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c =20 -@SIM_ENABLE_ARCH_sh_TRUE@am__append_125 =3D $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_sh_TRUE@am__append_126 =3D sh/gencode -@SIM_ENABLE_ARCH_sh_TRUE@am__append_127 =3D $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_v850_TRUE@am__append_128 =3D v850/run -@SIM_ENABLE_ARCH_v850_TRUE@am__append_129 =3D \ +@SIM_ENABLE_ARCH_sh_TRUE@am__append_126 =3D $(sh_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_sh_TRUE@am__append_127 =3D sh/gencode +@SIM_ENABLE_ARCH_sh_TRUE@am__append_128 =3D $(sh_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_129 =3D v850/run +@SIM_ENABLE_ARCH_v850_TRUE@am__append_130 =3D \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \ @@ -334,8 +335,8 @@ TESTS =3D testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h =20 -@SIM_ENABLE_ARCH_v850_TRUE@am__append_130 =3D $(v850_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_v850_TRUE@am__append_131 =3D $(v850_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_132 =3D $(v850_BUILD_OUTPUTS) subdir =3D . ACLOCAL_M4 =3D $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps =3D $(top_srcdir)/../config/acx.m4 \ @@ -824,6 +825,14 @@ riscv_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/sim-resume.o am_riscv_libsim_a_OBJECTS =3D riscv_libsim_a_OBJECTS =3D $(am_riscv_libsim_a_OBJECTS) +rl78_libsim_a_AR =3D $(AR) $(ARFLAGS) +@SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_DEPENDENCIES =3D \ +@SIM_ENABLE_ARCH_rl78_TRUE@ $(common_libcommon_a_OBJECTS) \ +@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/load.o rl78/mem.o rl78/cpu.o \ +@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/rl78.o rl78/gdb-if.o \ +@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/modules.o rl78/trace.o +am_rl78_libsim_a_OBJECTS =3D +rl78_libsim_a_OBJECTS =3D $(am_rl78_libsim_a_OBJECTS) @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 =3D $(IGEN) igen/filter$(EXEEXT) \ @SIM_ENABLE_IGEN_TRUE@ igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \ @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode$(EXEEXT) \ @@ -1160,12 +1169,12 @@ SOURCES =3D $(aarch64_libsim_a_SOURCES) $(arm_libsi= m_a_SOURCES) \ $(mips_libsim_a_SOURCES) $(mn10300_libsim_a_SOURCES) \ $(moxie_libsim_a_SOURCES) $(msp430_libsim_a_SOURCES) \ $(or1k_libsim_a_SOURCES) $(pru_libsim_a_SOURCES) \ - $(riscv_libsim_a_SOURCES) $(aarch64_run_SOURCES) \ - $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \ - $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \ - $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \ - $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \ - $(erc32_run_SOURCES) erc32/sis.c \ + $(riscv_libsim_a_SOURCES) $(rl78_libsim_a_SOURCES) \ + $(aarch64_run_SOURCES) $(arm_run_SOURCES) $(avr_run_SOURCES) \ + $(bfin_run_SOURCES) $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) \ + $(cr16_run_SOURCES) $(cris_run_SOURCES) \ + $(cris_rvdummy_SOURCES) $(d10v_gencode_SOURCES) \ + $(d10v_run_SOURCES) $(erc32_run_SOURCES) erc32/sis.c \ $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \ $(ft32_run_SOURCES) $(h8300_run_SOURCES) \ $(igen_filter_SOURCES) $(igen_gen_SOURCES) \ @@ -1729,12 +1738,12 @@ noinst_LIBRARIES =3D common/libcommon.a $(am__appen= d_5) $(am__append_8) \ $(am__append_72) $(am__append_78) $(am__append_84) \ $(am__append_86) $(am__append_91) $(am__append_101) \ $(am__append_107) $(am__append_109) $(am__append_111) \ - $(am__append_117) $(am__append_119) + $(am__append_117) $(am__append_119) $(am__append_121) BUILT_SOURCES =3D $(am__append_19) $(am__append_24) $(am__append_32) \ $(am__append_37) $(am__append_49) $(am__append_58) \ $(am__append_64) $(am__append_75) $(am__append_94) \ - $(am__append_104) $(am__append_113) $(am__append_124) \ - $(am__append_129) + $(am__append_104) $(am__append_113) $(am__append_125) \ + $(am__append_130) CLEANFILES =3D common/version.c common/version.c-stamp \ testsuite/common/bits-gen testsuite/common/bits32m0.c \ testsuite/common/bits32m31.c testsuite/common/bits64m0.c \ @@ -1749,7 +1758,7 @@ MOSTLYCLEANFILES =3D core $(common_HW_CONFIG_H_TARGET= S) $(patsubst \ $(am__append_51) $(am__append_60) $(am__append_66) \ $(am__append_71) $(am__append_77) $(am__append_83) \ $(am__append_99) $(am__append_106) $(am__append_115) \ - $(am__append_127) $(am__append_131) + $(am__append_128) $(am__append_132) AM_CFLAGS =3D $(WERROR_CFLAGS) $(WARN_CFLAGS) AM_CPPFLAGS =3D $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \ $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \ @@ -1764,8 +1773,8 @@ SIM_ALL_RECURSIVE_DEPS =3D common/libcommon.a \ $(am__append_33) $(am__append_38) $(am__append_50) \ $(am__append_59) $(am__append_65) $(am__append_69) \ $(am__append_76) $(am__append_81) $(am__append_98) \ - $(am__append_105) $(am__append_114) $(am__append_125) \ - $(am__append_130) + $(am__append_105) $(am__append_114) $(am__append_126) \ + $(am__append_131) SIM_INSTALL_DATA_LOCAL_DEPS =3D=20 SIM_INSTALL_EXEC_LOCAL_DEPS =3D $(am__append_43) SIM_UNINSTALL_LOCAL_DEPS =3D $(am__append_44) @@ -2746,6 +2755,17 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/libsim.a \ @SIM_ENABLE_ARCH_riscv_TRUE@ $(SIM_COMMON_LIBS) =20 +@SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD =3D \ +@SIM_ENABLE_ARCH_rl78_TRUE@ $(common_libcommon_a_OBJECTS) \ +@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/load.o \ +@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/mem.o \ +@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/cpu.o \ +@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/rl78.o \ +@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/gdb-if.o \ +@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/modules.o \ +@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/trace.o + @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =3D=20 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD =3D \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/main.o \ @@ -3277,6 +3297,14 @@ riscv/libsim.a: $(riscv_libsim_a_OBJECTS) $(riscv_li= bsim_a_DEPENDENCIES) $(EXTRA $(AM_V_at)-rm -f riscv/libsim.a $(AM_V_AR)$(riscv_libsim_a_AR) riscv/libsim.a $(riscv_libsim_a_OBJECTS) $= (riscv_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) riscv/libsim.a +rl78/$(am__dirstamp): + @$(MKDIR_P) rl78 + @: > rl78/$(am__dirstamp) + +rl78/libsim.a: $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_DEPENDENCIES) $(EX= TRA_rl78_libsim_a_DEPENDENCIES) rl78/$(am__dirstamp) + $(AM_V_at)-rm -f rl78/libsim.a + $(AM_V_AR)$(rl78_libsim_a_AR) rl78/libsim.a $(rl78_libsim_a_OBJECTS) $(rl= 78_libsim_a_LIBADD) + $(AM_V_at)$(RANLIB) rl78/libsim.a =20 clean-checkPROGRAMS: @list=3D'$(check_PROGRAMS)'; test -n "$$list" || exit 0; \ @@ -3502,9 +3530,6 @@ pru/run$(EXEEXT): $(pru_run_OBJECTS) $(pru_run_DEPEND= ENCIES) $(EXTRA_pru_run_DEP riscv/run$(EXEEXT): $(riscv_run_OBJECTS) $(riscv_run_DEPENDENCIES) $(EXTRA= _riscv_run_DEPENDENCIES) riscv/$(am__dirstamp) @rm -f riscv/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(riscv_run_OBJECTS) $(riscv_run_LDADD) $(LIBS) -rl78/$(am__dirstamp): - @$(MKDIR_P) rl78 - @: > rl78/$(am__dirstamp) =20 rl78/run$(EXEEXT): $(rl78_run_OBJECTS) $(rl78_run_DEPENDENCIES) $(EXTRA_rl= 78_run_DEPENDENCIES) rl78/$(am__dirstamp) @rm -f rl78/run$(EXEEXT) @@ -5290,9 +5315,13 @@ testsuite/common/bits64m63.c: testsuite/common/bits-= gen$(EXEEXT) testsuite/commo =20 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: common/%.c @SIM_ENABLE_ARCH_riscv_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(= @F) +@SIM_ENABLE_ARCH_rl78_TRUE@$(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD= ): rl78/hw-config.h + +@SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: rl78/%.c +@SIM_ENABLE_ARCH_rl78_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@= F) =20 -@SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: rl78/%.c | rl78/libsim.a $(SIM_ALL_RE= CURSIVE_DEPS) -@SIM_ENABLE_ARCH_rl78_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) +@SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: common/%.c +@SIM_ENABLE_ARCH_rl78_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@= F) =20 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c | rx/libsim.a $(SIM_ALL_RECURSIVE_= DEPS) @SIM_ENABLE_ARCH_rx_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) diff --git a/sim/rl78/Makefile.in b/sim/rl78/Makefile.in index 9ca400efe28..0cc55baf3b5 100644 --- a/sim/rl78/Makefile.in +++ b/sim/rl78/Makefile.in @@ -20,15 +20,7 @@ =20 ## COMMON_PRE_CONFIG_FRAG =20 -SIM_RUN_OBJS =3D \ - main.o - -SIM_OBJS =3D \ - load.o \ - mem.o \ - cpu.o \ - rl78.o \ - gdb-if.o \ - trace.o +SIM_LIBSIM =3D +SIM_RUN_OBJS =3D =20 ## COMMON_POST_CONFIG_FRAG diff --git a/sim/rl78/local.mk b/sim/rl78/local.mk index 07ff86711c1..935fbf1eea0 100644 --- a/sim/rl78/local.mk +++ b/sim/rl78/local.mk @@ -16,6 +16,26 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 +%C%_libsim_a_SOURCES =3D +%C%_libsim_a_LIBADD =3D \ + $(common_libcommon_a_OBJECTS) \ + %D%/load.o \ + %D%/mem.o \ + %D%/cpu.o \ + %D%/rl78.o \ + %D%/gdb-if.o \ + %D%/modules.o \ + %D%/trace.o +$(%C%_libsim_a_OBJECTS) $(%C%_libsim_a_LIBADD): %D%/hw-config.h + +noinst_LIBRARIES +=3D %D%/libsim.a + +%D%/%.o: %D%/%.c + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + +%D%/%.o: common/%.c + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + %C%_run_SOURCES =3D %C%_run_LDADD =3D \ %D%/main.o \ @@ -23,7 +43,3 @@ $(SIM_COMMON_LIBS) =20 noinst_PROGRAMS +=3D %D%/run - -## Helper targets for running make from the top-level due to run's main.o. -%D%/%.o: %D%/%.c | %D%/libsim.a $(SIM_ALL_RECURSIVE_DEPS) - $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)