From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1521) id 5E8FF3858CDB; Tue, 10 Jan 2023 06:25:12 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5E8FF3858CDB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1673331912; bh=2YiersGfu8uVWlxObJH3ZbqLh6LqoA/3Aaj850KBVHA=; h=From:To:Subject:Date:From; b=FKA16IDkmJkJHZ4Qt3hU3YVfitWO4yQQVX+xE6miCK5HL7QGLvDpkqEkkaoOzQiD3 TQmcT25ddyLxiPs4l8ZApRTcvcUEUXB8BDmSVjYRBxpT34h2LSg6ApCRu70QQcCdEW u26DcT0G2Tqg+p3wAfc55BxdFmwjTbyb3+dbnUw8= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Frysinger To: gdb-cvs@sourceware.org Subject: [binutils-gdb] sim: sh: move libsim.a creation to top-level X-Act-Checkin: binutils-gdb X-Git-Author: Mike Frysinger X-Git-Refname: refs/heads/master X-Git-Oldrev: 15538f651179053854b69e3eab8c31f2d813be7f X-Git-Newrev: dd719fa642c7ed651346cc34e5ef1c0e9502ba04 Message-Id: <20230110062512.5E8FF3858CDB@sourceware.org> Date: Tue, 10 Jan 2023 06:25:12 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3Ddd719fa642c7= ed651346cc34e5ef1c0e9502ba04 commit dd719fa642c7ed651346cc34e5ef1c0e9502ba04 Author: Mike Frysinger Date: Mon Dec 26 22:29:53 2022 -0500 sim: sh: move libsim.a creation to top-level =20 The objects are still compiled in the subdir, but the creation of the archive itself is in the top-level. This is a required step before we can move compilation itself up, and makes it easier to review. =20 The downside is that each object compile is a recursive make instead of a single one. On my 4 core system, it adds ~100msec to the build per port, so it's not great, but it shouldn't be a big deal. This will go away of course once the top-level compiles objects. Diff: --- sim/Makefile.in | 78 ++++++++++++++++++++++++++++++++++++++------------= ---- sim/sh/Makefile.in | 5 +--- sim/sh/local.mk | 18 +++++++++++++ 3 files changed, 74 insertions(+), 27 deletions(-) diff --git a/sim/Makefile.in b/sim/Makefile.in index 63ff2414c70..9c2ab99367b 100644 --- a/sim/Makefile.in +++ b/sim/Makefile.in @@ -318,16 +318,17 @@ TESTS =3D testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_rl78_TRUE@am__append_122 =3D rl78/run @SIM_ENABLE_ARCH_rx_TRUE@am__append_123 =3D rx/libsim.a @SIM_ENABLE_ARCH_rx_TRUE@am__append_124 =3D rx/run -@SIM_ENABLE_ARCH_sh_TRUE@am__append_125 =3D sh/run -@SIM_ENABLE_ARCH_sh_TRUE@am__append_126 =3D \ +@SIM_ENABLE_ARCH_sh_TRUE@am__append_125 =3D sh/libsim.a +@SIM_ENABLE_ARCH_sh_TRUE@am__append_126 =3D sh/run +@SIM_ENABLE_ARCH_sh_TRUE@am__append_127 =3D \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c =20 -@SIM_ENABLE_ARCH_sh_TRUE@am__append_127 =3D $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_sh_TRUE@am__append_128 =3D sh/gencode -@SIM_ENABLE_ARCH_sh_TRUE@am__append_129 =3D $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_v850_TRUE@am__append_130 =3D v850/run -@SIM_ENABLE_ARCH_v850_TRUE@am__append_131 =3D \ +@SIM_ENABLE_ARCH_sh_TRUE@am__append_128 =3D $(sh_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_sh_TRUE@am__append_129 =3D sh/gencode +@SIM_ENABLE_ARCH_sh_TRUE@am__append_130 =3D $(sh_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_131 =3D v850/run +@SIM_ENABLE_ARCH_v850_TRUE@am__append_132 =3D \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \ @@ -336,8 +337,8 @@ TESTS =3D testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h =20 -@SIM_ENABLE_ARCH_v850_TRUE@am__append_132 =3D $(v850_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_v850_TRUE@am__append_133 =3D $(v850_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_134 =3D $(v850_BUILD_OUTPUTS) subdir =3D . ACLOCAL_M4 =3D $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps =3D $(top_srcdir)/../config/acx.m4 \ @@ -843,6 +844,16 @@ rx_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_rx_TRUE@ rx/modules.o am_rx_libsim_a_OBJECTS =3D rx_libsim_a_OBJECTS =3D $(am_rx_libsim_a_OBJECTS) +sh_libsim_a_AR =3D $(AR) $(ARFLAGS) +@SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_DEPENDENCIES =3D \ +@SIM_ENABLE_ARCH_sh_TRUE@ $(common_libcommon_a_OBJECTS) \ +@SIM_ENABLE_ARCH_sh_TRUE@ sh/interp.o $(patsubst \ +@SIM_ENABLE_ARCH_sh_TRUE@ %,sh/%,$(SIM_NEW_COMMON_OBJS)) \ +@SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_sh_TRUE@ %,sh/dv-%.o,$(SIM_HW_DEVICES)) \ +@SIM_ENABLE_ARCH_sh_TRUE@ sh/modules.o sh/table.o +am_sh_libsim_a_OBJECTS =3D +sh_libsim_a_OBJECTS =3D $(am_sh_libsim_a_OBJECTS) @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 =3D $(IGEN) igen/filter$(EXEEXT) \ @SIM_ENABLE_IGEN_TRUE@ igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \ @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode$(EXEEXT) \ @@ -1180,12 +1191,12 @@ SOURCES =3D $(aarch64_libsim_a_SOURCES) $(arm_libsi= m_a_SOURCES) \ $(moxie_libsim_a_SOURCES) $(msp430_libsim_a_SOURCES) \ $(or1k_libsim_a_SOURCES) $(pru_libsim_a_SOURCES) \ $(riscv_libsim_a_SOURCES) $(rl78_libsim_a_SOURCES) \ - $(rx_libsim_a_SOURCES) $(aarch64_run_SOURCES) \ - $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \ - $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \ - $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \ - $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \ - $(erc32_run_SOURCES) erc32/sis.c \ + $(rx_libsim_a_SOURCES) $(sh_libsim_a_SOURCES) \ + $(aarch64_run_SOURCES) $(arm_run_SOURCES) $(avr_run_SOURCES) \ + $(bfin_run_SOURCES) $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) \ + $(cr16_run_SOURCES) $(cris_run_SOURCES) \ + $(cris_rvdummy_SOURCES) $(d10v_gencode_SOURCES) \ + $(d10v_run_SOURCES) $(erc32_run_SOURCES) erc32/sis.c \ $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \ $(ft32_run_SOURCES) $(h8300_run_SOURCES) \ $(igen_filter_SOURCES) $(igen_gen_SOURCES) \ @@ -1750,12 +1761,12 @@ noinst_LIBRARIES =3D common/libcommon.a $(am__appen= d_5) $(am__append_8) \ $(am__append_86) $(am__append_91) $(am__append_101) \ $(am__append_107) $(am__append_109) $(am__append_111) \ $(am__append_117) $(am__append_119) $(am__append_121) \ - $(am__append_123) + $(am__append_123) $(am__append_125) BUILT_SOURCES =3D $(am__append_19) $(am__append_24) $(am__append_32) \ $(am__append_37) $(am__append_49) $(am__append_58) \ $(am__append_64) $(am__append_75) $(am__append_94) \ - $(am__append_104) $(am__append_113) $(am__append_126) \ - $(am__append_131) + $(am__append_104) $(am__append_113) $(am__append_127) \ + $(am__append_132) CLEANFILES =3D common/version.c common/version.c-stamp \ testsuite/common/bits-gen testsuite/common/bits32m0.c \ testsuite/common/bits32m31.c testsuite/common/bits64m0.c \ @@ -1770,7 +1781,7 @@ MOSTLYCLEANFILES =3D core $(common_HW_CONFIG_H_TARGET= S) $(patsubst \ $(am__append_51) $(am__append_60) $(am__append_66) \ $(am__append_71) $(am__append_77) $(am__append_83) \ $(am__append_99) $(am__append_106) $(am__append_115) \ - $(am__append_129) $(am__append_133) + $(am__append_130) $(am__append_134) AM_CFLAGS =3D $(WERROR_CFLAGS) $(WARN_CFLAGS) AM_CPPFLAGS =3D $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \ $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \ @@ -1785,8 +1796,8 @@ SIM_ALL_RECURSIVE_DEPS =3D common/libcommon.a \ $(am__append_33) $(am__append_38) $(am__append_50) \ $(am__append_59) $(am__append_65) $(am__append_69) \ $(am__append_76) $(am__append_81) $(am__append_98) \ - $(am__append_105) $(am__append_114) $(am__append_127) \ - $(am__append_132) + $(am__append_105) $(am__append_114) $(am__append_128) \ + $(am__append_133) SIM_INSTALL_DATA_LOCAL_DEPS =3D=20 SIM_INSTALL_EXEC_LOCAL_DEPS =3D $(am__append_43) SIM_UNINSTALL_LOCAL_DEPS =3D $(am__append_44) @@ -2807,6 +2818,15 @@ testsuite_common_CPPFLAGS =3D \ =20 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir =3D $(docdir)/rx @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA =3D rx/README.txt +@SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD =3D \ +@SIM_ENABLE_ARCH_sh_TRUE@ $(common_libcommon_a_OBJECTS) \ +@SIM_ENABLE_ARCH_sh_TRUE@ sh/interp.o \ +@SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst %,sh/%,$(SIM_NEW_COMMON_OBJS)) \ +@SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst %,sh/dv-%.o,$(SIM_HW_DEVICES)) \ +@SIM_ENABLE_ARCH_sh_TRUE@ sh/modules.o \ +@SIM_ENABLE_ARCH_sh_TRUE@ sh/table.o + @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =3D=20 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD =3D \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/nrun.o \ @@ -3340,6 +3360,14 @@ rx/libsim.a: $(rx_libsim_a_OBJECTS) $(rx_libsim_a_DE= PENDENCIES) $(EXTRA_rx_libsi $(AM_V_at)-rm -f rx/libsim.a $(AM_V_AR)$(rx_libsim_a_AR) rx/libsim.a $(rx_libsim_a_OBJECTS) $(rx_libsi= m_a_LIBADD) $(AM_V_at)$(RANLIB) rx/libsim.a +sh/$(am__dirstamp): + @$(MKDIR_P) sh + @: > sh/$(am__dirstamp) + +sh/libsim.a: $(sh_libsim_a_OBJECTS) $(sh_libsim_a_DEPENDENCIES) $(EXTRA_sh= _libsim_a_DEPENDENCIES) sh/$(am__dirstamp) + $(AM_V_at)-rm -f sh/libsim.a + $(AM_V_AR)$(sh_libsim_a_AR) sh/libsim.a $(sh_libsim_a_OBJECTS) $(sh_libsi= m_a_LIBADD) + $(AM_V_at)$(RANLIB) sh/libsim.a =20 clean-checkPROGRAMS: @list=3D'$(check_PROGRAMS)'; test -n "$$list" || exit 0; \ @@ -3573,9 +3601,6 @@ rl78/run$(EXEEXT): $(rl78_run_OBJECTS) $(rl78_run_DEP= ENDENCIES) $(EXTRA_rl78_run rx/run$(EXEEXT): $(rx_run_OBJECTS) $(rx_run_DEPENDENCIES) $(EXTRA_rx_run_D= EPENDENCIES) rx/$(am__dirstamp) @rm -f rx/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(rx_run_OBJECTS) $(rx_run_LDADD) $(LIBS) -sh/$(am__dirstamp): - @$(MKDIR_P) sh - @: > sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) sh/$(DEPDIR) @: > sh/$(DEPDIR)/$(am__dirstamp) @@ -5361,6 +5386,13 @@ testsuite/common/bits64m63.c: testsuite/common/bits-= gen$(EXEEXT) testsuite/commo =20 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: common/%.c @SIM_ENABLE_ARCH_rx_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) +@SIM_ENABLE_ARCH_sh_TRUE@$(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD): sh/= hw-config.h + +@SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: sh/%.c +@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + +@SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: common/%.c +@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS) =20 # These rules are copied from automake, but tweaked to use FOR_BUILD varia= bles. diff --git a/sim/sh/Makefile.in b/sim/sh/Makefile.in index fef187a07dd..ceb4878d285 100644 --- a/sim/sh/Makefile.in +++ b/sim/sh/Makefile.in @@ -17,9 +17,6 @@ =20 ## COMMON_PRE_CONFIG_FRAG =20 -SIM_OBJS =3D \ - interp.o \ - $(SIM_NEW_COMMON_OBJS) \ - table.o +SIM_LIBSIM =3D =20 ## COMMON_POST_CONFIG_FRAG diff --git a/sim/sh/local.mk b/sim/sh/local.mk index c25ab536c68..b7c9e615725 100644 --- a/sim/sh/local.mk +++ b/sim/sh/local.mk @@ -16,6 +16,24 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 +%C%_libsim_a_SOURCES =3D +%C%_libsim_a_LIBADD =3D \ + $(common_libcommon_a_OBJECTS) \ + %D%/interp.o \ + $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ + $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ + %D%/modules.o \ + %D%/table.o +$(%C%_libsim_a_OBJECTS) $(%C%_libsim_a_LIBADD): %D%/hw-config.h + +noinst_LIBRARIES +=3D %D%/libsim.a + +%D%/%.o: %D%/%.c + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + +%D%/%.o: common/%.c + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + %C%_run_SOURCES =3D %C%_run_LDADD =3D \ %D%/nrun.o \