From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1521) id 713103858CDB; Tue, 10 Jan 2023 06:25:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 713103858CDB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1673331917; bh=WGWbF4EAcz1L8mG/xLyTml2Rq3V1ppG0/YA2tN56vLQ=; h=From:To:Subject:Date:From; b=OkqMr0e/wUVVqIItr+SHKvt6g8crwo5z6jN5nFGhEGaaIWDGZCyTnTFTh+0rx3Hgm tafoxR7lfaQyJTCjZXdUZGYwDDS7nbluAgOaBbbmdssddAYGSmSmRjs4wp8vDJfVfe k8wurwZ1FTFZSxfgFaylgrrwd5QasF5Yv6Rr4LhA= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Frysinger To: gdb-cvs@sourceware.org Subject: [binutils-gdb] sim: v850: move libsim.a creation to top-level X-Act-Checkin: binutils-gdb X-Git-Author: Mike Frysinger X-Git-Refname: refs/heads/master X-Git-Oldrev: dd719fa642c7ed651346cc34e5ef1c0e9502ba04 X-Git-Newrev: 7a59a0b92cb36e7f591e5d6a3874667a326f37e6 Message-Id: <20230110062517.713103858CDB@sourceware.org> Date: Tue, 10 Jan 2023 06:25:17 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D7a59a0b92cb3= 6e7f591e5d6a3874667a326f37e6 commit 7a59a0b92cb36e7f591e5d6a3874667a326f37e6 Author: Mike Frysinger Date: Mon Dec 26 22:31:29 2022 -0500 sim: v850: move libsim.a creation to top-level =20 The objects are still compiled in the subdir, but the creation of the archive itself is in the top-level. This is a required step before we can move compilation itself up, and makes it easier to review. =20 The downside is that each object compile is a recursive make instead of a single one. On my 4 core system, it adds ~100msec to the build per port, so it's not great, but it shouldn't be a big deal. This will go away of course once the top-level compiles objects. Diff: --- sim/Makefile.in | 76 +++++++++++++++++++++++++++++++++++++++++-------= ---- sim/v850/Makefile.in | 6 +---- sim/v850/local.mk | 26 ++++++++++++++++++ 3 files changed, 88 insertions(+), 20 deletions(-) diff --git a/sim/Makefile.in b/sim/Makefile.in index 9c2ab99367b..cf4707f34b1 100644 --- a/sim/Makefile.in +++ b/sim/Makefile.in @@ -327,8 +327,9 @@ TESTS =3D testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_sh_TRUE@am__append_128 =3D $(sh_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_sh_TRUE@am__append_129 =3D sh/gencode @SIM_ENABLE_ARCH_sh_TRUE@am__append_130 =3D $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_v850_TRUE@am__append_131 =3D v850/run -@SIM_ENABLE_ARCH_v850_TRUE@am__append_132 =3D \ +@SIM_ENABLE_ARCH_v850_TRUE@am__append_131 =3D v850/libsim.a +@SIM_ENABLE_ARCH_v850_TRUE@am__append_132 =3D v850/run +@SIM_ENABLE_ARCH_v850_TRUE@am__append_133 =3D \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \ @@ -337,8 +338,8 @@ TESTS =3D testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h =20 -@SIM_ENABLE_ARCH_v850_TRUE@am__append_133 =3D $(v850_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_v850_TRUE@am__append_134 =3D $(v850_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_135 =3D $(v850_BUILD_OUTPUTS) subdir =3D . ACLOCAL_M4 =3D $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps =3D $(top_srcdir)/../config/acx.m4 \ @@ -854,6 +855,21 @@ sh_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_sh_TRUE@ sh/modules.o sh/table.o am_sh_libsim_a_OBJECTS =3D sh_libsim_a_OBJECTS =3D $(am_sh_libsim_a_OBJECTS) +v850_libsim_a_AR =3D $(AR) $(ARFLAGS) +@SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_DEPENDENCIES =3D \ +@SIM_ENABLE_ARCH_v850_TRUE@ $(common_libcommon_a_OBJECTS) \ +@SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_v850_TRUE@ %,v850/%,$(SIM_NEW_COMMON_OBJS)) \ +@SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_v850_TRUE@ %,v850/dv-%.o,$(SIM_HW_DEVICES)) \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/simops.o v850/interp.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.o v850/semantics.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.o v850/icache.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.o v850/irun.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/support.o v850/modules.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/sim-resume.o +am_v850_libsim_a_OBJECTS =3D +v850_libsim_a_OBJECTS =3D $(am_v850_libsim_a_OBJECTS) @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 =3D $(IGEN) igen/filter$(EXEEXT) \ @SIM_ENABLE_IGEN_TRUE@ igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \ @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode$(EXEEXT) \ @@ -1192,11 +1208,12 @@ SOURCES =3D $(aarch64_libsim_a_SOURCES) $(arm_libsi= m_a_SOURCES) \ $(or1k_libsim_a_SOURCES) $(pru_libsim_a_SOURCES) \ $(riscv_libsim_a_SOURCES) $(rl78_libsim_a_SOURCES) \ $(rx_libsim_a_SOURCES) $(sh_libsim_a_SOURCES) \ - $(aarch64_run_SOURCES) $(arm_run_SOURCES) $(avr_run_SOURCES) \ - $(bfin_run_SOURCES) $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) \ - $(cr16_run_SOURCES) $(cris_run_SOURCES) \ - $(cris_rvdummy_SOURCES) $(d10v_gencode_SOURCES) \ - $(d10v_run_SOURCES) $(erc32_run_SOURCES) erc32/sis.c \ + $(v850_libsim_a_SOURCES) $(aarch64_run_SOURCES) \ + $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \ + $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \ + $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \ + $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \ + $(erc32_run_SOURCES) erc32/sis.c \ $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \ $(ft32_run_SOURCES) $(h8300_run_SOURCES) \ $(igen_filter_SOURCES) $(igen_gen_SOURCES) \ @@ -1761,12 +1778,12 @@ noinst_LIBRARIES =3D common/libcommon.a $(am__appen= d_5) $(am__append_8) \ $(am__append_86) $(am__append_91) $(am__append_101) \ $(am__append_107) $(am__append_109) $(am__append_111) \ $(am__append_117) $(am__append_119) $(am__append_121) \ - $(am__append_123) $(am__append_125) + $(am__append_123) $(am__append_125) $(am__append_131) BUILT_SOURCES =3D $(am__append_19) $(am__append_24) $(am__append_32) \ $(am__append_37) $(am__append_49) $(am__append_58) \ $(am__append_64) $(am__append_75) $(am__append_94) \ $(am__append_104) $(am__append_113) $(am__append_127) \ - $(am__append_132) + $(am__append_133) CLEANFILES =3D common/version.c common/version.c-stamp \ testsuite/common/bits-gen testsuite/common/bits32m0.c \ testsuite/common/bits32m31.c testsuite/common/bits64m0.c \ @@ -1781,7 +1798,7 @@ MOSTLYCLEANFILES =3D core $(common_HW_CONFIG_H_TARGET= S) $(patsubst \ $(am__append_51) $(am__append_60) $(am__append_66) \ $(am__append_71) $(am__append_77) $(am__append_83) \ $(am__append_99) $(am__append_106) $(am__append_115) \ - $(am__append_130) $(am__append_134) + $(am__append_130) $(am__append_135) AM_CFLAGS =3D $(WERROR_CFLAGS) $(WARN_CFLAGS) AM_CPPFLAGS =3D $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \ $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \ @@ -1797,7 +1814,7 @@ SIM_ALL_RECURSIVE_DEPS =3D common/libcommon.a \ $(am__append_59) $(am__append_65) $(am__append_69) \ $(am__append_76) $(am__append_81) $(am__append_98) \ $(am__append_105) $(am__append_114) $(am__append_128) \ - $(am__append_133) + $(am__append_134) SIM_INSTALL_DATA_LOCAL_DEPS =3D=20 SIM_INSTALL_EXEC_LOCAL_DEPS =3D $(am__append_43) SIM_UNINSTALL_LOCAL_DEPS =3D $(am__append_44) @@ -2838,6 +2855,23 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/table.c =20 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES =3D sh/gencode.c +@SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD =3D \ +@SIM_ENABLE_ARCH_v850_TRUE@ $(common_libcommon_a_OBJECTS) \ +@SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst %,v850/%,$(SIM_NEW_COMMON_OBJS)) \ +@SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst %,v850/dv-%.o,$(SIM_HW_DEVICES)) \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/simops.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/interp.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/irun.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/support.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/modules.o \ +@SIM_ENABLE_ARCH_v850_TRUE@ v850/sim-resume.o + @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =3D=20 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD =3D \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/nrun.o \ @@ -3368,6 +3402,14 @@ sh/libsim.a: $(sh_libsim_a_OBJECTS) $(sh_libsim_a_DE= PENDENCIES) $(EXTRA_sh_libsi $(AM_V_at)-rm -f sh/libsim.a $(AM_V_AR)$(sh_libsim_a_AR) sh/libsim.a $(sh_libsim_a_OBJECTS) $(sh_libsi= m_a_LIBADD) $(AM_V_at)$(RANLIB) sh/libsim.a +v850/$(am__dirstamp): + @$(MKDIR_P) v850 + @: > v850/$(am__dirstamp) + +v850/libsim.a: $(v850_libsim_a_OBJECTS) $(v850_libsim_a_DEPENDENCIES) $(EX= TRA_v850_libsim_a_DEPENDENCIES) v850/$(am__dirstamp) + $(AM_V_at)-rm -f v850/libsim.a + $(AM_V_AR)$(v850_libsim_a_AR) v850/libsim.a $(v850_libsim_a_OBJECTS) $(v8= 50_libsim_a_LIBADD) + $(AM_V_at)$(RANLIB) v850/libsim.a =20 clean-checkPROGRAMS: @list=3D'$(check_PROGRAMS)'; test -n "$$list" || exit 0; \ @@ -3635,9 +3677,6 @@ testsuite/common/bits64m63.$(OBJEXT): \ testsuite/common/$(DEPDIR)/$(am__dirstamp) testsuite/common/fpu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \ testsuite/common/$(DEPDIR)/$(am__dirstamp) -v850/$(am__dirstamp): - @$(MKDIR_P) v850 - @: > v850/$(am__dirstamp) =20 v850/run$(EXEEXT): $(v850_run_OBJECTS) $(v850_run_DEPENDENCIES) $(EXTRA_v8= 50_run_DEPENDENCIES) v850/$(am__dirstamp) @rm -f v850/run$(EXEEXT) @@ -5411,6 +5450,13 @@ testsuite/common/bits64m63.c: testsuite/common/bits-= gen$(EXEEXT) testsuite/commo =20 @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT) @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -s >$@ +@SIM_ENABLE_ARCH_v850_TRUE@$(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD= ): v850/hw-config.h + +@SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: v850/%.c +@SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@= F) + +@SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: common/%.c +@SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@= F) @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS) =20 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen diff --git a/sim/v850/Makefile.in b/sim/v850/Makefile.in index e23e644aec5..61df283a31c 100644 --- a/sim/v850/Makefile.in +++ b/sim/v850/Makefile.in @@ -17,11 +17,7 @@ =20 ## COMMON_PRE_CONFIG_FRAG =20 -SIM_OBJS =3D \ - $(SIM_NEW_COMMON_OBJS) \ - simops.o interp.o \ - itable.o semantics.o idecode.o icache.o engine.o irun.o support.o \ - sim-resume.o +SIM_LIBSIM =3D =20 SIM_EXTRA_CFLAGS =3D -DWITH_TARGET_WORD_BITSIZE=3D32 -DWITH_TARGET_WORD_MS= B=3D31 =20 diff --git a/sim/v850/local.mk b/sim/v850/local.mk index 2c27d0c6d7e..769c6030d6e 100644 --- a/sim/v850/local.mk +++ b/sim/v850/local.mk @@ -16,6 +16,32 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 +%C%_libsim_a_SOURCES =3D +%C%_libsim_a_LIBADD =3D \ + $(common_libcommon_a_OBJECTS) \ + $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ + $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ + %D%/simops.o \ + %D%/interp.o \ + %D%/itable.o \ + %D%/semantics.o \ + %D%/idecode.o \ + %D%/icache.o \ + %D%/engine.o \ + %D%/irun.o \ + %D%/support.o \ + %D%/modules.o \ + %D%/sim-resume.o +$(%C%_libsim_a_OBJECTS) $(%C%_libsim_a_LIBADD): %D%/hw-config.h + +noinst_LIBRARIES +=3D %D%/libsim.a + +%D%/%.o: %D%/%.c + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + +%D%/%.o: common/%.c + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + %C%_run_SOURCES =3D %C%_run_LDADD =3D \ %D%/nrun.o \