From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1521) id 5FAE03858D1E; Sun, 15 Jan 2023 01:49:56 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5FAE03858D1E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1673747396; bh=LzyKmM95GFDJS29JlzcglVLbbcBlkCMyA3lH15T8erc=; h=From:To:Subject:Date:From; b=to4+/t+10/C+DEoy7Ma3fUQh4fCx7LZ6d1zd6mKm8ht4t/vcKnHIkWRPMEqJaAw7y 9KZ8S/v2vGRBhb0Ts5xqEs1OV/jsrXXgEpjqzeDRZdEoLHtXxSkP4fUeLUwObjRiV+ PFkfvfRmUgJ/idChDLehyCBli4BExrTlLOuCgu/8= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Frysinger To: gdb-cvs@sourceware.org Subject: [binutils-gdb] sim: common: move libcommon.a objects to sources X-Act-Checkin: binutils-gdb X-Git-Author: Mike Frysinger X-Git-Refname: refs/heads/master X-Git-Oldrev: 0e7c397dbf3b9af7f132963e2ecc52585f1ee7d0 X-Git-Newrev: eac2fbdc4ba9116693f838d82edb844cccce8dd9 Message-Id: <20230115014956.5FAE03858D1E@sourceware.org> Date: Sun, 15 Jan 2023 01:49:56 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3Deac2fbdc4ba9= 116693f838d82edb844cccce8dd9 commit eac2fbdc4ba9116693f838d82edb844cccce8dd9 Author: Mike Frysinger Date: Mon Jan 2 14:15:02 2023 -0500 sim: common: move libcommon.a objects to sources =20 This simplifies the build logic and avoids an Automake bug where the common_libcommon_a_OBJECTS variable isn't set in the arch libsim.a DEPENDENCIES for targets that, alphabetically, come before "common". We aren't affected by that bug with the current code, but as we move things out of SIM_ALL_RECURSIVE_DEPS and rely on finer dependencies, we will trip over it. Diff: --- sim/Makefile.in | 401 +++++++++++++++++++++++----------------= ---- sim/aarch64/local.mk | 4 +- sim/arm/local.mk | 4 +- sim/avr/local.mk | 4 +- sim/bfin/local.mk | 4 +- sim/bpf/local.mk | 4 +- sim/common/local.mk | 1 + sim/cr16/local.mk | 4 +- sim/cris/local.mk | 4 +- sim/d10v/local.mk | 4 +- sim/erc32/local.mk | 4 +- sim/example-synacor/local.mk | 4 +- sim/frv/local.mk | 4 +- sim/ft32/local.mk | 4 +- sim/h8300/local.mk | 4 +- sim/iq2000/local.mk | 4 +- sim/lm32/local.mk | 4 +- sim/m32c/local.mk | 4 +- sim/m32r/local.mk | 4 +- sim/m68hc11/local.mk | 4 +- sim/mcore/local.mk | 4 +- sim/microblaze/local.mk | 4 +- sim/mips/local.mk | 4 +- sim/mn10300/local.mk | 4 +- sim/moxie/local.mk | 4 +- sim/msp430/local.mk | 4 +- sim/or1k/local.mk | 4 +- sim/pru/local.mk | 4 +- sim/riscv/local.mk | 4 +- sim/rl78/local.mk | 4 +- sim/rx/local.mk | 4 +- sim/sh/local.mk | 4 +- sim/v850/local.mk | 4 +- 33 files changed, 275 insertions(+), 251 deletions(-) diff --git a/sim/Makefile.in b/sim/Makefile.in index 1d6f5c6ce5c..ddc98822614 100644 --- a/sim/Makefile.in +++ b/sim/Makefile.in @@ -396,9 +396,17 @@ aarch64_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/modules.o \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/sim-resume.o \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/simulator.o -am_aarch64_libsim_a_OBJECTS =3D -aarch64_libsim_a_OBJECTS =3D $(am_aarch64_libsim_a_OBJECTS) am__dirstamp =3D $(am__leading_dot)dirstamp +am__objects_1 =3D common/callback.$(OBJEXT) common/portability.$(OBJEXT) \ + common/sim-load.$(OBJEXT) common/syscall.$(OBJEXT) \ + common/target-newlib-errno.$(OBJEXT) \ + common/target-newlib-open.$(OBJEXT) \ + common/target-newlib-signal.$(OBJEXT) \ + common/target-newlib-syscall.$(OBJEXT) \ + common/version.$(OBJEXT) +@SIM_ENABLE_ARCH_aarch64_TRUE@am_aarch64_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_aarch64_TRUE@ $(am__objects_1) +aarch64_libsim_a_OBJECTS =3D $(am_aarch64_libsim_a_OBJECTS) arm_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_DEPENDENCIES =3D arm/wrapper.o \ @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst \ @@ -411,7 +419,7 @@ arm_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_arm_TRUE@ arm/thumbemu.o arm/armcopro.o \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/maverick.o arm/iwmmxt.o \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/modules.o -am_arm_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_arm_TRUE@am_arm_libsim_a_OBJECTS =3D $(am__objects_1) arm_libsim_a_OBJECTS =3D $(am_arm_libsim_a_OBJECTS) avr_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_DEPENDENCIES =3D avr/interp.o \ @@ -420,7 +428,7 @@ avr_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_avr_TRUE@ %,avr/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_avr_TRUE@ avr/modules.o avr/sim-resume.o -am_avr_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_avr_TRUE@am_avr_libsim_a_OBJECTS =3D $(am__objects_1) avr_libsim_a_OBJECTS =3D $(am_avr_libsim_a_OBJECTS) bfin_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_DEPENDENCIES =3D $(patsubst \ @@ -433,7 +441,8 @@ bfin_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/gui.o bfin/interp.o \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/machs.o bfin/modules.o \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/sim-resume.o -am_bfin_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_bfin_TRUE@am_bfin_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_bfin_TRUE@ $(am__objects_1) bfin_libsim_a_OBJECTS =3D $(am_bfin_libsim_a_OBJECTS) bpf_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_DEPENDENCIES =3D $(patsubst \ @@ -449,7 +458,7 @@ bpf_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.o bpf/bpf.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf-helpers.o bpf/sim-if.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/traps.o -am_bpf_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_bpf_TRUE@am_bpf_libsim_a_OBJECTS =3D $(am__objects_1) bpf_libsim_a_OBJECTS =3D $(am_bpf_libsim_a_OBJECTS) common_libcommon_a_AR =3D $(AR) $(ARFLAGS) common_libcommon_a_LIBADD =3D @@ -462,21 +471,18 @@ am_common_libcommon_a_OBJECTS =3D common/callback.$(O= BJEXT) \ common/version.$(OBJEXT) common_libcommon_a_OBJECTS =3D $(am_common_libcommon_a_OBJECTS) cr16_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_cr16_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_DEPENDENCIES =3D $(patsubst \ @SIM_ENABLE_ARCH_cr16_TRUE@ %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_cr16_TRUE@ %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/interp.o cr16/modules.o \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/sim-resume.o cr16/simops.o \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.o -am_cr16_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_cr16_TRUE@ $(am__objects_1) cr16_libsim_a_OBJECTS =3D $(am_cr16_libsim_a_OBJECTS) cris_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_cris_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_DEPENDENCIES =3D $(patsubst \ @SIM_ENABLE_ARCH_cris_TRUE@ %,cris/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_cris_TRUE@ %,cris/dv-%.o,$(SIM_HW_DEVICES)) \ @@ -492,32 +498,32 @@ cris_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev32.o cris/modelv32.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.o cris/sim-if.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/traps.o -am_cris_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_cris_TRUE@am_cris_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_cris_TRUE@ $(am__objects_1) cris_libsim_a_OBJECTS =3D $(am_cris_libsim_a_OBJECTS) d10v_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_d10v_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/interp.o $(patsubst \ +@SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_DEPENDENCIES =3D d10v/interp.o \ +@SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_d10v_TRUE@ %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_d10v_TRUE@ %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/endian.o d10v/modules.o \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/sim-resume.o d10v/simops.o \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.o -am_d10v_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_d10v_TRUE@ $(am__objects_1) d10v_libsim_a_OBJECTS =3D $(am_d10v_libsim_a_OBJECTS) erc32_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_erc32_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/erc32.o erc32/exec.o \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/float.o erc32/func.o \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/help.o erc32/interf.o \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/modules.o -am_erc32_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_erc32_TRUE@am_erc32_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_erc32_TRUE@ $(am__objects_1) erc32_libsim_a_OBJECTS =3D $(am_erc32_libsim_a_OBJECTS) example_synacor_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)= ) \ @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \ @@ -526,13 +532,12 @@ example_synacor_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.o \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o -am_example_synacor_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_examples_TRUE@am_example_synacor_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_examples_TRUE@ $(am__objects_1) example_synacor_libsim_a_OBJECTS =3D \ $(am_example_synacor_libsim_a_OBJECTS) frv_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_frv_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_DEPENDENCIES =3D $(patsubst \ @SIM_ENABLE_ARCH_frv_TRUE@ %,frv/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_frv_TRUE@ %,frv/dv-%.o,$(SIM_HW_DEVICES)) \ @@ -550,28 +555,27 @@ frv_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr500.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr550.o frv/registers.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/reset.o frv/sim-if.o frv/traps.o -am_frv_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_frv_TRUE@am_frv_libsim_a_OBJECTS =3D $(am__objects_1) frv_libsim_a_OBJECTS =3D $(am_frv_libsim_a_OBJECTS) ft32_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_ft32_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_DEPENDENCIES =3D $(patsubst \ @SIM_ENABLE_ARCH_ft32_TRUE@ %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_ft32_TRUE@ %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/interp.o ft32/modules.o \ @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/sim-resume.o -am_ft32_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_ft32_TRUE@am_ft32_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_ft32_TRUE@ $(am__objects_1) ft32_libsim_a_OBJECTS =3D $(am_ft32_libsim_a_OBJECTS) h8300_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_h8300_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/compile.o $(patsubst \ @SIM_ENABLE_ARCH_h8300_TRUE@ %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_h8300_TRUE@ %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/modules.o h8300/sim-resume.o -am_h8300_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_h8300_TRUE@am_h8300_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_h8300_TRUE@ $(am__objects_1) h8300_libsim_a_OBJECTS =3D $(am_h8300_libsim_a_OBJECTS) igen_libigen_a_AR =3D $(AR) $(ARFLAGS) igen_libigen_a_LIBADD =3D @@ -594,7 +598,6 @@ igen_libigen_a_LIBADD =3D igen_libigen_a_OBJECTS =3D $(am_igen_libigen_a_OBJECTS) iq2000_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_iq2000_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_iq2000_TRUE@ %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst \ @@ -608,12 +611,11 @@ iq2000_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/iq2000.o iq2000/sem.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.o iq2000/model.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sim-if.o -am_iq2000_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_iq2000_TRUE@am_iq2000_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_iq2000_TRUE@ $(am__objects_1) iq2000_libsim_a_OBJECTS =3D $(am_iq2000_libsim_a_OBJECTS) lm32_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_lm32_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_DEPENDENCIES =3D $(patsubst \ @SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \ @@ -627,23 +629,21 @@ lm32_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.o lm32/model.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/lm32.o lm32/sim-if.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/traps.o lm32/user.o -am_lm32_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_lm32_TRUE@am_lm32_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_lm32_TRUE@ $(am__objects_1) lm32_libsim_a_OBJECTS =3D $(am_lm32_libsim_a_OBJECTS) m32c_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_m32c_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/gdb-if.o m32c/int.o \ -@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/load.o m32c/m32c.o m32c/mem.o \ -@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/misc.o m32c/modules.o \ -@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.o m32c/reg.o \ -@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/srcdest.o m32c/syscalls.o \ -@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/trace.o -am_m32c_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_DEPENDENCIES =3D m32c/gdb-if.o \ +@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/int.o m32c/load.o m32c/m32c.o \ +@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/mem.o m32c/misc.o \ +@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/modules.o m32c/r8c.o \ +@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/reg.o m32c/srcdest.o \ +@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/syscalls.o m32c/trace.o +@SIM_ENABLE_ARCH_m32c_TRUE@am_m32c_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_m32c_TRUE@ $(am__objects_1) m32c_libsim_a_OBJECTS =3D $(am_m32c_libsim_a_OBJECTS) m32r_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_m32r_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_DEPENDENCIES =3D $(patsubst \ @SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \ @@ -661,11 +661,11 @@ m32r_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu2.o m32r/decode2.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model2.o m32r/mloop2.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sim-if.o m32r/traps.o -am_m32r_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_m32r_TRUE@am_m32r_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_m32r_TRUE@ $(am__objects_1) m32r_libsim_a_OBJECTS =3D $(am_m32r_libsim_a_OBJECTS) m68hc11_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interp.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.o \ @@ -679,20 +679,21 @@ m68hc11_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEV= ICES)) \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/modules.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/sim-resume.o -am_m68hc11_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_m68hc11_TRUE@am_m68hc11_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(am__objects_1) m68hc11_libsim_a_OBJECTS =3D $(am_m68hc11_libsim_a_OBJECTS) mcore_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_mcore_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/interp.o $(patsubst \ @SIM_ENABLE_ARCH_mcore_TRUE@ %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_mcore_TRUE@ %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/modules.o mcore/sim-resume.o -am_mcore_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_mcore_TRUE@am_mcore_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_mcore_TRUE@ $(am__objects_1) mcore_libsim_a_OBJECTS =3D $(am_mcore_libsim_a_OBJECTS) microblaze_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_DEPENDENCIES =3D $(co= mmon_libcommon_a_OBJECTS) \ +@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_DEPENDENCIES =3D \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/interp.o \ @SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_microblaze_TRUE@ %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \ @@ -700,7 +701,8 @@ microblaze_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_microblaze_TRUE@ %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/modules.o \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/sim-resume.o -am_microblaze_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_microblaze_TRUE@am_microblaze_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_microblaze_TRUE@ $(am__objects_1) microblaze_libsim_a_OBJECTS =3D $(am_microblaze_libsim_a_OBJECTS) mips_libsim_a_AR =3D $(AR) $(ARFLAGS) am__DEPENDENCIES_1 =3D @@ -710,10 +712,8 @@ am__DEPENDENCIES_1 =3D @SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 =3D $(am__append_81) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_82) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(am__DEPENDENCIES_2) -@SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_mips_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_mips_TRUE@ mips/interp.o $(am__DEPENDENCIES_3) \ -@SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES =3D mips/interp.o \ +@SIM_ENABLE_ARCH_mips_TRUE@ $(am__DEPENDENCIES_3) $(patsubst \ @SIM_ENABLE_ARCH_mips_TRUE@ %,mips/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_mips_TRUE@ %,mips/dv-%.o,$(SIM_HW_DEVICES)) \ @@ -722,11 +722,11 @@ am__DEPENDENCIES_1 =3D @SIM_ENABLE_ARCH_mips_TRUE@ mips/cp1.o mips/dsp.o mips/mdmx.o \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/modules.o mips/sim-main.o \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/sim-resume.o -am_mips_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_mips_TRUE@am_mips_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_mips_TRUE@ $(am__objects_1) mips_libsim_a_OBJECTS =3D $(am_mips_libsim_a_OBJECTS) mn10300_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_mn10300_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.o \ @@ -742,22 +742,21 @@ mn10300_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/modules.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/op_utils.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/sim-resume.o -am_mn10300_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_mn10300_TRUE@am_mn10300_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_mn10300_TRUE@ $(am__objects_1) mn10300_libsim_a_OBJECTS =3D $(am_mn10300_libsim_a_OBJECTS) moxie_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_moxie_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_moxie_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_DEPENDENCIES =3D $(patsubst \ @SIM_ENABLE_ARCH_moxie_TRUE@ %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_moxie_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_moxie_TRUE@ %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/interp.o moxie/modules.o \ @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/sim-resume.o -am_moxie_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_moxie_TRUE@am_moxie_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_moxie_TRUE@ $(am__objects_1) moxie_libsim_a_OBJECTS =3D $(am_moxie_libsim_a_OBJECTS) msp430_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_msp430_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_msp430_TRUE@ %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst \ @@ -765,12 +764,11 @@ msp430_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/msp430-sim.o \ @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/modules.o \ @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/sim-resume.o -am_msp430_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_msp430_TRUE@am_msp430_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_msp430_TRUE@ $(am__objects_1) msp430_libsim_a_OBJECTS =3D $(am_msp430_libsim_a_OBJECTS) or1k_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_or1k_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_DEPENDENCIES =3D $(patsubst \ @SIM_ENABLE_ARCH_or1k_TRUE@ %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_or1k_TRUE@ %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \ @@ -782,62 +780,55 @@ or1k_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/decode.o or1k/mloop.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/model.o or1k/sem.o or1k/or1k.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/sim-if.o or1k/traps.o -am_or1k_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_or1k_TRUE@am_or1k_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_or1k_TRUE@ $(am__objects_1) or1k_libsim_a_OBJECTS =3D $(am_or1k_libsim_a_OBJECTS) pru_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_pru_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_pru_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_DEPENDENCIES =3D $(patsubst \ @SIM_ENABLE_ARCH_pru_TRUE@ %,pru/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_pru_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_pru_TRUE@ %,pru/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_pru_TRUE@ pru/interp.o pru/modules.o \ @SIM_ENABLE_ARCH_pru_TRUE@ pru/sim-resume.o -am_pru_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_pru_TRUE@am_pru_libsim_a_OBJECTS =3D $(am__objects_1) pru_libsim_a_OBJECTS =3D $(am_pru_libsim_a_OBJECTS) riscv_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_riscv_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_riscv_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_DEPENDENCIES =3D $(patsubst \ @SIM_ENABLE_ARCH_riscv_TRUE@ %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_riscv_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_riscv_TRUE@ %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/interp.o riscv/machs.o \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/modules.o riscv/sim-main.o \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/sim-resume.o -am_riscv_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_riscv_TRUE@am_riscv_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_riscv_TRUE@ $(am__objects_1) riscv_libsim_a_OBJECTS =3D $(am_riscv_libsim_a_OBJECTS) rl78_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_rl78_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/load.o rl78/mem.o rl78/cpu.o \ -@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/rl78.o rl78/gdb-if.o \ -@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/modules.o rl78/trace.o -am_rl78_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_DEPENDENCIES =3D rl78/load.o \ +@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/mem.o rl78/cpu.o rl78/rl78.o \ +@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/gdb-if.o rl78/modules.o \ +@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/trace.o +@SIM_ENABLE_ARCH_rl78_TRUE@am_rl78_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_rl78_TRUE@ $(am__objects_1) rl78_libsim_a_OBJECTS =3D $(am_rl78_libsim_a_OBJECTS) rx_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_rx_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_rx_TRUE@ rx/fpu.o rx/load.o rx/mem.o rx/misc.o \ -@SIM_ENABLE_ARCH_rx_TRUE@ rx/reg.o rx/rx.o rx/syscalls.o \ -@SIM_ENABLE_ARCH_rx_TRUE@ rx/trace.o rx/gdb-if.o rx/err.o \ -@SIM_ENABLE_ARCH_rx_TRUE@ rx/modules.o -am_rx_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_DEPENDENCIES =3D rx/fpu.o rx/load.o \ +@SIM_ENABLE_ARCH_rx_TRUE@ rx/mem.o rx/misc.o rx/reg.o rx/rx.o \ +@SIM_ENABLE_ARCH_rx_TRUE@ rx/syscalls.o rx/trace.o rx/gdb-if.o \ +@SIM_ENABLE_ARCH_rx_TRUE@ rx/err.o rx/modules.o +@SIM_ENABLE_ARCH_rx_TRUE@am_rx_libsim_a_OBJECTS =3D $(am__objects_1) rx_libsim_a_OBJECTS =3D $(am_rx_libsim_a_OBJECTS) sh_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_sh_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_sh_TRUE@ sh/interp.o $(patsubst \ +@SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_DEPENDENCIES =3D sh/interp.o \ +@SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_sh_TRUE@ %,sh/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_sh_TRUE@ %,sh/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/modules.o sh/table.o -am_sh_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_sh_TRUE@am_sh_libsim_a_OBJECTS =3D $(am__objects_1) sh_libsim_a_OBJECTS =3D $(am_sh_libsim_a_OBJECTS) v850_libsim_a_AR =3D $(AR) $(ARFLAGS) -@SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_DEPENDENCIES =3D \ -@SIM_ENABLE_ARCH_v850_TRUE@ $(common_libcommon_a_OBJECTS) \ -@SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_DEPENDENCIES =3D $(patsubst \ @SIM_ENABLE_ARCH_v850_TRUE@ %,v850/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_v850_TRUE@ %,v850/dv-%.o,$(SIM_HW_DEVICES)) \ @@ -847,7 +838,8 @@ v850_libsim_a_AR =3D $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.o v850/irun.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.o v850/modules.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/sim-resume.o -am_v850_libsim_a_OBJECTS =3D +@SIM_ENABLE_ARCH_v850_TRUE@am_v850_libsim_a_OBJECTS =3D \ +@SIM_ENABLE_ARCH_v850_TRUE@ $(am__objects_1) v850_libsim_a_OBJECTS =3D $(am_v850_libsim_a_OBJECTS) @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 =3D $(IGEN) igen/filter$(EXEEXT) \ @SIM_ENABLE_IGEN_TRUE@ igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \ @@ -1966,9 +1958,10 @@ testsuite_common_CPPFLAGS =3D \ -I$(srcroot)/include \ -I../bfd =20 -@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_aarch64_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_aarch64_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJ= S)) \ @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICE= S)) \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/cpustate.o \ @@ -1985,9 +1978,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_aarch64_TRUE@ $(SIM_COMMON_LIBS) =20 @SIM_ENABLE_ARCH_arm_TRUE@AM_CPPFLAGS_arm =3D -DMODET -@SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_arm_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_arm_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/wrapper.o \ @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \ @@ -2005,9 +1999,10 @@ testsuite_common_CPPFLAGS =3D \ =20 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir =3D $(docdir)/arm @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA =3D arm/README -@SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_avr_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_avr_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_avr_TRUE@ avr/interp.o \ @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \ @@ -2021,9 +2016,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_avr_TRUE@ $(SIM_COMMON_LIBS) =20 @SIM_ENABLE_ARCH_bfin_TRUE@AM_CPPFLAGS_bfin =3D $(SDL_CFLAGS) -@SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_bfin_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_bfin_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_D= EVICES)) \ @@ -2081,9 +2077,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_be.o =3D -DWANT_ISA_EBPFBE @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_le.o =3D -DWANT_ISA_EBPFLE @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_be.o =3D -DWANT_ISA_EBPFBE -@SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_bpf_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_bpf_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/modules.o \ @@ -2119,9 +2116,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.c \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-be =20 -@SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_cr16_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_cr16_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/interp.o \ @@ -2142,9 +2140,10 @@ testsuite_common_CPPFLAGS =3D \ =20 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES =3D cr16/gencode.c @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD =3D cr16/cr16-opc.o -@SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_cris_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_cris_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_D= EVICES)) \ @@ -2185,9 +2184,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.c \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v32f =20 -@SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_d10v_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_d10v_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/interp.o \ @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \ @@ -2212,9 +2212,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_erc32_TRUE@READLINE_SRC =3D $(srcroot)/readline/readline @SIM_ENABLE_ARCH_erc32_TRUE@AM_CPPFLAGS_erc32 =3D $(READLINE_CFLAGS) \ @SIM_ENABLE_ARCH_erc32_TRUE@ -DFAST_UART -@SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_erc32_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_erc32_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/erc32.o \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/exec.o \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/float.o \ @@ -2231,9 +2232,10 @@ testsuite_common_CPPFLAGS =3D \ =20 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir =3D $(docdir)/erc32 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA =3D erc32/README.erc32 erc32/REA= DME.gdb erc32/README.sis -@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/%,$(SIM_NEW_C= OMMON_OBJS)) \ @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/dv-%.o,$(SIM_= HW_DEVICES)) \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \ @@ -2250,9 +2252,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_frv_TRUE@AM_CPPFLAGS_frv =3D $(SIM_FRV_TRAPDUMP_FLAGS) @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_memory.o =3D -Wno-error @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_sem.o =3D -Wno-error -@SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_frv_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_frv_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst %,frv/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst %,frv/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/modules.o \ @@ -2300,9 +2303,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/mloop.c \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/stamp-mloop =20 -@SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_ft32_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_ft32_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/interp.o \ @@ -2315,9 +2319,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/libsim.a \ @SIM_ENABLE_ARCH_ft32_TRUE@ $(SIM_COMMON_LIBS) =20 -@SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_h8300_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_h8300_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/compile.o \ @SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \ @@ -2330,9 +2335,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/libsim.a \ @SIM_ENABLE_ARCH_h8300_TRUE@ $(SIM_COMMON_LIBS) =20 -@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_iq2000_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_iq2000_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst %,iq2000/%,$(SIM_NEW_COMMON_OBJS)= ) \ @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst %,iq2000/dv-%.o,$(SIM_HW_DEVICES)= ) \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/modules.o \ @@ -2362,9 +2368,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.c \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/stamp-mloop =20 -@SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_lm32_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_lm32_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_D= EVICES)) \ @@ -2399,9 +2406,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/stamp-mloop =20 @SIM_ENABLE_ARCH_m32c_TRUE@AM_CPPFLAGS_m32c =3D -DTIMER_A -@SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_m32c_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_m32c_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/gdb-if.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/int.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/load.o \ @@ -2443,9 +2451,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sem.o =3D -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sim_if.o =3D -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_traps.o =3D -Wno-error -@SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_m32r_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_m32r_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_D= EVICES)) \ @@ -2501,9 +2510,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_ADDRESS_BITSIZE=3D32 \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_WORD_MSB=3D31 =20 -@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interp.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.o \ @@ -2529,9 +2539,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.c =20 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES =3D m68hc11/gencode.c -@SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_mcore_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_mcore_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/interp.o \ @SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \ @@ -2544,9 +2555,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/libsim.a \ @SIM_ENABLE_ARCH_mcore_TRUE@ $(SIM_COMMON_LIBS) =20 -@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_microblaze_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_microblaze_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/interp.o \ @SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst %,microblaze/%,$(SIM_NEW_COMM= ON_OBJS)) \ @SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst %,microblaze/dv-%.o,$(SIM_HW_= DEVICES)) \ @@ -2566,9 +2578,10 @@ testsuite_common_CPPFLAGS =3D \ =20 @SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ =3D $(am__append_81) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_82) $(am__append_83) -@SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_mips_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_mips_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/interp.o \ @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_GEN_OBJ) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst %,mips/%,$(SIM_NEW_COMMON_OBJS)) \ @@ -2661,9 +2674,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -DPOLL_QUIT_INTERVAL=3D0x20 \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -DWITH_TARGET_WORD_BITSIZE=3D32 -DWITH_TARG= ET_WORD_MSB=3D31 =20 -@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_mn10300_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_mn10300_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.o \ @@ -2712,9 +2726,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC =3D mn10300/am33.igen = mn10300/am33-2.igen @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC =3D $(srcdir)/mn10300/mn1030= 0.dc @SIM_ENABLE_ARCH_moxie_TRUE@AM_CPPFLAGS_moxie =3D -DDTB=3D"\"$(dtbdir)/mox= ie-gdb.dtb\"" -@SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_moxie_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_moxie_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_moxie_TRUE@ $(patsubst %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_moxie_TRUE@ $(patsubst %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/interp.o \ @@ -2729,9 +2744,10 @@ testsuite_common_CPPFLAGS =3D \ =20 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir =3D $(datadir)/gdb/dtb @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA =3D moxie/moxie-gdb.dtb -@SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_msp430_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_msp430_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst %,msp430/%,$(SIM_NEW_COMMON_OBJS)= ) \ @SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst %,msp430/dv-%.o,$(SIM_HW_DEVICES)= ) \ @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/msp430-sim.o \ @@ -2745,9 +2761,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_msp430_TRUE@ $(SIM_COMMON_LIBS) =20 @SIM_ENABLE_ARCH_or1k_TRUE@AM_CPPFLAGS_or1k =3D -DWITH_TARGET_WORD_BITSIZE= =3D32 -DWITH_TARGET_WORD_MSB=3D31 -@SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_or1k_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_or1k_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/modules.o \ @@ -2790,9 +2807,10 @@ testsuite_common_CPPFLAGS =3D \ =20 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir =3D $(docdir)/ppc @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA =3D ppc/BUGS ppc/INSTALL ppc/README = ppc/RUN -@SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_pru_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_pru_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_pru_TRUE@ $(patsubst %,pru/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_pru_TRUE@ $(patsubst %,pru/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_pru_TRUE@ pru/interp.o \ @@ -2806,9 +2824,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_pru_TRUE@ $(SIM_COMMON_LIBS) =20 @SIM_ENABLE_ARCH_riscv_TRUE@AM_CPPFLAGS_riscv =3D -DWITH_TARGET_WORD_BITSI= ZE=3D$(SIM_RISCV_BITSIZE) -@SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_riscv_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_riscv_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_riscv_TRUE@ $(patsubst %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_riscv_TRUE@ $(patsubst %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/interp.o \ @@ -2823,9 +2842,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/libsim.a \ @SIM_ENABLE_ARCH_riscv_TRUE@ $(SIM_COMMON_LIBS) =20 -@SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_rl78_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_rl78_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/load.o \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/mem.o \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/cpu.o \ @@ -2841,9 +2861,10 @@ testsuite_common_CPPFLAGS =3D \ @SIM_ENABLE_ARCH_rl78_TRUE@ $(SIM_COMMON_LIBS) =20 @SIM_ENABLE_ARCH_rx_TRUE@AM_CPPFLAGS_rx =3D $(SIM_RX_CYCLE_ACCURATE_FLAGS) -@SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_rx_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_rx_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/fpu.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/load.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/mem.o \ @@ -2864,9 +2885,10 @@ testsuite_common_CPPFLAGS =3D \ =20 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir =3D $(docdir)/rx @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA =3D rx/README.txt -@SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_sh_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_sh_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/interp.o \ @SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst %,sh/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst %,sh/dv-%.o,$(SIM_HW_DEVICES)) \ @@ -2885,9 +2907,10 @@ testsuite_common_CPPFLAGS =3D \ =20 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES =3D sh/gencode.c @SIM_ENABLE_ARCH_v850_TRUE@AM_CPPFLAGS_v850 =3D -DWITH_TARGET_WORD_BITSIZE= =3D32 -DWITH_TARGET_WORD_MSB=3D31 -@SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES =3D=20 +@SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES =3D \ +@SIM_ENABLE_ARCH_v850_TRUE@ $(common_libcommon_a_SOURCES) + @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD =3D \ -@SIM_ENABLE_ARCH_v850_TRUE@ $(common_libcommon_a_OBJECTS) \ @SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst %,v850/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst %,v850/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/simops.o \ @@ -3057,6 +3080,30 @@ arch-subdir.mk: $(top_builddir)/config.status $(srcd= ir)/arch-subdir.mk.in =20 clean-noinstLIBRARIES: -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES) +common/$(am__dirstamp): + @$(MKDIR_P) common + @: > common/$(am__dirstamp) +common/$(DEPDIR)/$(am__dirstamp): + @$(MKDIR_P) common/$(DEPDIR) + @: > common/$(DEPDIR)/$(am__dirstamp) +common/callback.$(OBJEXT): common/$(am__dirstamp) \ + common/$(DEPDIR)/$(am__dirstamp) +common/portability.$(OBJEXT): common/$(am__dirstamp) \ + common/$(DEPDIR)/$(am__dirstamp) +common/sim-load.$(OBJEXT): common/$(am__dirstamp) \ + common/$(DEPDIR)/$(am__dirstamp) +common/syscall.$(OBJEXT): common/$(am__dirstamp) \ + common/$(DEPDIR)/$(am__dirstamp) +common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \ + common/$(DEPDIR)/$(am__dirstamp) +common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \ + common/$(DEPDIR)/$(am__dirstamp) +common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \ + common/$(DEPDIR)/$(am__dirstamp) +common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \ + common/$(DEPDIR)/$(am__dirstamp) +common/version.$(OBJEXT): common/$(am__dirstamp) \ + common/$(DEPDIR)/$(am__dirstamp) aarch64/$(am__dirstamp): @$(MKDIR_P) aarch64 @: > aarch64/$(am__dirstamp) @@ -3097,30 +3144,6 @@ bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a= _DEPENDENCIES) $(EXTRA_bpf_l $(AM_V_at)-rm -f bpf/libsim.a $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_l= ibsim_a_LIBADD) $(AM_V_at)$(RANLIB) bpf/libsim.a -common/$(am__dirstamp): - @$(MKDIR_P) common - @: > common/$(am__dirstamp) -common/$(DEPDIR)/$(am__dirstamp): - @$(MKDIR_P) common/$(DEPDIR) - @: > common/$(DEPDIR)/$(am__dirstamp) -common/callback.$(OBJEXT): common/$(am__dirstamp) \ - common/$(DEPDIR)/$(am__dirstamp) -common/portability.$(OBJEXT): common/$(am__dirstamp) \ - common/$(DEPDIR)/$(am__dirstamp) -common/sim-load.$(OBJEXT): common/$(am__dirstamp) \ - common/$(DEPDIR)/$(am__dirstamp) -common/syscall.$(OBJEXT): common/$(am__dirstamp) \ - common/$(DEPDIR)/$(am__dirstamp) -common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \ - common/$(DEPDIR)/$(am__dirstamp) -common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \ - common/$(DEPDIR)/$(am__dirstamp) -common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \ - common/$(DEPDIR)/$(am__dirstamp) -common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \ - common/$(DEPDIR)/$(am__dirstamp) -common/version.$(OBJEXT): common/$(am__dirstamp) \ - common/$(DEPDIR)/$(am__dirstamp) =20 common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEP= ENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp) $(AM_V_at)-rm -f common/libcommon.a diff --git a/sim/aarch64/local.mk b/sim/aarch64/local.mk index 10e814b49f9..ff7c51e4315 100644 --- a/sim/aarch64/local.mk +++ b/sim/aarch64/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ %D%/cpustate.o \ diff --git a/sim/arm/local.mk b/sim/arm/local.mk index c172b5f2682..2e20f853389 100644 --- a/sim/arm/local.mk +++ b/sim/arm/local.mk @@ -18,9 +18,9 @@ =20 AM_CPPFLAGS_%C% =3D -DMODET =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ %D%/wrapper.o \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ diff --git a/sim/avr/local.mk b/sim/avr/local.mk index 3cae5bf8483..0647dedd1bd 100644 --- a/sim/avr/local.mk +++ b/sim/avr/local.mk @@ -15,9 +15,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ %D%/interp.o \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ diff --git a/sim/bfin/local.mk b/sim/bfin/local.mk index 17a5047fa24..9291e0641a3 100644 --- a/sim/bfin/local.mk +++ b/sim/bfin/local.mk @@ -18,9 +18,9 @@ =20 AM_CPPFLAGS_%C% =3D $(SDL_CFLAGS) =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ $(patsubst %,%D%/dv-%.o,$(%C%_SIM_EXTRA_HW_DEVICES)) \ diff --git a/sim/bpf/local.mk b/sim/bpf/local.mk index 5f559c93a02..4218999c7e7 100644 --- a/sim/bpf/local.mk +++ b/sim/bpf/local.mk @@ -23,9 +23,9 @@ AM_CPPFLAGS_%C%_decode_be.o =3D -DWANT_ISA_EBPFBE AM_CPPFLAGS_%C%_sem_le.o =3D -DWANT_ISA_EBPFLE AM_CPPFLAGS_%C%_sem_be.o =3D -DWANT_ISA_EBPFBE =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ %D%/modules.o \ diff --git a/sim/common/local.mk b/sim/common/local.mk index 0ce79014973..cbef45e11e9 100644 --- a/sim/common/local.mk +++ b/sim/common/local.mk @@ -30,6 +30,7 @@ SIM_ALL_RECURSIVE_DEPS +=3D \ =20 ## NB: libcommon.a isn't used directly by ports. We need a target for com= mon ## objects to be a part of, and ports use the individual objects directly. +## We can delete this once ppc/Makefile.in is merged into ppc/local.mk. noinst_LIBRARIES +=3D %D%/libcommon.a %C%_libcommon_a_SOURCES =3D \ %D%/callback.c \ diff --git a/sim/cr16/local.mk b/sim/cr16/local.mk index 8d8d27f82e6..19446381c9f 100644 --- a/sim/cr16/local.mk +++ b/sim/cr16/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ %D%/interp.o \ diff --git a/sim/cris/local.mk b/sim/cris/local.mk index ef78c63062c..14c8644fe07 100644 --- a/sim/cris/local.mk +++ b/sim/cris/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ $(patsubst %,%D%/dv-%.o,$(%C%_SIM_EXTRA_HW_DEVICES)) \ diff --git a/sim/d10v/local.mk b/sim/d10v/local.mk index 04dd763f57c..967d4e7e543 100644 --- a/sim/d10v/local.mk +++ b/sim/d10v/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ %D%/interp.o \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ diff --git a/sim/erc32/local.mk b/sim/erc32/local.mk index 2361cf2eafc..a371fbc542b 100644 --- a/sim/erc32/local.mk +++ b/sim/erc32/local.mk @@ -25,9 +25,9 @@ AM_CPPFLAGS_%C% =3D $(READLINE_CFLAGS) ## behaviour of UART interrupt routines ... AM_CPPFLAGS_%C% +=3D -DFAST_UART =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ %D%/erc32.o \ %D%/exec.o \ %D%/float.o \ diff --git a/sim/example-synacor/local.mk b/sim/example-synacor/local.mk index 37999807ba3..f9d43a89feb 100644 --- a/sim/example-synacor/local.mk +++ b/sim/example-synacor/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ %D%/interp.o \ diff --git a/sim/frv/local.mk b/sim/frv/local.mk index 8c2a6158842..c1a10045a70 100644 --- a/sim/frv/local.mk +++ b/sim/frv/local.mk @@ -22,9 +22,9 @@ AM_CPPFLAGS_%C% =3D $(SIM_FRV_TRAPDUMP_FLAGS) AM_CFLAGS_%C%_memory.o =3D -Wno-error AM_CFLAGS_%C%_sem.o =3D -Wno-error =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ %D%/modules.o \ diff --git a/sim/ft32/local.mk b/sim/ft32/local.mk index 36081effabe..c793f87f4aa 100644 --- a/sim/ft32/local.mk +++ b/sim/ft32/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ %D%/interp.o \ diff --git a/sim/h8300/local.mk b/sim/h8300/local.mk index dca8084763d..04affc9051b 100644 --- a/sim/h8300/local.mk +++ b/sim/h8300/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ %D%/compile.o \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ diff --git a/sim/iq2000/local.mk b/sim/iq2000/local.mk index 34589dbad88..fa498e48595 100644 --- a/sim/iq2000/local.mk +++ b/sim/iq2000/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ %D%/modules.o \ diff --git a/sim/lm32/local.mk b/sim/lm32/local.mk index 1c286245cca..4fecaca6a38 100644 --- a/sim/lm32/local.mk +++ b/sim/lm32/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ $(patsubst %,%D%/dv-%.o,$(%C%_SIM_EXTRA_HW_DEVICES)) \ diff --git a/sim/m32c/local.mk b/sim/m32c/local.mk index ad047f17b78..7093e248c7e 100644 --- a/sim/m32c/local.mk +++ b/sim/m32c/local.mk @@ -18,9 +18,9 @@ =20 AM_CPPFLAGS_%C% =3D -DTIMER_A =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ %D%/gdb-if.o \ %D%/int.o \ %D%/load.o \ diff --git a/sim/m32r/local.mk b/sim/m32r/local.mk index 78c8a87a42e..6a6a6d99912 100644 --- a/sim/m32r/local.mk +++ b/sim/m32r/local.mk @@ -30,9 +30,9 @@ AM_CFLAGS_%C%_sem.o =3D -Wno-error AM_CFLAGS_%C%_sim_if.o =3D -Wno-error AM_CFLAGS_%C%_traps.o =3D -Wno-error =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ $(patsubst %,%D%/dv-%.o,$(%C%_SIM_EXTRA_HW_DEVICES)) \ diff --git a/sim/m68hc11/local.mk b/sim/m68hc11/local.mk index 8f881d5b854..d5faae40ed5 100644 --- a/sim/m68hc11/local.mk +++ b/sim/m68hc11/local.mk @@ -27,9 +27,9 @@ AM_CPPFLAGS_%C% =3D \ -DWITH_TARGET_ADDRESS_BITSIZE=3D32 \ -DWITH_TARGET_WORD_MSB=3D31 =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ %D%/interp.o \ %D%/m68hc11int.o \ %D%/m68hc12int.o \ diff --git a/sim/mcore/local.mk b/sim/mcore/local.mk index dff8a684ef4..4c9cb50af91 100644 --- a/sim/mcore/local.mk +++ b/sim/mcore/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ %D%/interp.o \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ diff --git a/sim/microblaze/local.mk b/sim/microblaze/local.mk index dff8a684ef4..4c9cb50af91 100644 --- a/sim/microblaze/local.mk +++ b/sim/microblaze/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ %D%/interp.o \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ diff --git a/sim/mips/local.mk b/sim/mips/local.mk index e54a0ef6102..942997240c8 100644 --- a/sim/mips/local.mk +++ b/sim/mips/local.mk @@ -53,9 +53,9 @@ if SIM_MIPS_GEN_MODE_MULTI %D%/itable.o \ %D%/multi-run.o endif -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ %D%/interp.o \ $(%C%_GEN_OBJ) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ diff --git a/sim/mn10300/local.mk b/sim/mn10300/local.mk index 0c5d1bf59be..2abd093e834 100644 --- a/sim/mn10300/local.mk +++ b/sim/mn10300/local.mk @@ -20,9 +20,9 @@ AM_CPPFLAGS_%C% =3D \ -DPOLL_QUIT_INTERVAL=3D0x20 \ -DWITH_TARGET_WORD_BITSIZE=3D32 -DWITH_TARGET_WORD_MSB=3D31 =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ %D%/itable.o \ %D%/semantics.o \ %D%/idecode.o \ diff --git a/sim/moxie/local.mk b/sim/moxie/local.mk index 4b7d2984f16..0e07c860787 100644 --- a/sim/moxie/local.mk +++ b/sim/moxie/local.mk @@ -18,9 +18,9 @@ =20 AM_CPPFLAGS_%C% =3D -DDTB=3D"\"$(dtbdir)/moxie-gdb.dtb\"" =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ %D%/interp.o \ diff --git a/sim/msp430/local.mk b/sim/msp430/local.mk index bb7afd30470..27169c50407 100644 --- a/sim/msp430/local.mk +++ b/sim/msp430/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ %D%/msp430-sim.o \ diff --git a/sim/or1k/local.mk b/sim/or1k/local.mk index 2a3b129c9fb..71a34db21d8 100644 --- a/sim/or1k/local.mk +++ b/sim/or1k/local.mk @@ -17,9 +17,9 @@ =20 AM_CPPFLAGS_%C% =3D -DWITH_TARGET_WORD_BITSIZE=3D32 -DWITH_TARGET_WORD_MSB= =3D31 =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ %D%/modules.o \ diff --git a/sim/pru/local.mk b/sim/pru/local.mk index 0048199f6d3..8ffc509c014 100644 --- a/sim/pru/local.mk +++ b/sim/pru/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ %D%/interp.o \ diff --git a/sim/riscv/local.mk b/sim/riscv/local.mk index a3f232eea5e..150639315fa 100644 --- a/sim/riscv/local.mk +++ b/sim/riscv/local.mk @@ -18,9 +18,9 @@ =20 AM_CPPFLAGS_%C% =3D -DWITH_TARGET_WORD_BITSIZE=3D$(SIM_RISCV_BITSIZE) =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ %D%/interp.o \ diff --git a/sim/rl78/local.mk b/sim/rl78/local.mk index 56161eae25a..0d39140ac6b 100644 --- a/sim/rl78/local.mk +++ b/sim/rl78/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ %D%/load.o \ %D%/mem.o \ %D%/cpu.o \ diff --git a/sim/rx/local.mk b/sim/rx/local.mk index 3b1e199e68b..2a9387d27b7 100644 --- a/sim/rx/local.mk +++ b/sim/rx/local.mk @@ -18,9 +18,9 @@ =20 AM_CPPFLAGS_%C% =3D $(SIM_RX_CYCLE_ACCURATE_FLAGS) =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ %D%/fpu.o \ %D%/load.o \ %D%/mem.o \ diff --git a/sim/sh/local.mk b/sim/sh/local.mk index 558a747d266..b197fa4c7c3 100644 --- a/sim/sh/local.mk +++ b/sim/sh/local.mk @@ -16,9 +16,9 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ %D%/interp.o \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ diff --git a/sim/v850/local.mk b/sim/v850/local.mk index 62d3e82ff76..68f61f89505 100644 --- a/sim/v850/local.mk +++ b/sim/v850/local.mk @@ -18,9 +18,9 @@ =20 AM_CPPFLAGS_%C% =3D -DWITH_TARGET_WORD_BITSIZE=3D32 -DWITH_TARGET_WORD_MSB= =3D31 =20 -%C%_libsim_a_SOURCES =3D +%C%_libsim_a_SOURCES =3D \ + $(common_libcommon_a_SOURCES) %C%_libsim_a_LIBADD =3D \ - $(common_libcommon_a_OBJECTS) \ $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ %D%/simops.o \