From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1158) id F3CA03858D39; Tue, 7 Mar 2023 09:55:15 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org F3CA03858D39 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1678182916; bh=Zmn5NUvoGRKTnLnFkx8tTbUoJA8pOJnTzAW/R/XpQvs=; h=From:To:Subject:Date:From; b=wqCK22/9e8Lv/Eqn7sXmhWHOkuKO2h8hcSzsXtp+lbkACMdm9j/V0tby+iugPEUeq qcThMH1fhzgmcMAz6wG75Uf/LGID3jI5q5bRT3pEHQOapTU5yKZL5hxVwPk1nD9mOY 5akK1mwyyyNuug8JQs1UREJ3cLcYjNJ/g2jeDV7A= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Ulrich Weigand To: gdb-cvs@sourceware.org Subject: [binutils-gdb] Modify altivec-regs.exp testcase for AIX X-Act-Checkin: binutils-gdb X-Git-Author: Aditya Vidyadhar Kamath X-Git-Refname: refs/heads/master X-Git-Oldrev: e8850b52624245a1d7b8ef9fc41abb6175ec74e4 X-Git-Newrev: 60204874f5a987b164f7f194d3f96729847fe329 Message-Id: <20230307095515.F3CA03858D39@sourceware.org> Date: Tue, 7 Mar 2023 09:55:15 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D60204874f5a9= 87b164f7f194d3f96729847fe329 commit 60204874f5a987b164f7f194d3f96729847fe329 Author: Aditya Vidyadhar Kamath Date: Mon Mar 6 01:31:34 2023 -0600 Modify altivec-regs.exp testcase for AIX =20 On AIX, the debugger cannot access vector registers before they are first used by the inferior. Hence we change the test case such that some vector registers are accessed by the variable 'x' in AIX and other targets are not affected as a consequence of the same. Diff: --- gdb/testsuite/gdb.arch/altivec-regs.c | 8 +++++++- gdb/testsuite/gdb.arch/altivec-regs.exp | 3 +++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/gdb/testsuite/gdb.arch/altivec-regs.c b/gdb/testsuite/gdb.arch= /altivec-regs.c index 8f3b729fe3f..1411f15e358 100644 --- a/gdb/testsuite/gdb.arch/altivec-regs.c +++ b/gdb/testsuite/gdb.arch/altivec-regs.c @@ -20,12 +20,18 @@ main () vector unsigned int z;=20 int a; =20 + #ifdef _AIX + /* On AIX, the debugger cannot access vector registers before they + are first used by the inferior. Perform such an access here. */ + x =3D ((vector unsigned int) vec_splat_u8 (0)); + #endif + /* This line may look unnecessary but we do need it, because we want to have a line to do a next over (so that gdb refetches the registers) and we don't want the code to change any vector registers. The splat operations below modify the VRs,i so we don't want to execute them yet. */ - a =3D 9; + a =3D 9; /* start here */ x =3D ((vector unsigned int) vec_splat_u8 (-2)); y =3D ((vector unsigned int) vec_splat_u8 (1)); =09 diff --git a/gdb/testsuite/gdb.arch/altivec-regs.exp b/gdb/testsuite/gdb.ar= ch/altivec-regs.exp index 6cc32aeff22..b771a4df76f 100644 --- a/gdb/testsuite/gdb.arch/altivec-regs.exp +++ b/gdb/testsuite/gdb.arch/altivec-regs.exp @@ -52,6 +52,9 @@ if {![runto_main]} { return 0 } =20 +gdb_breakpoint [gdb_get_line_number "start here"] +gdb_continue_to_breakpoint "start here" + gdb_test "set print frame-arguments all" =20 # set all the registers integer portions to 1