From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1521) id E47483858CD1; Fri, 8 Dec 2023 05:31:19 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E47483858CD1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1702013479; bh=4pwzZ5MOjs0Ke6xxfOSatNvGWQDfBLwLgmjhytn1jfA=; h=From:To:Subject:Date:From; b=oS2uhSgoBIK8ioH4gZ6QXGoAZca7FqZ0u1Q4rHYz9e4gun4P3kVZprW/DPAQ7zv88 ywozHY2tGBOOdtiaJ2Hq4ZGYQApU2X/oCdnT0j0A6rZjT9+ufu7nLL008gq5kz5NC5 RNHOwalebMnqAljKha7QHDu6ns3d3pYPt1sgCb9E= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Frysinger To: gdb-cvs@sourceware.org Subject: [binutils-gdb] sim: bfin: fix -Wunused-but-set-variable warnings X-Act-Checkin: binutils-gdb X-Git-Author: Mike Frysinger X-Git-Refname: refs/heads/master X-Git-Oldrev: 058d0bf5f09a4488b6d7f3d3aa5fa0958e886c3b X-Git-Newrev: ee45e43358fdd19cbf061f813c8c544c5e225606 Message-Id: <20231208053119.E47483858CD1@sourceware.org> Date: Fri, 8 Dec 2023 05:31:19 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3Dee45e43358fd= d19cbf061f813c8c544c5e225606 commit ee45e43358fdd19cbf061f813c8c544c5e225606 Author: Mike Frysinger Date: Wed Dec 6 06:38:29 2023 -0700 sim: bfin: fix -Wunused-but-set-variable warnings Diff: --- sim/bfin/bfin-sim.c | 9 ++++++--- sim/bfin/dv-bfin_emac.c | 3 --- sim/bfin/dv-bfin_mmu.c | 4 +--- sim/bfin/dv-bfin_pll.c | 2 -- sim/bfin/dv-bfin_rtc.c | 2 -- sim/bfin/dv-bfin_sic.c | 8 -------- sim/bfin/interp.c | 2 -- 7 files changed, 7 insertions(+), 23 deletions(-) diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c index a9b8fd09220..4fa5ccc315c 100644 --- a/sim/bfin/bfin-sim.c +++ b/sim/bfin/bfin-sim.c @@ -202,16 +202,18 @@ fmtconst_str (const_forms_t cf, bs32 x, bu32 pc) =20 if (constant_formats[cf].reloc) { +#if 0 bu32 ea =3D (((constant_formats[cf].pcrel ? SIGNEXTEND (x, constant_= formats[cf].nbits) : x) + constant_formats[cf].offset) << constant_formats[cf].scale); if (constant_formats[cf].pcrel) ea +=3D pc; - /*if (outf->symbol_at_address_func (ea, outf) || !constant_formats[cf= ].exact) + if (outf->symbol_at_address_func (ea, outf) || !constant_formats[cf]= .exact) { outf->print_address_func (ea, outf); return ""; } - else*/ + else +#endif { sprintf (buf, "%#x", x); return buf; @@ -1592,7 +1594,8 @@ decode_macfunc (SIM_CPU *cpu, int which, int op, int = h0, int h1, int src0, =20 if (op !=3D 3) { - bu8 sgn0 =3D (acc >> 31) & 1; + /* TODO: Figure out how the 32-bit sign is used. */ + ATTRIBUTE_UNUSED bu8 sgn0 =3D (acc >> 31) & 1; bu8 sgn40 =3D (acc >> 39) & 1; bu40 nosat_acc; =20 diff --git a/sim/bfin/dv-bfin_emac.c b/sim/bfin/dv-bfin_emac.c index 0288b740499..1ab7cd63554 100644 --- a/sim/bfin/dv-bfin_emac.c +++ b/sim/bfin/dv-bfin_emac.c @@ -539,11 +539,8 @@ bfin_emac_tap_init (struct hw *me) { #if WITH_TUN struct bfin_emac *emac =3D hw_data (me); - const hw_unit *unit; int flags; =20 - unit =3D hw_unit_address (me); - emac->tap =3D open ("/dev/net/tun", O_RDWR); if (emac->tap =3D=3D -1) { diff --git a/sim/bfin/dv-bfin_mmu.c b/sim/bfin/dv-bfin_mmu.c index 71c7176b88b..c14e2088c1f 100644 --- a/sim/bfin/dv-bfin_mmu.c +++ b/sim/bfin/dv-bfin_mmu.c @@ -451,7 +451,7 @@ _mmu_check_addr (SIM_CPU *cpu, bu32 addr, bool write, b= ool inst, int size) { SIM_DESC sd =3D CPU_STATE (cpu); struct bfin_mmu *mmu; - bu32 *fault_status, *fault_addr, *mem_control, *cplb_addr, *cplb_data; + bu32 *mem_control, *cplb_addr, *cplb_data; bu32 faults; bool supv, do_excp, dag1; int i, hits; @@ -469,8 +469,6 @@ _mmu_check_addr (SIM_CPU *cpu, bu32 addr, bool write, b= ool inst, int size) } =20 mmu =3D MMU_STATE (cpu); - fault_status =3D inst ? &mmu->icplb_fault_status : &mmu->dcplb_fault_sta= tus; - fault_addr =3D inst ? &mmu->icplb_fault_addr : &mmu->dcplb_fault_addr; mem_control =3D inst ? &mmu->imem_control : &mmu->dmem_control; cplb_addr =3D inst ? &mmu->icplb_addr[0] : &mmu->dcplb_addr[0]; cplb_data =3D inst ? &mmu->icplb_data[0] : &mmu->dcplb_data[0]; diff --git a/sim/bfin/dv-bfin_pll.c b/sim/bfin/dv-bfin_pll.c index dd95013f2f4..863b07f49ec 100644 --- a/sim/bfin/dv-bfin_pll.c +++ b/sim/bfin/dv-bfin_pll.c @@ -56,7 +56,6 @@ bfin_pll_io_write_buffer (struct hw *me, const void *sour= ce, bu32 mmr_off; bu32 value; bu16 *value16p; - bu32 *value32p; void *valuep; =20 /* Invalid access mode is higher priority than missing register. */ @@ -71,7 +70,6 @@ bfin_pll_io_write_buffer (struct hw *me, const void *sour= ce, mmr_off =3D addr - pll->base; valuep =3D (void *)((uintptr_t)pll + mmr_base() + mmr_off); value16p =3D valuep; - value32p =3D valuep; =20 HW_TRACE_WRITE (); =20 diff --git a/sim/bfin/dv-bfin_rtc.c b/sim/bfin/dv-bfin_rtc.c index b6ae0a53771..fdb63f3a4f9 100644 --- a/sim/bfin/dv-bfin_rtc.c +++ b/sim/bfin/dv-bfin_rtc.c @@ -59,7 +59,6 @@ bfin_rtc_io_write_buffer (struct hw *me, const void *sour= ce, bu32 mmr_off; bu32 value; bu16 *value16p; - bu32 *value32p; void *valuep; =20 /* Invalid access mode is higher priority than missing register. */ @@ -74,7 +73,6 @@ bfin_rtc_io_write_buffer (struct hw *me, const void *sour= ce, mmr_off =3D addr - rtc->base; valuep =3D (void *)((uintptr_t)rtc + mmr_base() + mmr_off); value16p =3D valuep; - value32p =3D valuep; =20 HW_TRACE_WRITE (); =20 diff --git a/sim/bfin/dv-bfin_sic.c b/sim/bfin/dv-bfin_sic.c index 5210cf0a8ee..ac302a7f851 100644 --- a/sim/bfin/dv-bfin_sic.c +++ b/sim/bfin/dv-bfin_sic.c @@ -147,7 +147,6 @@ bfin_sic_52x_io_write_buffer (struct hw *me, const void= *source, int space, struct bfin_sic *sic =3D hw_data (me); bu32 mmr_off; bu32 value; - bu16 *value16p; bu32 *value32p; void *valuep; =20 @@ -162,7 +161,6 @@ bfin_sic_52x_io_write_buffer (struct hw *me, const void= *source, int space, =20 mmr_off =3D addr - sic->base; valuep =3D (void *)((uintptr_t)sic + mmr_base() + mmr_off); - value16p =3D valuep; value32p =3D valuep; =20 HW_TRACE_WRITE (); @@ -261,7 +259,6 @@ bfin_sic_537_io_write_buffer (struct hw *me, const void= *source, int space, struct bfin_sic *sic =3D hw_data (me); bu32 mmr_off; bu32 value; - bu16 *value16p; bu32 *value32p; void *valuep; =20 @@ -276,7 +273,6 @@ bfin_sic_537_io_write_buffer (struct hw *me, const void= *source, int space, =20 mmr_off =3D addr - sic->base; valuep =3D (void *)((uintptr_t)sic + mmr_base() + mmr_off); - value16p =3D valuep; value32p =3D valuep; =20 HW_TRACE_WRITE (); @@ -375,7 +371,6 @@ bfin_sic_54x_io_write_buffer (struct hw *me, const void= *source, int space, struct bfin_sic *sic =3D hw_data (me); bu32 mmr_off; bu32 value; - bu16 *value16p; bu32 *value32p; void *valuep; =20 @@ -390,7 +385,6 @@ bfin_sic_54x_io_write_buffer (struct hw *me, const void= *source, int space, =20 mmr_off =3D addr - sic->base; valuep =3D (void *)((uintptr_t)sic + mmr_base() + mmr_off); - value16p =3D valuep; value32p =3D valuep; =20 HW_TRACE_WRITE (); @@ -482,7 +476,6 @@ bfin_sic_561_io_write_buffer (struct hw *me, const void= *source, int space, struct bfin_sic *sic =3D hw_data (me); bu32 mmr_off; bu32 value; - bu16 *value16p; bu32 *value32p; void *valuep; =20 @@ -497,7 +490,6 @@ bfin_sic_561_io_write_buffer (struct hw *me, const void= *source, int space, =20 mmr_off =3D addr - sic->base; valuep =3D (void *)((uintptr_t)sic + mmr_base() + mmr_off); - value16p =3D valuep; value32p =3D valuep; =20 HW_TRACE_WRITE (); diff --git a/sim/bfin/interp.c b/sim/bfin/interp.c index 8ad6769fa02..9a141a88a34 100644 --- a/sim/bfin/interp.c +++ b/sim/bfin/interp.c @@ -1011,7 +1011,6 @@ bfin_user_init (SIM_DESC sd, SIM_CPU *cpu, struct bfd= *abfd, if (auxvt) { # define AT_PUSH(at, val) \ - auxvt_size +=3D 8; \ sp -=3D 4; \ auxvt =3D (val); \ sim_write (sd, sp, &auxvt, 4); \ @@ -1020,7 +1019,6 @@ bfin_user_init (SIM_DESC sd, SIM_CPU *cpu, struct bfd= *abfd, sim_write (sd, sp, &auxvt, 4) unsigned int egid =3D getegid (), gid =3D getgid (); unsigned int euid =3D geteuid (), uid =3D getuid (); - bu32 auxvt_size =3D 0; AT_PUSH (AT_NULL, 0); AT_PUSH (AT_SECURE, egid !=3D gid || euid !=3D uid); AT_PUSH (AT_EGID, egid);