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From: Michael Frysinger <vapier@sourceware.org>
To: gdb-cvs@sourceware.org
Subject: [binutils-gdb] sim: cr16: add missing break statement
Date: Thu, 21 Dec 2023 06:42:21 +0000 (GMT)	[thread overview]
Message-ID: <20231221064221.323453861890@sourceware.org> (raw)

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=cc6aaa31491cacb485e07ac9adfe4f7d971b2ae2

commit cc6aaa31491cacb485e07ac9adfe4f7d971b2ae2
Author: Mike Frysinger <vapier@gentoo.org>
Date:   Thu Dec 21 01:30:20 2023 -0500

    sim: cr16: add missing break statement
    
    Doesn't seem to make sense for this to fall through
    (although I'm not an expert in this ISA).

Diff:
---
 sim/cr16/interp.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/sim/cr16/interp.c b/sim/cr16/interp.c
index 9a2363a6d52..0fa9a91c013 100644
--- a/sim/cr16/interp.c
+++ b/sim/cr16/interp.c
@@ -288,6 +288,7 @@ get_operands (operand_desc *s, uint64_t ins, int isize, int nops)
             OP[i] = (ins) & 0x3FFF;
             OP[++i] = (ins >> 14) & 0x1;     /* get 1 bit for index-reg.  */
             OP[++i] = (ins >> 16) & 0xF;     /* get 4 bit for reg.  */
+            break;
           case rindex7_abs20:
           case rindex8_abs20:
             OP[i] = (ins) & 0xFFFFF;

                 reply	other threads:[~2023-12-21  6:42 UTC|newest]

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