From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1039) id 39E4F3858416; Fri, 23 Feb 2024 00:45:22 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 39E4F3858416 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1708649122; bh=mQTO89vSK79ZUVX9pRbZsxk2uCv8W9hOLDo0NeQ/ncc=; h=From:To:Subject:Date:From; b=rtUtsgKCv2XjyB1JoqLqTerMuQLdwIkFo6s+33ePc1rbWRUTzXRQqOr5tnQhfhm9W n8mVvgykTDTFWQ1fCBpWeT8PalJMuA9nR9SuhKJ99n2Wa50puiwh/5fkZPon62eFJz 21mfizkXL/fNuBrB65X1s/ybTlgRE64TROePEb2Q= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: H.J. Lu To: gdb-cvs@sourceware.org Subject: [binutils-gdb] gdb: Add XMM16-XMM31 and K0-K1 DWARF register number mapping X-Act-Checkin: binutils-gdb X-Git-Author: H.J. Lu X-Git-Refname: refs/heads/master X-Git-Oldrev: b33d2d3f11347450eb0dc1312bac38f2466e4f9b X-Git-Newrev: 97f2a34ed1d255ea301f858b31c0fbe75da1c4f6 Message-Id: <20240223004522.39E4F3858416@sourceware.org> Date: Fri, 23 Feb 2024 00:45:22 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=3Dbinutils-gdb.git;h=3D97f2a34ed1d2= 55ea301f858b31c0fbe75da1c4f6 commit 97f2a34ed1d255ea301f858b31c0fbe75da1c4f6 Author: H.J. Lu Date: Wed Feb 14 07:40:12 2024 -0800 gdb: Add XMM16-XMM31 and K0-K1 DWARF register number mapping =20 Add XMM16-XMM31 and K0-K1 DWARF register number mapping to amd64_dwarf_regmap. =20 Reviewed-By: Felix Willgerodt Approved-By: John Baldwin Diff: --- gdb/amd64-tdep.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c index f5968ab4d0f..60d6b7aa198 100644 --- a/gdb/amd64-tdep.c +++ b/gdb/amd64-tdep.c @@ -235,7 +235,28 @@ static int amd64_dwarf_regmap[] =3D /* Floating Point Control Registers. */ AMD64_MXCSR_REGNUM, AMD64_FCTRL_REGNUM, - AMD64_FSTAT_REGNUM + AMD64_FSTAT_REGNUM, + + /* XMM16-XMM31. */ + AMD64_XMM16_REGNUM + 0, AMD64_XMM16_REGNUM + 1, + AMD64_XMM16_REGNUM + 2, AMD64_XMM16_REGNUM + 3, + AMD64_XMM16_REGNUM + 4, AMD64_XMM16_REGNUM + 5, + AMD64_XMM16_REGNUM + 6, AMD64_XMM16_REGNUM + 7, + AMD64_XMM16_REGNUM + 8, AMD64_XMM16_REGNUM + 9, + AMD64_XMM16_REGNUM + 10, AMD64_XMM16_REGNUM + 11, + AMD64_XMM16_REGNUM + 12, AMD64_XMM16_REGNUM + 13, + AMD64_XMM16_REGNUM + 14, AMD64_XMM16_REGNUM + 15, + + /* Reserved. */ + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + + /* Mask Registers. */ + AMD64_K0_REGNUM + 0, AMD64_K0_REGNUM + 1, + AMD64_K0_REGNUM + 2, AMD64_K0_REGNUM + 3, + AMD64_K0_REGNUM + 4, AMD64_K0_REGNUM + 5, + AMD64_K0_REGNUM + 6, AMD64_K0_REGNUM + 7 }; =20 static const int amd64_dwarf_regmap_len =3D