From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 25762 invoked by alias); 20 Dec 2013 09:53:21 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 25750 invoked by uid 89); 20 Dec 2013 09:53:20 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mga09.intel.com Received: from mga09.intel.com (HELO mga09.intel.com) (134.134.136.24) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 20 Dec 2013 09:53:19 +0000 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 20 Dec 2013 01:49:28 -0800 X-ExtLoop1: 1 Received: from irvmail001.ir.intel.com ([163.33.26.43]) by orsmga001.jf.intel.com with ESMTP; 20 Dec 2013 01:53:16 -0800 Received: from ulvlx001.iul.intel.com (ulvlx001.iul.intel.com [172.28.207.17]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id rBK9rFqM024407; Fri, 20 Dec 2013 09:53:15 GMT Received: from ulvlx001.iul.intel.com (localhost [127.0.0.1]) by ulvlx001.iul.intel.com with ESMTP id rBK9rFrd004303; Fri, 20 Dec 2013 10:53:15 +0100 Received: (from msturm@localhost) by ulvlx001.iul.intel.com with œ id rBK9rEbI004299; Fri, 20 Dec 2013 10:53:14 +0100 From: Michael Sturm To: palves@redhat.com, eliz@gnu.org, mark.kettenis@xs4all.nl, walfred.tedeschi@intel.com Cc: gdb-patches@sourceware.org, Michael Sturm Subject: [PATCH v1 0/3] Intel(R) AVX-512 register support Date: Fri, 20 Dec 2013 09:53:00 -0000 Message-Id: <1387533175-4039-1-git-send-email-michael.sturm@intel.com> X-SW-Source: 2013-12/txt/msg00817.txt.bz2 This patch series adds support for the Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512) registers. Native and remote debugging are covered by this patch series. Intel(R) AVX-512 is an extension to AVX to support 512-bit wide SIMD registers in 64-bit mode (XMM0-XMM31, YMM0-YMM31, ZMM0-ZMM31). The number of available registers in 32-bit mode is still 8 (XMM0-7, YMM0-7, ZMM0-7). The lower 256-bits of the ZMM registers are aliased to the respective 256-bit YMM registers. The lower 128-bits are aliased to the respective 128-bit XMM registers. There are also 8 new, dedicated mask registers (K0-K7) in both 32-bit mode and 64-bit mode. For more information please see Intel(R) Developer Zone: Intel(R) AVX http://software.intel.com/en-us/intel-isa-extensions#pid-16007-1495 Intel(R) Architecture Instruction Set Extensions Programming Reference: http://software.intel.com/en-us/file/319433-017pdf Michael Sturm (3): Add AVX512 registers support to GDB. Add AVX512 register support to gdbserver. Add AVX512 feature description to GDB manual gdb/NEWS | 5 + gdb/amd64-linux-nat.c | 19 +- gdb/amd64-linux-tdep.c | 23 +- gdb/amd64-linux-tdep.h | 5 +- gdb/amd64-tdep.c | 80 +++++ gdb/amd64-tdep.h | 12 +- gdb/common/i386-xstate.h | 20 +- gdb/doc/gdb.texinfo | 34 ++ gdb/features/Makefile | 22 ++ gdb/features/i386/32bit-avx512.xml | 30 ++ gdb/features/i386/64bit-avx512.xml | 102 ++++++ gdb/features/i386/amd64-avx512-linux.c | 321 +++++++++++++++++++ gdb/features/i386/amd64-avx512-linux.xml | 20 ++ gdb/features/i386/amd64-avx512.c | 316 +++++++++++++++++++ gdb/features/i386/amd64-avx512.xml | 18 ++ gdb/features/i386/i386-avx512-linux.c | 208 ++++++++++++ gdb/features/i386/i386-avx512-linux.xml | 20 ++ gdb/features/i386/i386-avx512.c | 203 ++++++++++++ gdb/features/i386/i386-avx512.xml | 18 ++ gdb/features/i386/x32-avx512-linux.c | 321 +++++++++++++++++++ gdb/features/i386/x32-avx512-linux.xml | 20 ++ gdb/features/i386/x32-avx512.c | 316 +++++++++++++++++++ gdb/features/i386/x32-avx512.xml | 18 ++ gdb/gdbserver/Makefile.in | 19 +- gdb/gdbserver/configure.srv | 20 +- gdb/gdbserver/i387-fp.c | 182 ++++++++++- gdb/gdbserver/linux-x86-low.c | 35 ++- gdb/i386-linux-nat.c | 5 +- gdb/i386-linux-tdep.c | 16 +- gdb/i386-linux-tdep.h | 7 +- gdb/i386-tdep.c | 466 +++++++++++++++++++++++++-- gdb/i386-tdep.h | 64 +++- gdb/i387-tdep.c | 384 +++++++++++++++++++++- gdb/i387-tdep.h | 21 ++ gdb/regformats/i386/amd64-avx512-linux.dat | 156 +++++++++ gdb/regformats/i386/amd64-avx512.dat | 155 +++++++++ gdb/regformats/i386/i386-avx512-linux.dat | 76 +++++ gdb/regformats/i386/i386-avx512.dat | 75 +++++ gdb/regformats/i386/x32-avx512-linux.dat | 156 +++++++++ gdb/regformats/i386/x32-avx512.dat | 155 +++++++++ gdb/testsuite/gdb.arch/Makefile.in | 2 +- gdb/testsuite/gdb.arch/i386-avx512.c | 489 +++++++++++++++++++++++++++++ gdb/testsuite/gdb.arch/i386-avx512.exp | 176 +++++++++++ 43 files changed, 4749 insertions(+), 61 deletions(-) create mode 100644 gdb/features/i386/32bit-avx512.xml create mode 100644 gdb/features/i386/64bit-avx512.xml create mode 100644 gdb/features/i386/amd64-avx512-linux.c create mode 100644 gdb/features/i386/amd64-avx512-linux.xml create mode 100644 gdb/features/i386/amd64-avx512.c create mode 100644 gdb/features/i386/amd64-avx512.xml create mode 100644 gdb/features/i386/i386-avx512-linux.c create mode 100644 gdb/features/i386/i386-avx512-linux.xml create mode 100644 gdb/features/i386/i386-avx512.c create mode 100644 gdb/features/i386/i386-avx512.xml create mode 100644 gdb/features/i386/x32-avx512-linux.c create mode 100644 gdb/features/i386/x32-avx512-linux.xml create mode 100644 gdb/features/i386/x32-avx512.c create mode 100644 gdb/features/i386/x32-avx512.xml create mode 100644 gdb/regformats/i386/amd64-avx512-linux.dat create mode 100644 gdb/regformats/i386/amd64-avx512.dat create mode 100644 gdb/regformats/i386/i386-avx512-linux.dat create mode 100644 gdb/regformats/i386/i386-avx512.dat create mode 100644 gdb/regformats/i386/x32-avx512-linux.dat create mode 100644 gdb/regformats/i386/x32-avx512.dat create mode 100644 gdb/testsuite/gdb.arch/i386-avx512.c create mode 100644 gdb/testsuite/gdb.arch/i386-avx512.exp -- 1.8.4.2