From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 25778 invoked by alias); 20 Dec 2013 09:53:22 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 25761 invoked by uid 89); 20 Dec 2013 09:53:21 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mga09.intel.com Received: from mga09.intel.com (HELO mga09.intel.com) (134.134.136.24) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 20 Dec 2013 09:53:20 +0000 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 20 Dec 2013 01:49:29 -0800 X-ExtLoop1: 1 Received: from irvmail001.ir.intel.com ([163.33.26.43]) by orsmga001.jf.intel.com with ESMTP; 20 Dec 2013 01:53:16 -0800 Received: from ulvlx001.iul.intel.com (ulvlx001.iul.intel.com [172.28.207.17]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id rBK9rFOF024410; Fri, 20 Dec 2013 09:53:15 GMT Received: from ulvlx001.iul.intel.com (localhost [127.0.0.1]) by ulvlx001.iul.intel.com with ESMTP id rBK9rFP0004324; Fri, 20 Dec 2013 10:53:15 +0100 Received: (from msturm@localhost) by ulvlx001.iul.intel.com with œ id rBK9rF0L004320; Fri, 20 Dec 2013 10:53:15 +0100 From: Michael Sturm To: palves@redhat.com, eliz@gnu.org, mark.kettenis@xs4all.nl, walfred.tedeschi@intel.com Cc: gdb-patches@sourceware.org, Michael Sturm Subject: [PATCH v1 3/3] Add AVX512 feature description to GDB manual Date: Fri, 20 Dec 2013 09:53:00 -0000 Message-Id: <1387533175-4039-4-git-send-email-michael.sturm@intel.com> In-Reply-To: <1387533175-4039-1-git-send-email-michael.sturm@intel.com> References: <1387533175-4039-1-git-send-email-michael.sturm@intel.com> X-SW-Source: 2013-12/txt/msg00818.txt.bz2 2013-09-11 Michael Sturm Walfred Tedeschi * NEWS: Add note about new support for AVX512. doc/ * gdb.texinfo (i386 Features): Add description of AVX512 registers. --- gdb/NEWS | 5 +++++ gdb/doc/gdb.texinfo | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 39 insertions(+) diff --git a/gdb/NEWS b/gdb/NEWS index ae84e00..ed4349a 100644 --- a/gdb/NEWS +++ b/gdb/NEWS @@ -5579,3 +5579,8 @@ Host is the machine where GDB will run; targ is the machine where the program that you are debugging will run. * GDB now supports access to Intel(R) MPX registers on GNU/Linux. + + * Support for Intel(R) AVX-512 registers on GNU/Linux. + +Support displaying and modifying Intel(R) AVX-512 registers $zmm0 - $zmm31 and +$k0 - $k7 on GNU/Linux. diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index 87d5145..ed8ee32 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -43287,6 +43287,40 @@ Memory Protection Extension (MPX). It should describe the following registers: The @samp{org.gnu.gdb.i386.linux} feature is optional. It should describe a single register, @samp{orig_eax}. +The @samp{org.gnu.gdb.i386.avx512} feature is optional and requires the +@samp{org.gnu.gdb.i386.avx} feature. It should +describe additional @sc{xmm} registers: + +@itemize @minus +@item +@samp{xmm16h} through @samp{xmm31h} for amd64 +@end itemize + +It should describe the upper 128 bits of additional @sc{ymm} registers: + +@itemize @minus +@item +@samp{ymm16h} through @samp{ymm31h} for amd64 +@end itemize + +It should +describe the upper 256 bits of @sc{zmm} registers: + +@itemize @minus +@item +@samp{zmm0h} through @samp{zmm7h} for i386 +@item +@samp{zmm0h} through @samp{zmm15h} for amd64 +@end itemize + +It should +describe the additional @sc{zmm} registers: + +@itemize @minus +@item +@samp{zmm16h} through @samp{zmm31h} for amd64 +@end itemize + @node MIPS Features @subsection @acronym{MIPS} Features @cindex target descriptions, @acronym{MIPS} features -- 1.8.4.2