From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 87690 invoked by alias); 1 Jul 2015 13:58:39 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 87665 invoked by uid 89); 1 Jul 2015 13:58:38 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pa0-f44.google.com Received: from mail-pa0-f44.google.com (HELO mail-pa0-f44.google.com) (209.85.220.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 01 Jul 2015 13:58:37 +0000 Received: by pacws9 with SMTP id ws9so24077133pac.0 for ; Wed, 01 Jul 2015 06:58:35 -0700 (PDT) X-Received: by 10.70.32.164 with SMTP id k4mr55992919pdi.138.1435759115584; Wed, 01 Jul 2015 06:58:35 -0700 (PDT) Received: from E107787-LIN.cambridge.arm.com (gcc1-power7.osuosl.org. [140.211.15.137]) by mx.google.com with ESMTPSA id sc7sm2417503pbb.85.2015.07.01.06.58.33 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 01 Jul 2015 06:58:34 -0700 (PDT) From: Yao Qi X-Google-Original-From: Yao Qi To: gdb-patches@sourceware.org Subject: [PATCH 00/11] Aarch64 linux GDB native multi-arch debugging (part 1) Date: Wed, 01 Jul 2015 13:58:00 -0000 Message-Id: <1435759111-22856-1-git-send-email-yao.qi@linaro.org> X-IsSubscribed: yes X-SW-Source: 2015-07/txt/msg00029.txt.bz2 This patch series is to enable Aarch64 GDB (64-bit) debug arm program (32-bit) rudimentarily, which means with these patches applied, Aarch64 GDB is able to do some basic debugging to arm program . However, some features are still missing, - Debug multi-threaded program, - Use HW watchpoint and breakpoint, because current linux kernel ptrace doesn't have right requests to get the TLS area and to set HW watchpoint registers. I am still working with kernel hackers to get ptrace requests ready. Our plan is to be clear on aarch64 multi-arch debugging requirements to kernel first, get them upstream to kernel, and then, post the rest of aarch64 gdb multi-arch patches. Afterwards, I'll add aarch64 multi-arch support in gdbserver too. Patch #1 is to align arm-linux-nat.c to aarch64-linux-nat.c, it is a refactor patch. Patch #2 and #3 starts the basic multi-arch debugging support, in which some code is shared between arm and aarch64. Patch #4 is to adjust all arm-*.xml target descriptions to fix some fails I've seen. Patch #5 - #8 are various tweaks to gdb testsuite for aarch64 multi-arch debugging. Patch #9 - #11 can be regarded as an RFC, which teaches GDB to use hardware single step in software single step architecture if target supports hardware single step. They are useful to aarch64 multi-arch debugging, because hardware single step is available for arm32 process on aarch64. The whole series is tested on aarch64-linux with both aarch64 gcc and arm gcc. It is also tested on arm-linux and x86_64-linux. Since we'll branch 7.10 soon, I don't like to have such big change at last moment of branching and releasing. I plan to push them (or part of them) in after 7.10 branch is created, if there are no objections. *** BLURB HERE *** Yao Qi (11): Remove {fetch,store}_fpregister and {fetch,store}_register New aarch32-linux-nat.c Native debug arm program by aarch64 GDB Set architecture to arm in arm-*.xml files Adjust gdb.multi tests for aarch64 Enable multi-arch test in catch-syscall.exp on aarch64 New proc is_aarch32_target New proc is_aarch64_target [gdbserver] Rename supports_conditional_breakpoints to supports_hardware_single_step Reply s and S vCont actions if target supports hardware single step New target_ops hook to_can_do_single_step gdb/aarch32-linux-nat.c | 99 +++++++++ gdb/aarch32-linux-nat.h | 34 +++ gdb/aarch64-linux-nat.c | 209 +++++++++++++++---- gdb/arm-linux-nat.c | 274 ++----------------------- gdb/arm-linux-tdep.c | 5 + gdb/config/aarch64/linux.mh | 2 +- gdb/config/arm/linux.mh | 2 +- gdb/configure.tgt | 1 + gdb/features/arm-with-m-fpa-layout.c | 2 + gdb/features/arm-with-m-fpa-layout.xml | 1 + gdb/features/arm-with-m-vfp-d16.c | 2 + gdb/features/arm-with-m-vfp-d16.xml | 1 + gdb/features/arm-with-m.c | 2 + gdb/features/arm-with-m.xml | 1 + gdb/features/arm-with-neon.c | 2 + gdb/features/arm-with-neon.xml | 1 + gdb/features/arm-with-vfpv2.c | 2 + gdb/features/arm-with-vfpv2.xml | 1 + gdb/features/arm-with-vfpv3.c | 2 + gdb/features/arm-with-vfpv3.xml | 1 + gdb/gdbserver/linux-low.c | 11 +- gdb/gdbserver/lynx-low.c | 5 +- gdb/gdbserver/nto-low.c | 5 +- gdb/gdbserver/server.c | 19 +- gdb/gdbserver/spu-low.c | 2 +- gdb/gdbserver/target.c | 8 + gdb/gdbserver/target.h | 13 +- gdb/gdbserver/win32-low.c | 5 +- gdb/remote.c | 33 ++- gdb/target-delegates.c | 31 +++ gdb/target.h | 9 + gdb/testsuite/gdb.arch/aarch64-atomic-inst.exp | 2 +- gdb/testsuite/gdb.arch/aarch64-fp.exp | 2 +- gdb/testsuite/gdb.arch/arm-bl-branch-dest.exp | 2 +- gdb/testsuite/gdb.arch/arm-disp-step.exp | 2 +- gdb/testsuite/gdb.arch/thumb-bx-pc.exp | 2 +- gdb/testsuite/gdb.arch/thumb-prologue.exp | 2 +- gdb/testsuite/gdb.arch/thumb-singlestep.exp | 2 +- gdb/testsuite/gdb.base/catch-syscall.exp | 7 +- gdb/testsuite/gdb.base/disp-step-syscall.exp | 2 +- gdb/testsuite/gdb.base/float.exp | 4 +- gdb/testsuite/gdb.multi/multi-arch-exec.exp | 18 +- gdb/testsuite/gdb.multi/multi-arch.exp | 18 +- gdb/testsuite/gdb.reverse/aarch64.exp | 2 +- gdb/testsuite/lib/gdb.exp | 47 +++++ 45 files changed, 546 insertions(+), 351 deletions(-) create mode 100644 gdb/aarch32-linux-nat.c create mode 100644 gdb/aarch32-linux-nat.h -- 1.9.1