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* [PATCH] [AArch64] Fix incorrect mask when decoding b.cond instruction
@ 2015-09-11  9:20 Pierre Langlois
  2015-09-11 15:35 ` Yao Qi
  0 siblings, 1 reply; 5+ messages in thread
From: Pierre Langlois @ 2015-09-11  9:20 UTC (permalink / raw)
  To: gdb-patches; +Cc: Pierre Langlois

Hi all,

The encoding of the b.cond instruction is described in the architecture
reference manual as:

b.cond  0101 0100 iiii iiii iiii iiii iii0 cccc

So the mask should be 0xff000010.

I've regression tested it on aarch64-linux, I haven't seen any difference
with or without the patch.

Thanks,
Pierre

gdb/ChangeLog:

	* aarch64-tdep.c (decode_bcond): Fix incorrect mask.
---
 gdb/aarch64-tdep.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index 9a44446..a4d8186 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -339,7 +339,8 @@ decode_b (CORE_ADDR addr, uint32_t insn, int *is_bl, int32_t *offset)
 static int
 decode_bcond (CORE_ADDR addr, uint32_t insn, unsigned *cond, int32_t *offset)
 {
-  if (decode_masked_match (insn, 0xfe000000, 0x54000000))
+  /* b.cond  0101 0100 iiii iiii iiii iiii iii0 cccc */
+  if (decode_masked_match (insn, 0xff000010, 0x54000000))
     {
       *cond = (insn >> 0) & 0xf;
       *offset = extract_signed_bitfield (insn, 19, 5) << 2;
-- 
2.4.6

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] [AArch64] Fix incorrect mask when decoding b.cond instruction
  2015-09-11  9:20 [PATCH] [AArch64] Fix incorrect mask when decoding b.cond instruction Pierre Langlois
@ 2015-09-11 15:35 ` Yao Qi
  2015-09-11 15:52   ` Pierre Langlois
  0 siblings, 1 reply; 5+ messages in thread
From: Yao Qi @ 2015-09-11 15:35 UTC (permalink / raw)
  To: Pierre Langlois; +Cc: gdb-patches

Pierre Langlois <pierre.langlois@arm.com> writes:

> The encoding of the b.cond instruction is described in the architecture
> reference manual as:
>
> b.cond  0101 0100 iiii iiii iiii iiii iii0 cccc
>
> So the mask should be 0xff000010.
>
> I've regression tested it on aarch64-linux, I haven't seen any difference
> with or without the patch.

Hi Pierre,
You posted this patch here
https://sourceware.org/ml/gdb-patches/2015-08/msg00421.html and I
reviewed it.  The patch is OK.

-- 
Yao (齐尧)

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] [AArch64] Fix incorrect mask when decoding b.cond instruction
  2015-09-11 15:35 ` Yao Qi
@ 2015-09-11 15:52   ` Pierre Langlois
  0 siblings, 0 replies; 5+ messages in thread
From: Pierre Langlois @ 2015-09-11 15:52 UTC (permalink / raw)
  To: Yao Qi; +Cc: pierre.langlois, gdb-patches

On 11/09/15 16:35, Yao Qi wrote:
> Pierre Langlois <pierre.langlois@arm.com> writes:
> 
>> The encoding of the b.cond instruction is described in the architecture
>> reference manual as:
>>
>> b.cond  0101 0100 iiii iiii iiii iiii iii0 cccc
>>
>> So the mask should be 0xff000010.
>>
>> I've regression tested it on aarch64-linux, I haven't seen any difference
>> with or without the patch.
> 
> Hi Pierre,
> You posted this patch here
> https://sourceware.org/ml/gdb-patches/2015-08/msg00421.html and I
> reviewed it.  The patch is OK.
> 

Oops, sorry for posting this again.  I've pushed it now.

Thanks,
Pierre

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] [AArch64] Fix incorrect mask when decoding b.cond instruction
  2015-08-17 13:29 Pierre Langlois
@ 2015-08-19  8:32 ` Yao Qi
  0 siblings, 0 replies; 5+ messages in thread
From: Yao Qi @ 2015-08-19  8:32 UTC (permalink / raw)
  To: Pierre Langlois; +Cc: gdb-patches

Pierre Langlois <pierre.langlois@arm.com> writes:

> The encoding of the b.cond instruction is described in the architecture
> reference manual as:
>
> b.cond  0101 0100 iiii iiii iiii iiii iii0 cccc
>
> So the mask should be 0xff000010.
>
> Thanks,
> Pierre
>
> gdb/ChangeLog:
>
> 	* aarch64-tdep.c (decode_bcond): Fix incorrect mask.

Patch looks right to me.

-- 
Yao (齐尧)

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH] [AArch64] Fix incorrect mask when decoding b.cond instruction
@ 2015-08-17 13:29 Pierre Langlois
  2015-08-19  8:32 ` Yao Qi
  0 siblings, 1 reply; 5+ messages in thread
From: Pierre Langlois @ 2015-08-17 13:29 UTC (permalink / raw)
  To: gdb-patches; +Cc: Pierre Langlois

Hi all,

The encoding of the b.cond instruction is described in the architecture
reference manual as:

b.cond  0101 0100 iiii iiii iiii iiii iii0 cccc

So the mask should be 0xff000010.

Thanks,
Pierre

gdb/ChangeLog:

	* aarch64-tdep.c (decode_bcond): Fix incorrect mask.
---
 gdb/aarch64-tdep.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index c722dc5..e065378 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -339,7 +339,8 @@ decode_b (CORE_ADDR addr, uint32_t insn, int *is_bl, int32_t *offset)
 static int
 decode_bcond (CORE_ADDR addr, uint32_t insn, unsigned *cond, int32_t *offset)
 {
-  if (decode_masked_match (insn, 0xfe000000, 0x54000000))
+  /* b.cond  0101 0100 iiii iiii iiii iiii iii0 cccc */
+  if (decode_masked_match (insn, 0xff000010, 0x54000000))
     {
       *cond = (insn >> 0) & 0xf;
       *offset = extract_signed_bitfield (insn, 19, 5) << 2;
-- 
2.4.6

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2015-09-11 15:52 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2015-09-11  9:20 [PATCH] [AArch64] Fix incorrect mask when decoding b.cond instruction Pierre Langlois
2015-09-11 15:35 ` Yao Qi
2015-09-11 15:52   ` Pierre Langlois
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2015-08-17 13:29 Pierre Langlois
2015-08-19  8:32 ` Yao Qi

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