From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 54082 invoked by alias); 25 Feb 2016 15:47:42 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 54061 invoked by uid 89); 25 Feb 2016 15:47:42 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=1.8 required=5.0 tests=BAYES_50,KAM_LAZY_DOMAIN_SECURITY autolearn=no version=3.3.2 spammy=op, 0xc, 451, synch X-HELO: usplmg21.ericsson.net Received: from usplmg21.ericsson.net (HELO usplmg21.ericsson.net) (198.24.6.65) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Thu, 25 Feb 2016 15:47:33 +0000 Received: from EUSAAHC001.ericsson.se (Unknown_Domain [147.117.188.75]) by usplmg21.ericsson.net (Symantec Mail Security) with SMTP id 53.DD.32102.8F12FC65; Thu, 25 Feb 2016 16:47:04 +0100 (CET) Received: from elxcz23q12-y4.dyn.mo.ca.am.ericsson.se (147.117.188.8) by smtps-am.internal.ericsson.com (147.117.188.75) with Microsoft SMTP Server (TLS) id 14.3.248.2; Thu, 25 Feb 2016 10:47:29 -0500 From: Simon Marchi To: CC: Simon Marchi Subject: [PATCH 1/2] arm-tdep.c: Replace arguments to relocation functions by a structure Date: Thu, 25 Feb 2016 15:47:00 -0000 Message-ID: <1456415245-24005-2-git-send-email-simon.marchi@ericsson.com> In-Reply-To: <1456415245-24005-1-git-send-email-simon.marchi@ericsson.com> References: <1456415245-24005-1-git-send-email-simon.marchi@ericsson.com> MIME-Version: 1.0 Content-Type: text/plain X-IsSubscribed: yes X-SW-Source: 2016-02/txt/msg00801.txt.bz2 This patch prepares the functions that do the instruction decoding/relocating so they can be moved out of arm-tdep.c and shared with gdbserver. Some arguments passed around are necessary for relocating the instructions, but specific to GDB and the displaced stepping use case. Instead of passing those values by parameters directly, we now carry a pointer to a data structure containing them. This allows decoupling the decoding phase (analyzing the opcode), which will be shared with gdbserver, from the relocation phase (generating a modified instruction). When gdbserver uses those functions, it will be able to specify its own data structure, with different fields. gdb/ChangeLog: * arm-tdep.c (struct arm_insn_reloc_data): New structure. (arm_copy_unmodified): Replace args with pointer to struct arm_insn_reloc_data. (thumb_copy_unmodified_32bit): Likewise. (thumb_copy_unmodified_16bit): (install_preload): Likewise. (arm_copy_preload): Likewise. (thumb2_copy_preload): Likewise. (install_preload_reg): Likewise. (arm_copy_preload_reg): Likewise. (install_copro_load_store): Likewise. (arm_copy_copro_load_store): Likewise. (thumb2_copy_copro_load_store): Likewise. (install_b_bl_blx): Likewise. (arm_copy_b_bl_blx): Likewise. (thumb2_copy_b_bl_blx): Likewise. (thumb_copy_b): Likewise. (install_bx_blx_reg): Likewise. (arm_copy_bx_blx_reg): Likewise. (thumb_copy_bx_blx_reg): Likewise. (arm_copy_alu_imm): Likewise. (thumb2_copy_alu_imm): Likewise. (install_alu_reg): Likewise. (arm_copy_alu_reg): Likewise. (thumb_copy_alu_reg): Likewise. (install_alu_shifted_reg): Likewise. (arm_copy_alu_shifted_reg): Likewise. (arm_copy_extra_ld_st): Likewise. (install_load_store): Likewise. (thumb2_copy_load_literal): Likewise. (thumb2_copy_load_reg_imm): Likewise. (arm_copy_ldr_str_ldrb_strb): Likewise. (arm_copy_block_xfer): Likewise. (thumb2_copy_block_xfer): Likewise. (install_svc): Likewise. (arm_copy_svc): Likewise. (arm_copy_unpred): Likewise. (arm_decode_misc_memhint_neon): Likewise. (arm_decode_ld_st_word_ubyte): Likewise. (arm_decode_b_bl_ldmstm): Likewise. (thumb2_decode_dp_shift_reg): Likewise. (thumb2_decode_ext_reg_ld_st): Likewise. (arm_decode_svc_copro): Likewise. (thumb_copy_pc_relative_16bit): Likewise. (thumb_decode_pc_relative_16bit): Likewise. (thumb_copy_pc_relative_32bit): Likewise. (thumb_copy_16bit_ldr_literal): Likewise. (thumb_copy_cbnz_cbz): Likewise. (thumb2_copy_table_branch): Likewise. (thumb_copy_pop_pc_16bit): Likewise. (thumb_process_displaced_16bit_insn): Likewise. (decode_thumb_32bit_ld_mem_hints): Likewise. (thumb_process_displaced_32bit_insn): Likewise. (thumb_process_displaced_insn): Likewise. (arm_process_displaced_insn): Allocate a strict arm_insn_reloc_data instance, adjust function calls. --- gdb/arm-tdep.c | 861 +++++++++++++++++++++++++++------------------------------ 1 file changed, 410 insertions(+), 451 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 17f6fc6..43b61c2 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -4318,6 +4318,13 @@ arm_adjust_breakpoint_address (struct gdbarch *gdbarch, CORE_ADDR bpaddr) #define ARM_NOP 0xe1a00000 #define THUMB_NOP 0x4600 +struct arm_insn_reloc_data +{ + struct displaced_step_closure *dsc; + struct gdbarch *gdbarch; + struct regcache *regs; +}; + /* Helper for register reads for displaced stepping. In particular, this returns the PC as it would be seen by the instruction at its original location. */ @@ -4526,24 +4533,25 @@ insn_references_pc (uint32_t insn, uint32_t bitmask) matter what address they are executed at: in those cases, use this. */ static int -arm_copy_unmodified (struct gdbarch *gdbarch, uint32_t insn, - const char *iname, struct displaced_step_closure *dsc) +arm_copy_unmodified (uint32_t insn, const char *iname, + struct arm_insn_reloc_data *data) { if (debug_displaced) fprintf_unfiltered (gdb_stdlog, "displaced: copying insn %.8lx, " "opcode/class '%s' unmodified\n", (unsigned long) insn, iname); - dsc->modinsn[0] = insn; + data->dsc->modinsn[0] = insn; return 0; } static int -thumb_copy_unmodified_32bit (struct gdbarch *gdbarch, uint16_t insn1, - uint16_t insn2, const char *iname, - struct displaced_step_closure *dsc) +thumb_copy_unmodified_32bit (uint16_t insn1, uint16_t insn2, const char *iname, + struct arm_insn_reloc_data *data) { + struct displaced_step_closure *dsc = data->dsc; + if (debug_displaced) fprintf_unfiltered (gdb_stdlog, "displaced: copying insn %.4x %.4x, " "opcode/class '%s' unmodified\n", insn1, insn2, @@ -4559,16 +4567,15 @@ thumb_copy_unmodified_32bit (struct gdbarch *gdbarch, uint16_t insn1, /* Copy 16-bit Thumb(Thumb and 16-bit Thumb-2) instruction without any modification. */ static int -thumb_copy_unmodified_16bit (struct gdbarch *gdbarch, uint16_t insn, - const char *iname, - struct displaced_step_closure *dsc) +thumb_copy_unmodified_16bit (uint16_t insn, const char *iname, + struct arm_insn_reloc_data *data) { if (debug_displaced) fprintf_unfiltered (gdb_stdlog, "displaced: copying insn %.4x, " "opcode/class '%s' unmodified\n", insn, iname); - dsc->modinsn[0] = insn; + data->dsc->modinsn[0] = insn; return 0; } @@ -4585,10 +4592,12 @@ cleanup_preload (struct gdbarch *gdbarch, } static void -install_preload (struct gdbarch *gdbarch, struct regcache *regs, - struct displaced_step_closure *dsc, unsigned int rn) +install_preload (struct arm_insn_reloc_data *data, unsigned int rn) { ULONGEST rn_val; + struct displaced_step_closure *dsc = data->dsc; + struct regcache *regs = data->regs; + /* Preload instructions: {pli/pld} [rn, #+/-imm] @@ -4604,36 +4613,37 @@ install_preload (struct gdbarch *gdbarch, struct regcache *regs, } static int -arm_copy_preload (struct gdbarch *gdbarch, uint32_t insn, struct regcache *regs, - struct displaced_step_closure *dsc) +arm_copy_preload (uint32_t insn, struct arm_insn_reloc_data *data) { unsigned int rn = bits (insn, 16, 19); if (!insn_references_pc (insn, 0x000f0000ul)) - return arm_copy_unmodified (gdbarch, insn, "preload", dsc); + return arm_copy_unmodified (insn, "preload", data); if (debug_displaced) fprintf_unfiltered (gdb_stdlog, "displaced: copying preload insn %.8lx\n", (unsigned long) insn); - dsc->modinsn[0] = insn & 0xfff0ffff; + data->dsc->modinsn[0] = insn & 0xfff0ffff; - install_preload (gdbarch, regs, dsc, rn); + install_preload (data, rn); return 0; } static int -thumb2_copy_preload (struct gdbarch *gdbarch, uint16_t insn1, uint16_t insn2, - struct regcache *regs, struct displaced_step_closure *dsc) +thumb2_copy_preload (uint16_t insn1, uint16_t insn2, + struct arm_insn_reloc_data *data) { unsigned int rn = bits (insn1, 0, 3); unsigned int u_bit = bit (insn1, 7); int imm12 = bits (insn2, 0, 11); ULONGEST pc_val; + struct displaced_step_closure *dsc = data->dsc; + struct regcache *regs = data->regs; if (rn != ARM_PC_REGNUM) - return thumb_copy_unmodified_32bit (gdbarch, insn1, insn2, "preload", dsc); + return thumb_copy_unmodified_32bit (insn1, insn2, "preload", data); /* PC is only allowed to use in PLI (immediate,literal) Encoding T3, and PLD (literal) Encoding T1. */ @@ -4674,11 +4684,12 @@ thumb2_copy_preload (struct gdbarch *gdbarch, uint16_t insn1, uint16_t insn2, /* Preload instructions with register offset. */ static void -install_preload_reg(struct gdbarch *gdbarch, struct regcache *regs, - struct displaced_step_closure *dsc, unsigned int rn, - unsigned int rm) +install_preload_reg (struct arm_insn_reloc_data *data, unsigned int rn, + unsigned int rm) { ULONGEST rn_val, rm_val; + struct displaced_step_closure *dsc = data->dsc; + struct regcache *regs = data->regs; /* Preload register-offset instructions: @@ -4698,24 +4709,22 @@ install_preload_reg(struct gdbarch *gdbarch, struct regcache *regs, } static int -arm_copy_preload_reg (struct gdbarch *gdbarch, uint32_t insn, - struct regcache *regs, - struct displaced_step_closure *dsc) +arm_copy_preload_reg (uint32_t insn, struct arm_insn_reloc_data *data) { unsigned int rn = bits (insn, 16, 19); unsigned int rm = bits (insn, 0, 3); if (!insn_references_pc (insn, 0x000f000ful)) - return arm_copy_unmodified (gdbarch, insn, "preload reg", dsc); + return arm_copy_unmodified (insn, "preload reg", data); if (debug_displaced) fprintf_unfiltered (gdb_stdlog, "displaced: copying preload insn %.8lx\n", (unsigned long) insn); - dsc->modinsn[0] = (insn & 0xfff0fff0) | 0x1; + data->dsc->modinsn[0] = (insn & 0xfff0fff0) | 0x1; - install_preload_reg (gdbarch, regs, dsc, rn, rm); + install_preload_reg (data, rn, rm); return 0; } @@ -4735,11 +4744,12 @@ cleanup_copro_load_store (struct gdbarch *gdbarch, } static void -install_copro_load_store (struct gdbarch *gdbarch, struct regcache *regs, - struct displaced_step_closure *dsc, - int writeback, unsigned int rn) +install_copro_load_store (struct arm_insn_reloc_data *data, int writeback, + unsigned int rn) { ULONGEST rn_val; + struct displaced_step_closure *dsc = data->dsc; + struct regcache *regs = data->regs; /* Coprocessor load/store instructions: @@ -4762,36 +4772,33 @@ install_copro_load_store (struct gdbarch *gdbarch, struct regcache *regs, } static int -arm_copy_copro_load_store (struct gdbarch *gdbarch, uint32_t insn, - struct regcache *regs, - struct displaced_step_closure *dsc) +arm_copy_copro_load_store (uint32_t insn, struct arm_insn_reloc_data *data) { unsigned int rn = bits (insn, 16, 19); if (!insn_references_pc (insn, 0x000f0000ul)) - return arm_copy_unmodified (gdbarch, insn, "copro load/store", dsc); + return arm_copy_unmodified (insn, "copro load/store", data); if (debug_displaced) fprintf_unfiltered (gdb_stdlog, "displaced: copying coprocessor " "load/store insn %.8lx\n", (unsigned long) insn); - dsc->modinsn[0] = insn & 0xfff0ffff; + data->dsc->modinsn[0] = insn & 0xfff0ffff; - install_copro_load_store (gdbarch, regs, dsc, bit (insn, 25), rn); + install_copro_load_store (data, bit (insn, 25), rn); return 0; } static int -thumb2_copy_copro_load_store (struct gdbarch *gdbarch, uint16_t insn1, - uint16_t insn2, struct regcache *regs, - struct displaced_step_closure *dsc) +thumb2_copy_copro_load_store (uint16_t insn1, uint16_t insn2, + struct arm_insn_reloc_data *data) { unsigned int rn = bits (insn1, 0, 3); + struct displaced_step_closure *dsc = data->dsc; if (rn != ARM_PC_REGNUM) - return thumb_copy_unmodified_32bit (gdbarch, insn1, insn2, - "copro load/store", dsc); + return thumb_copy_unmodified_32bit (insn1, insn2, "copro load/store", data); if (debug_displaced) fprintf_unfiltered (gdb_stdlog, "displaced: copying coprocessor " @@ -4803,7 +4810,7 @@ thumb2_copy_copro_load_store (struct gdbarch *gdbarch, uint16_t insn1, /* This function is called for copying instruction LDC/LDC2/VLDR, which doesn't support writeback, so pass 0. */ - install_copro_load_store (gdbarch, regs, dsc, 0, rn); + install_copro_load_store (data, 0, rn); return 0; } @@ -4843,9 +4850,8 @@ cleanup_branch (struct gdbarch *gdbarch, struct regcache *regs, /* Copy B/BL/BLX instructions with immediate destinations. */ static void -install_b_bl_blx (struct gdbarch *gdbarch, struct regcache *regs, - struct displaced_step_closure *dsc, - unsigned int cond, int exchange, int link, long offset) +install_b_bl_blx (struct arm_insn_reloc_data *data, unsigned int cond, + int exchange, int link, long offset) { /* Implement "BL