* [PATCH 2/6] Delegate opcodes to select disassembler in GDB
2017-05-16 10:49 [PATCH 0/6] Unify the disassembler selection in gdb and objdump Yao Qi
@ 2017-05-16 10:48 ` Yao Qi
2017-06-30 0:19 ` Maciej W. Rozycki
2017-05-16 10:48 ` [PATCH 5/6] Use disassble.c:disassembler select rs6000 disassembler Yao Qi
` (6 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Yao Qi @ 2017-05-16 10:48 UTC (permalink / raw)
To: binutils, gdb-patches
This patch changes GDB to use disassembler selected by opcodes in
default, so that we don't have to duplicate the selection logic again
in GDB side. For example, gdb/score-tdep.c has
static int
score_print_insn (bfd_vma memaddr, struct disassemble_info *info)
{
if (info->endian == BFD_ENDIAN_BIG)
return print_insn_big_score (memaddr, info);
else
return print_insn_little_score (memaddr, info);
}
and opcodes/disassemble.c has the same logic,
case bfd_arch_score:
if (big)
disassemble = print_insn_big_score;
else
disassemble = print_insn_little_score;
This patch removes the logic in GDB and calls
opcodes/disassemble.c:disassembler in default to select disassembler.
gdb:
2017-05-15 Yao Qi <yao.qi@linaro.org>
* alpha-tdep.c (alpha_gdbarch_init): Don't call
set_gdbarch_print_insn.
* arc-tdep.c (arc_gdbarch_init): Likewise.
* arch-utils.c: include dis-asm.h.
(default_print_insn): New function.
* arch-utils.h (default_print_insn): Declare.
* avr-tdep.c (avr_gdbarch_init): Don't call set_gdbarch_print_insn.
* bfin-tdep.c (bfin_gdbarch_init): Likewise.
* cris-tdep.c (cris_delayed_get_disassembler): Remove.
(cris_gdbarch_init): Don't call set_gdbarch_print_insn.
* frv-tdep.c (frv_gdbarch_init): Likewise.
* ft32-tdep.c (ft32_gdbarch_init): Likewise.
* gdbarch.sh (print_insn): Use default_print_insn.
* gdbarch.c: Regenerated.
* hppa-tdep.c (hppa_gdbarch_init): Likewise.
* iq2000-tdep.c (iq2000_gdbarch_init): Likewise.
* lm32-tdep.c (lm32_gdbarch_init): Likewise.
* m32c-tdep.c (m32c_gdbarch_init): Likewise.
* m32r-tdep.c (m32r_gdbarch_init): Likewise.
* m68hc11-tdep.c (gdb_print_insn_m68hc11): Remove.
(m68hc11_gdbarch_init): Don't call set_gdbarch_print_insn.
* m68k-tdep.c (m68k_gdbarch_init): Likewise.
* m88k-tdep.c (m88k_gdbarch_init): Likewise.
* microblaze-tdep.c (microblaze_gdbarch_init): Likewise.
* mn10300-tdep.c (mn10300_gdbarch_init): Likewise.
* moxie-tdep.c (moxie_gdbarch_init): Likewise.
* msp430-tdep.c (msp430_gdbarch_init): Likewise.
* mt-tdep.c (mt_gdbarch_init): Likewise.
* nds32-tdep.c (nds32_gdbarch_init): Likewise.
* nios2-tdep.c (nios2_print_insn): Remove.
(nios2_gdbarch_init): Don't call set_gdbarch_print_insn.
* rx-tdep.c (rx_gdbarch_init): Likewise.
* s390-linux-tdep.c (s390_gdbarch_init): Likewise.
* score-tdep.c (score_print_insn): Remove.
(score_gdbarch_init): Don't call set_gdbarch_print_insn.
* sh-tdep.c (sh_gdbarch_init): Likewise.
* sh64-tdep.c (sh64_gdbarch_init): Likewise.
* sparc-tdep.c (sparc32_gdbarch_init): Likewise.
* tic6x-tdep.c (tic6x_print_insn): Remove.
(tic6x_gdbarch_init): Don't call set_gdbarch_print_insn.
* tilegx-tdep.c (tilegx_gdbarch_init): Likewise.
* v850-tdep.c (v850_gdbarch_init): Likewise.
* vax-tdep.c (vax_gdbarch_init): Likewise.
* xstormy16-tdep.c (xstormy16_gdbarch_init): Likewise.
* xtensa-tdep.c (xtensa_gdbarch_init): Likewise.
---
gdb/alpha-tdep.c | 3 ---
gdb/arc-tdep.c | 2 --
gdb/arch-utils.c | 20 ++++++++++++++++++++
gdb/arch-utils.h | 2 ++
gdb/avr-tdep.c | 1 -
gdb/bfin-tdep.c | 1 -
gdb/cris-tdep.c | 18 ------------------
gdb/frv-tdep.c | 1 -
gdb/ft32-tdep.c | 2 --
gdb/gdbarch.c | 4 ++--
gdb/gdbarch.sh | 2 +-
gdb/hppa-tdep.c | 2 --
gdb/iq2000-tdep.c | 1 -
gdb/lm32-tdep.c | 3 ---
gdb/m32c-tdep.c | 3 ---
gdb/m32r-tdep.c | 2 --
gdb/m68hc11-tdep.c | 11 -----------
gdb/m68k-tdep.c | 4 ----
gdb/m88k-tdep.c | 2 --
gdb/microblaze-tdep.c | 2 --
gdb/mn10300-tdep.c | 2 --
gdb/moxie-tdep.c | 2 --
gdb/msp430-tdep.c | 3 ---
gdb/mt-tdep.c | 1 -
gdb/nds32-tdep.c | 2 --
gdb/nios2-tdep.c | 14 --------------
gdb/rx-tdep.c | 2 --
gdb/s390-linux-tdep.c | 2 --
gdb/score-tdep.c | 10 ----------
gdb/sh-tdep.c | 1 -
gdb/sh64-tdep.c | 2 --
gdb/sparc-tdep.c | 2 --
gdb/tic6x-tdep.c | 10 ----------
gdb/tilegx-tdep.c | 2 --
gdb/v850-tdep.c | 2 --
gdb/vax-tdep.c | 2 --
gdb/xstormy16-tdep.c | 2 --
gdb/xtensa-tdep.c | 2 --
38 files changed, 25 insertions(+), 124 deletions(-)
diff --git a/gdb/alpha-tdep.c b/gdb/alpha-tdep.c
index d62566c..b1bc6a1 100644
--- a/gdb/alpha-tdep.c
+++ b/gdb/alpha-tdep.c
@@ -1798,9 +1798,6 @@ alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
/* Prologue heuristics. */
set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
- /* Disassembler. */
- set_gdbarch_print_insn (gdbarch, print_insn_alpha);
-
/* Call info. */
set_gdbarch_return_value (gdbarch, alpha_return_value);
diff --git a/gdb/arc-tdep.c b/gdb/arc-tdep.c
index 4f866a9..d9ee5c6 100644
--- a/gdb/arc-tdep.c
+++ b/gdb/arc-tdep.c
@@ -2013,8 +2013,6 @@ arc_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_frame_align (gdbarch, arc_frame_align);
- set_gdbarch_print_insn (gdbarch, arc_delayed_print_insn);
-
set_gdbarch_cannot_step_breakpoint (gdbarch, 1);
/* "nonsteppable" watchpoint means that watchpoint triggers before
diff --git a/gdb/arch-utils.c b/gdb/arch-utils.c
index b1cec80..c011b0f 100644
--- a/gdb/arch-utils.c
+++ b/gdb/arch-utils.c
@@ -37,6 +37,7 @@
#include "floatformat.h"
+#include "dis-asm.h"
struct displaced_step_closure *
simple_displaced_step_copy_insn (struct gdbarch *gdbarch,
@@ -973,6 +974,25 @@ default_guess_tracepoint_registers (struct gdbarch *gdbarch,
regcache_raw_supply (regcache, pc_regno, regs);
}
+int
+default_print_insn (bfd_vma memaddr, disassemble_info *info)
+{
+ disassembler_ftype disassemble_fn;
+
+ if (exec_bfd != NULL)
+ {
+ gdb_assert (info->arch == bfd_get_arch (exec_bfd));
+ gdb_assert (info->endian == (bfd_big_endian (exec_bfd)
+ ? BFD_ENDIAN_BIG : BFD_ENDIAN_LITTLE));
+ gdb_assert (info->mach == bfd_get_mach (exec_bfd));
+ }
+ disassemble_fn = disassembler (info->arch, info->endian == BFD_ENDIAN_BIG,
+ info->mach, exec_bfd);
+
+ gdb_assert (disassemble_fn != NULL);
+ return (*disassemble_fn) (memaddr, info);
+}
+
/* -Wmissing-prototypes */
extern initialize_file_ftype _initialize_gdbarch_utils;
diff --git a/gdb/arch-utils.h b/gdb/arch-utils.h
index 967a4b1..040afca 100644
--- a/gdb/arch-utils.h
+++ b/gdb/arch-utils.h
@@ -273,4 +273,6 @@ extern void default_guess_tracepoint_registers (struct gdbarch *gdbarch,
struct regcache *regcache,
CORE_ADDR addr);
+extern int default_print_insn (bfd_vma memaddr, disassemble_info *info);
+
#endif
diff --git a/gdb/avr-tdep.c b/gdb/avr-tdep.c
index ec9db1c..3d041c6 100644
--- a/gdb/avr-tdep.c
+++ b/gdb/avr-tdep.c
@@ -1499,7 +1499,6 @@ avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_pseudo_register_write (gdbarch, avr_pseudo_register_write);
set_gdbarch_return_value (gdbarch, avr_return_value);
- set_gdbarch_print_insn (gdbarch, print_insn_avr);
set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call);
diff --git a/gdb/bfin-tdep.c b/gdb/bfin-tdep.c
index c590a91..bfb5d57 100644
--- a/gdb/bfin-tdep.c
+++ b/gdb/bfin-tdep.c
@@ -838,7 +838,6 @@ bfin_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_frame_args_skip (gdbarch, 8);
set_gdbarch_unwind_pc (gdbarch, bfin_unwind_pc);
set_gdbarch_frame_align (gdbarch, bfin_frame_align);
- set_gdbarch_print_insn (gdbarch, print_insn_bfin);
/* Hook in ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch);
diff --git a/gdb/cris-tdep.c b/gdb/cris-tdep.c
index eb39772..e554e24 100644
--- a/gdb/cris-tdep.c
+++ b/gdb/cris-tdep.c
@@ -3785,19 +3785,6 @@ cris_gdb_func (struct gdbarch *gdbarch, enum cris_op_type op_type,
}
}
-/* This wrapper is to avoid cris_get_assembler being called before
- exec_bfd has been set. */
-
-static int
-cris_delayed_get_disassembler (bfd_vma addr, struct disassemble_info *info)
-{
- int (*print_insn) (bfd_vma addr, struct disassemble_info *info);
-
- print_insn = cris_get_disassembler (exec_bfd);
- gdb_assert (print_insn != NULL);
- return print_insn (addr, info);
-}
-
/* Originally from <asm/elf.h>. */
typedef unsigned char cris_elf_greg_t[4];
@@ -4134,10 +4121,5 @@ cris_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
/* Hook in ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch);
- /* FIXME: cagney/2003-08-27: It should be possible to select a CRIS
- disassembler, even when there is no BFD. Does something like
- "gdb; target remote; disassmeble *0x123" work? */
- set_gdbarch_print_insn (gdbarch, cris_delayed_get_disassembler);
-
return gdbarch;
}
diff --git a/gdb/frv-tdep.c b/gdb/frv-tdep.c
index 8744733..c0257bd 100644
--- a/gdb/frv-tdep.c
+++ b/gdb/frv-tdep.c
@@ -1582,7 +1582,6 @@ frv_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
break;
}
- set_gdbarch_print_insn (gdbarch, print_insn_frv);
if (frv_abi (gdbarch) == FRV_ABI_FDPIC)
set_gdbarch_convert_from_func_ptr_addr (gdbarch,
frv_convert_from_func_ptr_addr);
diff --git a/gdb/ft32-tdep.c b/gdb/ft32-tdep.c
index 5b28275..966a593 100644
--- a/gdb/ft32-tdep.c
+++ b/gdb/ft32-tdep.c
@@ -637,8 +637,6 @@ ft32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_unwind_pc (gdbarch, ft32_unwind_pc);
- set_gdbarch_print_insn (gdbarch, print_insn_ft32);
-
/* Hook in ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch);
diff --git a/gdb/gdbarch.c b/gdb/gdbarch.c
index 9c827ac..257c39f 100644
--- a/gdb/gdbarch.c
+++ b/gdb/gdbarch.c
@@ -429,6 +429,7 @@ gdbarch_alloc (const struct gdbarch_info *info,
gdbarch->stabs_argument_has_addr = default_stabs_argument_has_addr;
gdbarch->convert_from_func_ptr_addr = convert_from_func_ptr_addr_identity;
gdbarch->addr_bits_remove = core_addr_identity;
+ gdbarch->print_insn = default_print_insn;
gdbarch->skip_trampoline_code = generic_skip_trampoline_code;
gdbarch->skip_solib_resolver = generic_skip_solib_resolver;
gdbarch->in_solib_return_trampoline = generic_in_solib_return_trampoline;
@@ -621,8 +622,7 @@ verify_gdbarch (struct gdbarch *gdbarch)
/* Skip verify of addr_bits_remove, invalid_p == 0 */
/* Skip verify of software_single_step, has predicate. */
/* Skip verify of single_step_through_delay, has predicate. */
- if (gdbarch->print_insn == 0)
- log.puts ("\n\tprint_insn");
+ /* Skip verify of print_insn, invalid_p == 0 */
/* Skip verify of skip_trampoline_code, invalid_p == 0 */
/* Skip verify of skip_solib_resolver, invalid_p == 0 */
/* Skip verify of in_solib_return_trampoline, invalid_p == 0 */
diff --git a/gdb/gdbarch.sh b/gdb/gdbarch.sh
index 753819f..7992cbe 100755
--- a/gdb/gdbarch.sh
+++ b/gdb/gdbarch.sh
@@ -643,7 +643,7 @@ F;std::vector<CORE_ADDR>;software_single_step;struct regcache *regcache;regcache
M;int;single_step_through_delay;struct frame_info *frame;frame
# FIXME: cagney/2003-08-28: Need to find a better way of selecting the
# disassembler. Perhaps objdump can handle it?
-f;int;print_insn;bfd_vma vma, struct disassemble_info *info;vma, info;;0;
+f;int;print_insn;bfd_vma vma, struct disassemble_info *info;vma, info;;default_print_insn;;0
f;CORE_ADDR;skip_trampoline_code;struct frame_info *frame, CORE_ADDR pc;frame, pc;;generic_skip_trampoline_code;;0
diff --git a/gdb/hppa-tdep.c b/gdb/hppa-tdep.c
index 2636a27..229b061 100644
--- a/gdb/hppa-tdep.c
+++ b/gdb/hppa-tdep.c
@@ -3122,8 +3122,6 @@ hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
/* Helper for function argument information. */
set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
- set_gdbarch_print_insn (gdbarch, print_insn_hppa);
-
/* When a hardware watchpoint triggers, we'll move the inferior past
it by removing all eventpoints; stepping past the instruction
that caused the trigger; reinserting eventpoints; and checking
diff --git a/gdb/iq2000-tdep.c b/gdb/iq2000-tdep.c
index 7d8ed3c..99824b7 100644
--- a/gdb/iq2000-tdep.c
+++ b/gdb/iq2000-tdep.c
@@ -838,7 +838,6 @@ iq2000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_frame_args_skip (gdbarch, 0);
set_gdbarch_skip_prologue (gdbarch, iq2000_skip_prologue);
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
- set_gdbarch_print_insn (gdbarch, print_insn_iq2000);
set_gdbarch_register_type (gdbarch, iq2000_register_type);
set_gdbarch_frame_align (gdbarch, iq2000_frame_align);
set_gdbarch_unwind_sp (gdbarch, iq2000_unwind_sp);
diff --git a/gdb/lm32-tdep.c b/gdb/lm32-tdep.c
index bd3e182..84ece3e 100644
--- a/gdb/lm32-tdep.c
+++ b/gdb/lm32-tdep.c
@@ -565,9 +565,6 @@ lm32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_push_dummy_call (gdbarch, lm32_push_dummy_call);
set_gdbarch_return_value (gdbarch, lm32_return_value);
- /* Instruction disassembler. */
- set_gdbarch_print_insn (gdbarch, print_insn_lm32);
-
lm32_add_reggroups (gdbarch);
set_gdbarch_register_reggroup_p (gdbarch, lm32_register_reggroup_p);
diff --git a/gdb/m32c-tdep.c b/gdb/m32c-tdep.c
index 7376372..1bc5950 100644
--- a/gdb/m32c-tdep.c
+++ b/gdb/m32c-tdep.c
@@ -2639,9 +2639,6 @@ m32c_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
/* Register set. */
make_regs (gdbarch);
- /* Disassembly. */
- set_gdbarch_print_insn (gdbarch, print_insn_m32c);
-
/* Breakpoints. */
set_gdbarch_breakpoint_kind_from_pc (gdbarch, m32c_breakpoint::kind_from_pc);
set_gdbarch_sw_breakpoint_from_kind (gdbarch, m32c_breakpoint::bp_from_kind);
diff --git a/gdb/m32r-tdep.c b/gdb/m32r-tdep.c
index 0820af9..2d14ced 100644
--- a/gdb/m32r-tdep.c
+++ b/gdb/m32r-tdep.c
@@ -947,8 +947,6 @@ m32r_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
/* Return the unwound PC value. */
set_gdbarch_unwind_pc (gdbarch, m32r_unwind_pc);
- set_gdbarch_print_insn (gdbarch, print_insn_m32r);
-
/* Hook in ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch);
diff --git a/gdb/m68hc11-tdep.c b/gdb/m68hc11-tdep.c
index 893d9c2..b19ddf7b 100644
--- a/gdb/m68hc11-tdep.c
+++ b/gdb/m68hc11-tdep.c
@@ -1344,16 +1344,6 @@ m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
if (flags & STO_M68HC12_INTERRUPT)
MSYMBOL_SET_RTI (msym);
}
-
-static int
-gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
-{
- if (info->arch == bfd_arch_m68hc11)
- return print_insn_m68hc11 (memaddr, info);
- else
- return print_insn_m68hc12 (memaddr, info);
-}
-
\f
/* 68HC11/68HC12 register groups.
@@ -1525,7 +1515,6 @@ m68hc11_gdbarch_init (struct gdbarch_info info,
m68hc11_breakpoint::kind_from_pc);
set_gdbarch_sw_breakpoint_from_kind (gdbarch,
m68hc11_breakpoint::bp_from_kind);
- set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11);
m68hc11_add_reggroups (gdbarch);
set_gdbarch_register_reggroup_p (gdbarch, m68hc11_register_reggroup_p);
diff --git a/gdb/m68k-tdep.c b/gdb/m68k-tdep.c
index 7c3bf4c..5b4736d 100644
--- a/gdb/m68k-tdep.c
+++ b/gdb/m68k-tdep.c
@@ -1240,10 +1240,6 @@ m68k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_return_in_first_hidden_param_p (gdbarch,
m68k_return_in_first_hidden_param_p);
-
- /* Disassembler. */
- set_gdbarch_print_insn (gdbarch, print_insn_m68k);
-
#if defined JB_PC && defined JB_ELEMENT_SIZE
tdep->jb_pc = JB_PC;
tdep->jb_elt_size = JB_ELEMENT_SIZE;
diff --git a/gdb/m88k-tdep.c b/gdb/m88k-tdep.c
index 57fe644..d08a913 100644
--- a/gdb/m88k-tdep.c
+++ b/gdb/m88k-tdep.c
@@ -838,8 +838,6 @@ m88k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_iterate_over_regset_sections
(gdbarch, m88k_iterate_over_regset_sections);
- set_gdbarch_print_insn (gdbarch, print_insn_m88k);
-
set_gdbarch_skip_prologue (gdbarch, m88k_skip_prologue);
/* Stack grows downward. */
diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
index 59f94c5..86cb090 100644
--- a/gdb/microblaze-tdep.c
+++ b/gdb/microblaze-tdep.c
@@ -738,8 +738,6 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_frame_args_skip (gdbarch, 8);
- set_gdbarch_print_insn (gdbarch, print_insn_microblaze);
-
set_gdbarch_write_pc (gdbarch, microblaze_write_pc);
set_gdbarch_unwind_pc (gdbarch, microblaze_unwind_pc);
diff --git a/gdb/mn10300-tdep.c b/gdb/mn10300-tdep.c
index 0f5e10f..1e2526f 100644
--- a/gdb/mn10300-tdep.c
+++ b/gdb/mn10300-tdep.c
@@ -1444,8 +1444,6 @@ mn10300_gdbarch_init (struct gdbarch_info info,
set_gdbarch_sw_breakpoint_from_kind (gdbarch,
mn10300_breakpoint::bp_from_kind);
/* decr_pc_after_break? */
- /* Disassembly. */
- set_gdbarch_print_insn (gdbarch, print_insn_mn10300);
/* Stage 2 */
set_gdbarch_return_value (gdbarch, mn10300_return_value);
diff --git a/gdb/moxie-tdep.c b/gdb/moxie-tdep.c
index 2972d52..91248cc 100644
--- a/gdb/moxie-tdep.c
+++ b/gdb/moxie-tdep.c
@@ -1142,8 +1142,6 @@ moxie_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_unwind_pc (gdbarch, moxie_unwind_pc);
- set_gdbarch_print_insn (gdbarch, print_insn_moxie);
-
/* Hook in ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch);
diff --git a/gdb/msp430-tdep.c b/gdb/msp430-tdep.c
index d9eebf0..d730e1b 100644
--- a/gdb/msp430-tdep.c
+++ b/gdb/msp430-tdep.c
@@ -997,9 +997,6 @@ msp430_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
msp430_breakpoint::bp_from_kind);
set_gdbarch_decr_pc_after_break (gdbarch, 1);
- /* Disassembly. */
- set_gdbarch_print_insn (gdbarch, print_insn_msp430);
-
/* Frames, prologues, etc. */
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
set_gdbarch_skip_prologue (gdbarch, msp430_skip_prologue);
diff --git a/gdb/mt-tdep.c b/gdb/mt-tdep.c
index 1f94b01..2ab6c02 100644
--- a/gdb/mt-tdep.c
+++ b/gdb/mt-tdep.c
@@ -1174,7 +1174,6 @@ mt_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_sw_breakpoint_from_kind (gdbarch, mt_sw_breakpoint_from_kind);
set_gdbarch_decr_pc_after_break (gdbarch, 0);
set_gdbarch_frame_args_skip (gdbarch, 0);
- set_gdbarch_print_insn (gdbarch, print_insn_mt);
set_gdbarch_register_type (gdbarch, mt_register_type);
set_gdbarch_register_reggroup_p (gdbarch, mt_register_reggroup_p);
diff --git a/gdb/nds32-tdep.c b/gdb/nds32-tdep.c
index f942780..ae84567 100644
--- a/gdb/nds32-tdep.c
+++ b/gdb/nds32-tdep.c
@@ -2161,8 +2161,6 @@ nds32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_frame_align (gdbarch, nds32_frame_align);
frame_base_set_default (gdbarch, &nds32_frame_base);
- set_gdbarch_print_insn (gdbarch, print_insn_nds32);
-
/* Handle longjmp. */
set_gdbarch_get_longjmp_target (gdbarch, nds32_get_longjmp_target);
diff --git a/gdb/nios2-tdep.c b/gdb/nios2-tdep.c
index c214078..905d859 100644
--- a/gdb/nios2-tdep.c
+++ b/gdb/nios2-tdep.c
@@ -1772,18 +1772,6 @@ nios2_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
}
}
-/* Implement the print_insn gdbarch method. */
-
-static int
-nios2_print_insn (bfd_vma memaddr, disassemble_info *info)
-{
- if (info->endian == BFD_ENDIAN_BIG)
- return print_insn_big_nios2 (memaddr, info);
- else
- return print_insn_little_nios2 (memaddr, info);
-}
-
-
/* Implement the frame_align gdbarch method. */
static CORE_ADDR
@@ -2357,8 +2345,6 @@ nios2_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
frame_base_set_default (gdbarch, &nios2_frame_base);
- set_gdbarch_print_insn (gdbarch, nios2_print_insn);
-
/* Enable inferior call support. */
set_gdbarch_push_dummy_call (gdbarch, nios2_push_dummy_call);
diff --git a/gdb/rx-tdep.c b/gdb/rx-tdep.c
index 83bb3ec..cfd1856 100644
--- a/gdb/rx-tdep.c
+++ b/gdb/rx-tdep.c
@@ -1117,8 +1117,6 @@ rx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_sw_breakpoint_from_kind (gdbarch, rx_breakpoint::bp_from_kind);
set_gdbarch_skip_prologue (gdbarch, rx_skip_prologue);
- set_gdbarch_print_insn (gdbarch, print_insn_rx);
-
set_gdbarch_unwind_pc (gdbarch, rx_unwind_pc);
set_gdbarch_unwind_sp (gdbarch, rx_unwind_sp);
diff --git a/gdb/s390-linux-tdep.c b/gdb/s390-linux-tdep.c
index 8139d81..6d68260 100644
--- a/gdb/s390-linux-tdep.c
+++ b/gdb/s390-linux-tdep.c
@@ -8040,8 +8040,6 @@ s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
break;
}
- set_gdbarch_print_insn (gdbarch, print_insn_s390);
-
set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
/* Enable TLS support. */
diff --git a/gdb/score-tdep.c b/gdb/score-tdep.c
index 94cf0ca..d231674 100644
--- a/gdb/score-tdep.c
+++ b/gdb/score-tdep.c
@@ -126,15 +126,6 @@ score_register_sim_regno (struct gdbarch *gdbarch, int regnum)
}
#endif
-static int
-score_print_insn (bfd_vma memaddr, struct disassemble_info *info)
-{
- if (info->endian == BFD_ENDIAN_BIG)
- return print_insn_big_score (memaddr, info);
- else
- return print_insn_little_score (memaddr, info);
-}
-
static inst_t *
score7_fetch_inst (struct gdbarch *gdbarch, CORE_ADDR addr, gdb_byte *memblock)
{
@@ -1491,7 +1482,6 @@ score_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
set_gdbarch_unwind_sp (gdbarch, score_unwind_sp);
set_gdbarch_unwind_pc (gdbarch, score_unwind_pc);
- set_gdbarch_print_insn (gdbarch, score_print_insn);
switch (target_mach)
{
diff --git a/gdb/sh-tdep.c b/gdb/sh-tdep.c
index 0bc678a..2c2b268 100644
--- a/gdb/sh-tdep.c
+++ b/gdb/sh-tdep.c
@@ -2289,7 +2289,6 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_breakpoint_kind_from_pc (gdbarch, sh_breakpoint_kind_from_pc);
set_gdbarch_sw_breakpoint_from_kind (gdbarch, sh_sw_breakpoint_from_kind);
- set_gdbarch_print_insn (gdbarch, print_insn_sh);
set_gdbarch_register_sim_regno (gdbarch, legacy_register_sim_regno);
set_gdbarch_return_value (gdbarch, sh_return_value_nofpu);
diff --git a/gdb/sh64-tdep.c b/gdb/sh64-tdep.c
index 33986fd..581b57f 100644
--- a/gdb/sh64-tdep.c
+++ b/gdb/sh64-tdep.c
@@ -2416,8 +2416,6 @@ sh64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_breakpoint_kind_from_pc (gdbarch, sh64_breakpoint_kind_from_pc);
set_gdbarch_sw_breakpoint_from_kind (gdbarch, sh64_sw_breakpoint_from_kind);
-
- set_gdbarch_print_insn (gdbarch, print_insn_sh);
set_gdbarch_register_sim_regno (gdbarch, legacy_register_sim_regno);
set_gdbarch_return_value (gdbarch, sh64_return_value);
diff --git a/gdb/sparc-tdep.c b/gdb/sparc-tdep.c
index d1e64b4..40c47ae 100644
--- a/gdb/sparc-tdep.c
+++ b/gdb/sparc-tdep.c
@@ -1817,8 +1817,6 @@ sparc32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_frame_args_skip (gdbarch, 8);
- set_gdbarch_print_insn (gdbarch, print_insn_sparc);
-
set_gdbarch_software_single_step (gdbarch, sparc_software_single_step);
set_gdbarch_write_pc (gdbarch, sparc_write_pc);
diff --git a/gdb/tic6x-tdep.c b/gdb/tic6x-tdep.c
index 012b749..156a54f 100644
--- a/gdb/tic6x-tdep.c
+++ b/gdb/tic6x-tdep.c
@@ -346,14 +346,6 @@ tic6x_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
return tdep->breakpoint;
}
-/* This is the implementation of gdbarch method print_insn. */
-
-static int
-tic6x_print_insn (bfd_vma memaddr, disassemble_info *info)
-{
- return print_insn_tic6x (memaddr, info);
-}
-
static void
tic6x_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
struct dwarf2_frame_state_reg *reg,
@@ -1318,8 +1310,6 @@ tic6x_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
/* Single stepping. */
set_gdbarch_software_single_step (gdbarch, tic6x_software_single_step);
- set_gdbarch_print_insn (gdbarch, tic6x_print_insn);
-
/* Call dummy code. */
set_gdbarch_frame_align (gdbarch, tic6x_frame_align);
diff --git a/gdb/tilegx-tdep.c b/gdb/tilegx-tdep.c
index fd42a35..2db6790 100644
--- a/gdb/tilegx-tdep.c
+++ b/gdb/tilegx-tdep.c
@@ -1055,8 +1055,6 @@ tilegx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
tilegx_breakpoint::bp_from_kind);
set_gdbarch_return_value (gdbarch, tilegx_return_value);
- set_gdbarch_print_insn (gdbarch, print_insn_tilegx);
-
gdbarch_init_osabi (info, gdbarch);
dwarf2_append_unwinders (gdbarch);
diff --git a/gdb/v850-tdep.c b/gdb/v850-tdep.c
index 668635e..087026a 100644
--- a/gdb/v850-tdep.c
+++ b/gdb/v850-tdep.c
@@ -1463,8 +1463,6 @@ v850_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_push_dummy_call (gdbarch, v850_push_dummy_call);
set_gdbarch_skip_prologue (gdbarch, v850_skip_prologue);
- set_gdbarch_print_insn (gdbarch, print_insn_v850);
-
set_gdbarch_frame_align (gdbarch, v850_frame_align);
set_gdbarch_unwind_sp (gdbarch, v850_unwind_sp);
set_gdbarch_unwind_pc (gdbarch, v850_unwind_pc);
diff --git a/gdb/vax-tdep.c b/gdb/vax-tdep.c
index 870d268..a92a35a 100644
--- a/gdb/vax-tdep.c
+++ b/gdb/vax-tdep.c
@@ -502,8 +502,6 @@ vax_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_deprecated_function_start_offset (gdbarch, 2);
set_gdbarch_believe_pcc_promotion (gdbarch, 1);
- set_gdbarch_print_insn (gdbarch, print_insn_vax);
-
set_gdbarch_unwind_pc (gdbarch, vax_unwind_pc);
frame_base_set_default (gdbarch, &vax_frame_base);
diff --git a/gdb/xstormy16-tdep.c b/gdb/xstormy16-tdep.c
index 7fdfc65..9d91fd5 100644
--- a/gdb/xstormy16-tdep.c
+++ b/gdb/xstormy16-tdep.c
@@ -849,8 +849,6 @@ xstormy16_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_skip_trampoline_code (gdbarch, xstormy16_skip_trampoline_code);
- set_gdbarch_print_insn (gdbarch, print_insn_xstormy16);
-
gdbarch_init_osabi (info, gdbarch);
dwarf2_append_unwinders (gdbarch);
diff --git a/gdb/xtensa-tdep.c b/gdb/xtensa-tdep.c
index 0a4ed37..f9e8584 100644
--- a/gdb/xtensa-tdep.c
+++ b/gdb/xtensa-tdep.c
@@ -3256,8 +3256,6 @@ xtensa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
frame_unwind_append_unwinder (gdbarch, &xtensa_unwind);
dwarf2_append_unwinders (gdbarch);
- set_gdbarch_print_insn (gdbarch, print_insn_xtensa);
-
set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
xtensa_add_reggroups (gdbarch);
--
1.9.1
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH 2/6] Delegate opcodes to select disassembler in GDB
2017-05-16 10:48 ` [PATCH 2/6] Delegate opcodes to select disassembler in GDB Yao Qi
@ 2017-06-30 0:19 ` Maciej W. Rozycki
2017-06-30 7:38 ` Yao Qi
0 siblings, 1 reply; 15+ messages in thread
From: Maciej W. Rozycki @ 2017-06-30 0:19 UTC (permalink / raw)
To: Yao Qi; +Cc: binutils, gdb-patches
Hi Yao,
On Tue, 16 May 2017, Yao Qi wrote:
> This patch removes the logic in GDB and calls
> opcodes/disassemble.c:disassembler in default to select disassembler.
This change causes an assertion failure when trying to disassemble a
MIPS16 function:
(gdb) disassemble main
Dump of assembler code for function main:
0x00400209 <+0>:
.../gdb/arch-utils.c:979: internal-error: int default_print_insn(bfd_vma, disassemble_info*): Assertion `info->mach == bfd_get_mach (exec_bfd)' failed.
A problem internal to GDB has been detected,
further debugging may prove unreliable.
Quit this debugging session? (y or n)
This is because `info->mach' is 16 (the `bfd_mach_mips16' aka `mips:16'
BFD) whereas `bfd_get_mach (exec_bfd)' is 33 (the `bfd_mach_mipsisa32r2'
aka `mips:isa32r2' BFD). This is expected for MIPS16 code within a
program that has been built for the MIPS32r2 ISA; see
`gdb_print_insn_mips' for the origin.
So what's the purpose of this assertion?
Maciej
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 2/6] Delegate opcodes to select disassembler in GDB
2017-06-30 0:19 ` Maciej W. Rozycki
@ 2017-06-30 7:38 ` Yao Qi
2017-07-05 23:53 ` Maciej W. Rozycki
0 siblings, 1 reply; 15+ messages in thread
From: Yao Qi @ 2017-06-30 7:38 UTC (permalink / raw)
To: Maciej W. Rozycki; +Cc: binutils, gdb-patches
"Maciej W. Rozycki" <macro@imgtec.com> writes:
> This change causes an assertion failure when trying to disassemble a
> MIPS16 function:
>
> (gdb) disassemble main
> Dump of assembler code for function main:
> 0x00400209 <+0>:
> .../gdb/arch-utils.c:979: internal-error: int default_print_insn(bfd_vma, disassemble_info*): Assertion `info->mach == bfd_get_mach (exec_bfd)' failed.
> A problem internal to GDB has been detected,
> further debugging may prove unreliable.
> Quit this debugging session? (y or n)
Sorry about that. I did deliberately run
testsuite/gdb.base/all-architectures-[0-7].exp tests to cover the case
that using disassembler for each architecture. It covers mips, but it
doesn't cover mips16 and micromips.
>
> This is because `info->mach' is 16 (the `bfd_mach_mips16' aka `mips:16'
> BFD) whereas `bfd_get_mach (exec_bfd)' is 33 (the `bfd_mach_mipsisa32r2'
> aka `mips:isa32r2' BFD). This is expected for MIPS16 code within a
> program that has been built for the MIPS32r2 ISA; see
> `gdb_print_insn_mips' for the origin.
>
> So what's the purpose of this assertion?
The assertion is based on assumption that "info->mach" is got from
bfd_get_mach (exec_bfd), but it is not right for mips16. We can remove
this line. If you agree, I'll post a patch to remove this line.
--
Yao (齐尧)
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 2/6] Delegate opcodes to select disassembler in GDB
2017-06-30 7:38 ` Yao Qi
@ 2017-07-05 23:53 ` Maciej W. Rozycki
2017-07-07 16:41 ` Yao Qi
0 siblings, 1 reply; 15+ messages in thread
From: Maciej W. Rozycki @ 2017-07-05 23:53 UTC (permalink / raw)
To: Yao Qi; +Cc: binutils, gdb-patches
Hi Yao,
On Fri, 30 Jun 2017, Yao Qi wrote:
> > This change causes an assertion failure when trying to disassemble a
> > MIPS16 function:
> >
> > (gdb) disassemble main
> > Dump of assembler code for function main:
> > 0x00400209 <+0>:
> > .../gdb/arch-utils.c:979: internal-error: int default_print_insn(bfd_vma, disassemble_info*): Assertion `info->mach == bfd_get_mach (exec_bfd)' failed.
> > A problem internal to GDB has been detected,
> > further debugging may prove unreliable.
> > Quit this debugging session? (y or n)
>
> Sorry about that. I did deliberately run
> testsuite/gdb.base/all-architectures-[0-7].exp tests to cover the case
> that using disassembler for each architecture. It covers mips, but it
> doesn't cover mips16 and micromips.
These are smoke tests really AFAICT, and for this to trigger they would
have to cover the usual case where the gdbarch's BFD is different from one
chosen for the disassembly, and for that `set architecture <foo>' is (or
at least may not be) enough. You'd really have to run full MIPS
regression testing with a MIPS16 or microMIPS multilib, and I realise you
may not have the necessary infrastructure available at hand.
> > This is because `info->mach' is 16 (the `bfd_mach_mips16' aka `mips:16'
> > BFD) whereas `bfd_get_mach (exec_bfd)' is 33 (the `bfd_mach_mipsisa32r2'
> > aka `mips:isa32r2' BFD). This is expected for MIPS16 code within a
> > program that has been built for the MIPS32r2 ISA; see
> > `gdb_print_insn_mips' for the origin.
> >
> > So what's the purpose of this assertion?
>
> The assertion is based on assumption that "info->mach" is got from
> bfd_get_mach (exec_bfd), but it is not right for mips16. We can remove
> this line. If you agree, I'll post a patch to remove this line.
I can see the assumption from the assertion itself, but what is its
purpose?
Normally you place an assertion in code to guard against a case that is
not handled (correctly) and if let through it would lead execution to go
astray, e.g. because it is a new complicated feature we have not yet got
to implementing or because it is a case we think that will never happen,
and code that follows has assumptions that will not be met.
So if you say that you can remove the assertion with no adverse effect on
processing, then I think it should not have been placed there in the first
place.
Anyway, if you look at code in `gdb_print_insn_mips', then you'll find
this comment:
/* FIXME: cagney/2003-06-26: Is this even necessary? The
disassembler needs to be able to locally determine the ISA, and
not rely on GDB. Otherwize the stand-alone 'objdump -d' will not
work. */
and it is indeed the case that `objdump' handles this correctly without
the need to switch away from the BFD selected for the binary being
handled. However in GDB we have this problem that we do not pass the
symbol table down to libopcodes for the disassembler, and in the case of
the MIPS target it is the symbol table that carries information about
which functions contain regular MIPS code, MIPS16 code and microMIPS code
respectively.
Lacking symbol information we resort to this hack of overriding the BFD
for the purpose of disassembly only, and this has the adverse effect of
getting instruction subsetting wrong: the `bfd_mach_mips16' and
`bfd_mach_mips_micromips' BFDs always choose the maximum instruction set
supported possible whereas the binary handled may only support a subset
(or worse yet an alternative set), as indicated by the original BFD
selected. This in turn may confuse and mislead the person running a debug
session into thinking code disassembled is not the problem they are after.
Do you think it would be possible as a part of your disassembler rework
to make the symbol table available to libopcodes? Then the hack currently
present in `gdb_print_insn_mips' could go. I remember looking into it a
while ago and concluding it would be somewhat tricky because the symbol
table format expected by libopcodes is not the same that we use in GDB.
Maciej
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH 2/6] Delegate opcodes to select disassembler in GDB
2017-07-05 23:53 ` Maciej W. Rozycki
@ 2017-07-07 16:41 ` Yao Qi
2017-08-01 16:31 ` Maciej W. Rozycki
0 siblings, 1 reply; 15+ messages in thread
From: Yao Qi @ 2017-07-07 16:41 UTC (permalink / raw)
To: Maciej W. Rozycki; +Cc: binutils, gdb-patches
"Maciej W. Rozycki" <macro@imgtec.com> writes:
> I can see the assumption from the assertion itself, but what is its
> purpose?
>
The purpose of this assert is to check that the disassemble_info passed
to opcodes is correctly got from the executable.
> Normally you place an assertion in code to guard against a case that is
> not handled (correctly) and if let through it would lead execution to go
> astray, e.g. because it is a new complicated feature we have not yet got
> to implementing or because it is a case we think that will never happen,
> and code that follows has assumptions that will not be met.
>
> So if you say that you can remove the assertion with no adverse effect on
> processing, then I think it should not have been placed there in the first
> place.
>
> Anyway, if you look at code in `gdb_print_insn_mips', then you'll find
> this comment:
>
> /* FIXME: cagney/2003-06-26: Is this even necessary? The
> disassembler needs to be able to locally determine the ISA, and
> not rely on GDB. Otherwize the stand-alone 'objdump -d' will not
> work. */
>
Yes, that is the point of my patch series.
> and it is indeed the case that `objdump' handles this correctly without
> the need to switch away from the BFD selected for the binary being
> handled. However in GDB we have this problem that we do not pass the
> symbol table down to libopcodes for the disassembler, and in the case of
> the MIPS target it is the symbol table that carries information about
> which functions contain regular MIPS code, MIPS16 code and microMIPS code
> respectively.
>
> Lacking symbol information we resort to this hack of overriding the BFD
> for the purpose of disassembly only, and this has the adverse effect of
> getting instruction subsetting wrong: the `bfd_mach_mips16' and
> `bfd_mach_mips_micromips' BFDs always choose the maximum instruction set
> supported possible whereas the binary handled may only support a subset
> (or worse yet an alternative set), as indicated by the original BFD
> selected. This in turn may confuse and mislead the person running a debug
> session into thinking code disassembled is not the problem they are after.
>
> Do you think it would be possible as a part of your disassembler rework
> to make the symbol table available to libopcodes? Then the hack currently
> present in `gdb_print_insn_mips' could go. I remember looking into it a
> while ago and concluding it would be somewhat tricky because the symbol
> table format expected by libopcodes is not the same that we use in
> GDB.
We can pass the symbol table to opcodes, so it can choose the right
disassembler. However, current GDB uses both symbol and address to
determine some address is in a MIPS16 or microMIPS function (done by
mips_pc_is_mips16, mips_pc_is_micromips). If we want to use symbol
table to tell the address is in microMIPS or MIPS16, and GDB can't find
a symbol for a given address, I suppose we need to create a fake
symbol, and pass it to disassembler. Why don't we teach GDB
unconditionally create a fake symbol with the right bits set in order to
meet the check in mips-dis.c:is_compressed_mode_p?
arm-tdep.c:gdb_print_insn_arm has already do so to disassemble Thumb
instructions.
What do you think of the patch below? IMO, change in
is_compressed_mode_p fixes a bug on usage of info->num_symbols vs.
info->symtab_size. I can't test this patch.
--
Yao (齐尧)
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index c1800e4..b848015 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -7007,14 +7007,31 @@ gdb_print_insn_mips (bfd_vma memaddr, struct disassemble_info *info)
disassembler needs to be able to locally determine the ISA, and
not rely on GDB. Otherwize the stand-alone 'objdump -d' will not
work. */
- if (mips_pc_is_mips16 (gdbarch, memaddr))
- info->mach = bfd_mach_mips16;
- else if (mips_pc_is_micromips (gdbarch, memaddr))
- info->mach = bfd_mach_mips_micromips;
-
- /* Round down the instruction address to the appropriate boundary. */
- memaddr &= (info->mach == bfd_mach_mips16
- || info->mach == bfd_mach_mips_micromips) ? ~1 : ~3;
+ if (mips_pc_is_mips16 (gdbarch, memaddr)
+ || mips_pc_is_micromips (gdbarch, memaddr))
+ {
+ static asymbol asym;
+ static asymbol *asymp = &asym;
+
+ /* Create a fake symbol to tell disassembler in opcodes that
+ the code is MIPS16 or miscroMIPS. */
+ asym.flags = BSF_SYNTHETIC;
+ info->symtab_pos = 0;
+ info->symtab_size = 1;
+ info->symtab = ≈
+ info->symbols = ≈
+
+ if (mips_pc_is_mips16 (gdbarch, memaddr))
+ asym.udata.i = ELF_ST_SET_MIPS16 (asym.udata.i);
+ else
+ asym.udata.i = ELF_ST_SET_MICROMIPS (asym.udata.i);
+
+ /* Round down the instruction address to the appropriate
+ boundary. */
+ memaddr &= ~1;
+ }
+ else
+ memaddr &= ~3;
/* Set the disassembler options. */
if (!info->disassembler_options)
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 4519500..d413841 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -2452,7 +2452,7 @@ is_compressed_mode_p (struct disassemble_info *info, bfd_boolean micromips_p)
int i;
int l;
- for (i = info->symtab_pos, l = i + info->num_symbols; i < l; i++)
+ for (i = info->symtab_pos, l = info->symtab_size; i < l; i++)
if (((info->symtab[i])->flags & BSF_SYNTHETIC) != 0
&& ((!micromips_p
&& ELF_ST_IS_MIPS16 ((*info->symbols)->udata.i))
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH 2/6] Delegate opcodes to select disassembler in GDB
2017-07-07 16:41 ` Yao Qi
@ 2017-08-01 16:31 ` Maciej W. Rozycki
0 siblings, 0 replies; 15+ messages in thread
From: Maciej W. Rozycki @ 2017-08-01 16:31 UTC (permalink / raw)
To: Yao Qi; +Cc: binutils, gdb-patches
On Fri, 7 Jul 2017, Yao Qi wrote:
> > I can see the assumption from the assertion itself, but what is its
> > purpose?
> >
>
> The purpose of this assert is to check that the disassemble_info passed
> to opcodes is correctly got from the executable.
What is there in opcodes that needs guarding with the assertion though,
i.e. will anything break if the `disassemble_info' passed is not exactly
one obtained from the executable?
I'd at least imagine a need for the user to be able to explicitly
override the disassembler's machine via `set architecture ...', e.g. to
get a meaningful disassembly of code that has been built with a temporary
instruction set override for encodings that are not included in the ISA
recorded in ELF file structures.
> > Do you think it would be possible as a part of your disassembler rework
> > to make the symbol table available to libopcodes? Then the hack currently
> > present in `gdb_print_insn_mips' could go. I remember looking into it a
> > while ago and concluding it would be somewhat tricky because the symbol
> > table format expected by libopcodes is not the same that we use in
> > GDB.
>
> We can pass the symbol table to opcodes, so it can choose the right
> disassembler. However, current GDB uses both symbol and address to
> determine some address is in a MIPS16 or microMIPS function (done by
> mips_pc_is_mips16, mips_pc_is_micromips). If we want to use symbol
> table to tell the address is in microMIPS or MIPS16, and GDB can't find
> a symbol for a given address, I suppose we need to create a fake
> symbol, and pass it to disassembler. Why don't we teach GDB
> unconditionally create a fake symbol with the right bits set in order to
> meet the check in mips-dis.c:is_compressed_mode_p?
> arm-tdep.c:gdb_print_insn_arm has already do so to disassemble Thumb
> instructions.
We also need symbols for other purposes, specifically telling code and
data apart in PLT entries, jump tables and constant pools, so a fake
symbol won't address all cases. Ideally we'd present output corresponding
to that produced with `objdump -d', with a way for the user to request
`objdump -D' equivalent if disassembly of what is supposed to be data is
required.
> What do you think of the patch below? IMO, change in
> is_compressed_mode_p fixes a bug on usage of info->num_symbols vs.
> info->symtab_size. I can't test this patch.
There is no bug, as it's `info->num_symbols' that tells the disassembler
the number of symbols starting from `info->symtab_pos' in the symbol table
affecting the location requested. Any further symbols are irrelevant (the
symbol table is sorted by the increasing address, so those will be beyond
the location disassembled). You also need to set `info->num_symbols' to 1
if you're only passing a single symbol in the first place; it's a part of
this internal API.
The setting of BSF_SYNTHETIC might be dangerous as code elsewhere assumes
it's only set for PLT symbols. Right now it affects `is_mips16_plt_tail',
causing it to crash, because with your change `asym.section' remains null
and that function effectively accesses `asym.section->vma'. I feel uneasy
about papering it over by adding a check for the section being non-null
there, I think we need to look for a better solution as this is getting
too fragile IMO.
So given that this is a grave regression I think short-term we just need
to remove the offending assertion checks.
NB for the purpose of validation I have now bisected the actual
regression to commit 6394c606997f ("Don't use print_insn_XXX in GDB"),
rather than commit 39503f82427e ("Delegate opcodes to select disassembler
in GDB") where the assertion check has been introduced. There is also
commit 003ca0fd2286 ("Refactor disassembler selection") on the opcodes'
side, causing assertion failures triggering once the checks in GDB have
been removed. I'll be following up with a fix right away.
Also in the course of this investigation I have discovered a grave
regression in compressed breakpoint handling. I'll be posting a fix
separately.
Maciej
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 5/6] Use disassble.c:disassembler select rs6000 disassembler
2017-05-16 10:49 [PATCH 0/6] Unify the disassembler selection in gdb and objdump Yao Qi
2017-05-16 10:48 ` [PATCH 2/6] Delegate opcodes to select disassembler in GDB Yao Qi
@ 2017-05-16 10:48 ` Yao Qi
2017-05-16 10:48 ` [PATCH 4/6] Use disassble.c:disassembler select rl78 disassembler Yao Qi
` (5 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Yao Qi @ 2017-05-16 10:48 UTC (permalink / raw)
To: binutils, gdb-patches
Nowadays, rs6000 disassembler is selected in different ways in
opcodes and gdb,
opcodes:
case bfd_arch_rs6000:
if (mach == bfd_mach_ppc_620)
disassemble = print_insn_big_powerpc;
else
disassemble = print_insn_rs6000;
break;
gdb:
if (arch == bfd_arch_rs6000)
set_gdbarch_print_insn (gdbarch, print_insn_rs6000);
else
set_gdbarch_print_insn (gdbarch, gdb_print_insn_powerpc);
I am not sure which one is the right one. However, such selection
should be done in one place instead of two. In fact, this changes gdb
to align with objdump on disassembler selection.
gdb:
2017-05-15 Yao Qi <yao.qi@linaro.org>
* rs6000-tdep.c (gdb_print_insn_powerpc): Remove.
(rs6000_gdbarch_init): Don't call set_gdbarch_print_insn.
---
gdb/rs6000-tdep.c | 14 --------------
1 file changed, 14 deletions(-)
diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c
index 4072464..0bd65fc 100644
--- a/gdb/rs6000-tdep.c
+++ b/gdb/rs6000-tdep.c
@@ -3233,14 +3233,6 @@ find_variant_by_arch (enum bfd_architecture arch, unsigned long mach)
return NULL;
}
-static int
-gdb_print_insn_powerpc (bfd_vma memaddr, disassemble_info *info)
-{
- if (info->endian == BFD_ENDIAN_BIG)
- return print_insn_big_powerpc (memaddr, info);
- else
- return print_insn_little_powerpc (memaddr, info);
-}
\f
static CORE_ADDR
rs6000_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
@@ -6449,12 +6441,6 @@ rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
- /* Select instruction printer. */
- if (arch == bfd_arch_rs6000)
- set_gdbarch_print_insn (gdbarch, print_insn_rs6000);
- else
- set_gdbarch_print_insn (gdbarch, gdb_print_insn_powerpc);
-
set_gdbarch_num_regs (gdbarch, PPC_NUM_REGS);
if (have_spe)
--
1.9.1
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 4/6] Use disassble.c:disassembler select rl78 disassembler
2017-05-16 10:49 [PATCH 0/6] Unify the disassembler selection in gdb and objdump Yao Qi
2017-05-16 10:48 ` [PATCH 2/6] Delegate opcodes to select disassembler in GDB Yao Qi
2017-05-16 10:48 ` [PATCH 5/6] Use disassble.c:disassembler select rs6000 disassembler Yao Qi
@ 2017-05-16 10:48 ` Yao Qi
2017-05-16 10:49 ` [PATCH 1/6] Refactor disassembler selection Yao Qi
` (4 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Yao Qi @ 2017-05-16 10:48 UTC (permalink / raw)
To: binutils, gdb-patches
This patch changes rl78 to let disassble.c:disassembler select
disassembler. rl78_get_disassembler doesn't handle the case
that abfd is NULL, so this patch also fix it.
gdb:
2017-05-15 Yao Qi <yao.qi@linaro.org>
* rl78-tdep.c (rl78_gdbarch_init): Don't call
set_gdbarch_print_insn.
opcodes:
2017-05-15 Yao Qi <yao.qi@linaro.org>
* rl78-dis.c (rl78_get_disassembler): If parameter abfd
is NULL, set cpu to E_FLAG_RL78_ANY_CPU.
---
gdb/rl78-tdep.c | 3 ---
opcodes/rl78-dis.c | 6 +++++-
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/gdb/rl78-tdep.c b/gdb/rl78-tdep.c
index 307a760..5775f96 100644
--- a/gdb/rl78-tdep.c
+++ b/gdb/rl78-tdep.c
@@ -1470,9 +1470,6 @@ rl78_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_sw_breakpoint_from_kind (gdbarch, rl78_breakpoint::bp_from_kind);
set_gdbarch_decr_pc_after_break (gdbarch, 1);
- /* Disassembly. */
- set_gdbarch_print_insn (gdbarch, print_insn_rl78);
-
/* Frames, prologues, etc. */
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
set_gdbarch_skip_prologue (gdbarch, rl78_skip_prologue);
diff --git a/opcodes/rl78-dis.c b/opcodes/rl78-dis.c
index 1839436..799cd38 100644
--- a/opcodes/rl78-dis.c
+++ b/opcodes/rl78-dis.c
@@ -406,7 +406,11 @@ print_insn_rl78_g14 (bfd_vma addr, disassemble_info * dis)
disassembler_ftype
rl78_get_disassembler (bfd *abfd)
{
- int cpu = abfd->tdata.elf_obj_data->elf_header->e_flags & E_FLAG_RL78_CPU_MASK;
+ int cpu = E_FLAG_RL78_ANY_CPU;
+
+ if (abfd != NULL)
+ cpu = abfd->tdata.elf_obj_data->elf_header->e_flags & E_FLAG_RL78_CPU_MASK;
+
switch (cpu)
{
case E_FLAG_RL78_G10:
--
1.9.1
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 1/6] Refactor disassembler selection
2017-05-16 10:49 [PATCH 0/6] Unify the disassembler selection in gdb and objdump Yao Qi
` (2 preceding siblings ...)
2017-05-16 10:48 ` [PATCH 4/6] Use disassble.c:disassembler select rl78 disassembler Yao Qi
@ 2017-05-16 10:49 ` Yao Qi
2017-05-16 10:49 ` [PATCH 3/6] Use disassble.c:disassembler select h8300 disassembler Yao Qi
` (3 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Yao Qi @ 2017-05-16 10:49 UTC (permalink / raw)
To: binutils, gdb-patches
Nowadays, opcodes/disassemble.c:disassembler selects the proper
disassembler according to ABFD only. However, it actually
selects disassemblers according to arch, mach, endianess, and
abfd. This patch adds them to the parameters of disassembler,
so that its caller can still select disassemblers in case that
abfd is NULL (a typical case in GDB).
There isn't any functionality change.
binutils:
2017-05-15 Yao Qi <yao.qi@linaro.org>
* objdump.c (disassemble_data): Caller update.
include:
2017-05-15 Yao Qi <yao.qi@linaro.org>
* dis-asm.h (disassembler): Update declaration.
opcodes:
2017-05-15 Yao Qi <yao.qi@linaro.org>
* disassemble.c (disassembler): Add arguments a, big and mach.
Use them.
sim/common:
2017-05-15 Yao Qi <yao.qi@linaro.org>
* sim-trace.c (trace_disasm): Caller update.
---
binutils/objdump.c | 4 +++-
include/dis-asm.h | 8 ++++++--
opcodes/disassemble.c | 41 ++++++++++++++++++++++++++---------------
sim/common/sim-trace.c | 6 +++++-
4 files changed, 40 insertions(+), 19 deletions(-)
diff --git a/binutils/objdump.c b/binutils/objdump.c
index 5972da1..81d47a0 100644
--- a/binutils/objdump.c
+++ b/binutils/objdump.c
@@ -2386,7 +2386,9 @@ disassemble_data (bfd *abfd)
}
/* Use libopcodes to locate a suitable disassembler. */
- aux.disassemble_fn = disassembler (abfd);
+ aux.disassemble_fn = disassembler (bfd_get_arch (abfd),
+ bfd_big_endian (abfd),
+ bfd_get_mach (abfd), abfd);
if (!aux.disassemble_fn)
{
non_fatal (_("can't disassemble for architecture %s\n"),
diff --git a/include/dis-asm.h b/include/dis-asm.h
index 6f1801d..dd93504 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -354,8 +354,12 @@ extern const disasm_options_t *disassembler_options_powerpc (void);
extern const disasm_options_t *disassembler_options_arm (void);
extern const disasm_options_t *disassembler_options_s390 (void);
-/* Fetch the disassembler for a given BFD, if that support is available. */
-extern disassembler_ftype disassembler (bfd *);
+/* Fetch the disassembler for a given architecture ARC, endianess (big
+ endian if BIG is true), bfd_mach value MACH, and ABFD, if that support
+ is available. ABFD may be NULL. */
+extern disassembler_ftype disassembler (enum bfd_architecture arc,
+ bfd_boolean big, unsigned long mach,
+ bfd *abfd);
/* Amend the disassemble_info structure as necessary for the target architecture.
Should only be called after initialising the info->arch field. */
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index dd7d3a3..e79b5c7 100644
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -21,6 +21,7 @@
#include "sysdep.h"
#include "dis-asm.h"
#include "safe-ctype.h"
+#include <assert.h>
#ifdef ARCH_all
#define ARCH_aarch64
@@ -109,11 +110,22 @@
#endif
disassembler_ftype
-disassembler (bfd *abfd)
+disassembler (enum bfd_architecture a, bfd_boolean big, unsigned long mach,
+ bfd *abfd)
{
- enum bfd_architecture a = bfd_get_arch (abfd);
disassembler_ftype disassemble;
+ if (abfd != NULL)
+ {
+ /* Do some asserts that the first three parameters should equal
+ to what we can get from ABFD. On the other hand, these
+ asserts help removing some compiler errors on unused
+ parameter. */
+ assert (a == bfd_get_arch (abfd));
+ assert (big == bfd_big_endian (abfd));
+ assert (mach == bfd_get_mach (abfd));
+ }
+
switch (a)
{
/* If you add a case to this table, also add it to the
@@ -135,7 +147,7 @@ disassembler (bfd *abfd)
#endif
#ifdef ARCH_arm
case bfd_arch_arm:
- if (bfd_big_endian (abfd))
+ if (big)
disassemble = print_insn_big_arm;
else
disassemble = print_insn_little_arm;
@@ -184,13 +196,12 @@ disassembler (bfd *abfd)
#endif
#ifdef ARCH_h8300
case bfd_arch_h8300:
- if (bfd_get_mach (abfd) == bfd_mach_h8300h
- || bfd_get_mach (abfd) == bfd_mach_h8300hn)
+ if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
disassemble = print_insn_h8300h;
- else if (bfd_get_mach (abfd) == bfd_mach_h8300s
- || bfd_get_mach (abfd) == bfd_mach_h8300sn
- || bfd_get_mach (abfd) == bfd_mach_h8300sx
- || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
+ else if (mach == bfd_mach_h8300s
+ || mach == bfd_mach_h8300sn
+ || mach == bfd_mach_h8300sx
+ || mach == bfd_mach_h8300sxn)
disassemble = print_insn_h8300s;
else
disassemble = print_insn_h8300;
@@ -326,7 +337,7 @@ disassembler (bfd *abfd)
#endif
#ifdef ARCH_mips
case bfd_arch_mips:
- if (bfd_big_endian (abfd))
+ if (big)
disassemble = print_insn_big_mips;
else
disassemble = print_insn_little_mips;
@@ -349,7 +360,7 @@ disassembler (bfd *abfd)
#endif
#ifdef ARCH_nios2
case bfd_arch_nios2:
- if (bfd_big_endian (abfd))
+ if (big)
disassemble = print_insn_big_nios2;
else
disassemble = print_insn_little_nios2;
@@ -372,7 +383,7 @@ disassembler (bfd *abfd)
#endif
#ifdef ARCH_powerpc
case bfd_arch_powerpc:
- if (bfd_big_endian (abfd))
+ if (big)
disassemble = print_insn_big_powerpc;
else
disassemble = print_insn_little_powerpc;
@@ -390,7 +401,7 @@ disassembler (bfd *abfd)
#endif
#ifdef ARCH_rs6000
case bfd_arch_rs6000:
- if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
+ if (mach == bfd_mach_ppc_620)
disassemble = print_insn_big_powerpc;
else
disassemble = print_insn_rs6000;
@@ -413,7 +424,7 @@ disassembler (bfd *abfd)
#endif
#ifdef ARCH_score
case bfd_arch_score:
- if (bfd_big_endian (abfd))
+ if (big)
disassemble = print_insn_big_score;
else
disassemble = print_insn_little_score;
@@ -507,7 +518,7 @@ disassembler (bfd *abfd)
#endif
#ifdef ARCH_z8k
case bfd_arch_z8k:
- if (bfd_get_mach(abfd) == bfd_mach_z8001)
+ if (mach == bfd_mach_z8001)
disassemble = print_insn_z8001;
else
disassemble = print_insn_z8002;
diff --git a/sim/common/sim-trace.c b/sim/common/sim-trace.c
index da19b82..ff11d20 100644
--- a/sim/common/sim-trace.c
+++ b/sim/common/sim-trace.c
@@ -919,7 +919,11 @@ trace_disasm (SIM_DESC sd, sim_cpu *cpu, address_word addr)
if (trace_data->dis_bfd != bfd)
{
trace_data->dis_bfd = bfd;
- trace_data->disassembler = disassembler (trace_data->dis_bfd);
+ trace_data->disassembler
+ = disassembler (bfd_get_arch (trace_data->dis_bfd),
+ bfd_big_endian (trace_data->dis_bfd),
+ bfd_get_mach (trace_data->dis_bfd),
+ trace_data->dis_bfd);
INIT_DISASSEMBLE_INFO (*info, cpu, dis_printf);
info->read_memory_func = dis_read;
info->arch = bfd_get_arch (bfd);
--
1.9.1
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 3/6] Use disassble.c:disassembler select h8300 disassembler
2017-05-16 10:49 [PATCH 0/6] Unify the disassembler selection in gdb and objdump Yao Qi
` (3 preceding siblings ...)
2017-05-16 10:49 ` [PATCH 1/6] Refactor disassembler selection Yao Qi
@ 2017-05-16 10:49 ` Yao Qi
2017-05-16 10:49 ` [RFC 6/6] Move print_insn_XXX to an opcodes internal header Yao Qi
` (2 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Yao Qi @ 2017-05-16 10:49 UTC (permalink / raw)
To: binutils, gdb-patches
opcodes/disassble.c:disassembler select h8300 disassembler like this,
if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
disassemble = print_insn_h8300h;
else if (mach == bfd_mach_h8300s
|| mach == bfd_mach_h8300sn
|| mach == bfd_mach_h8300sx
|| mach == bfd_mach_h8300sxn)
disassemble = print_insn_h8300s;
else
disassemble = print_insn_h8300;
which is the same as what gdb/h8300-tdpe.c does,
switch (info.bfd_arch_info->mach)
{
case bfd_mach_h8300:
...
set_gdbarch_print_insn (gdbarch, print_insn_h8300);
case bfd_mach_h8300h:
case bfd_mach_h8300hn:
...
set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
case bfd_mach_h8300s:
case bfd_mach_h8300sn:
...
set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
so we can leave disassble.c:disassembler doing the selection.
gdb:
2017-05-15 Yao Qi <yao.qi@linaro.org>
* h8300-tdep.c (h8300_gdbarch_init): Don't call
set_gdbarch_print_insn.
---
gdb/h8300-tdep.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/gdb/h8300-tdep.c b/gdb/h8300-tdep.c
index 7b260b1..1e8bde1 100644
--- a/gdb/h8300-tdep.c
+++ b/gdb/h8300-tdep.c
@@ -1275,7 +1275,6 @@ h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
set_gdbarch_return_value (gdbarch, h8300_return_value);
- set_gdbarch_print_insn (gdbarch, print_insn_h8300);
break;
case bfd_mach_h8300h:
case bfd_mach_h8300hn:
@@ -1296,7 +1295,6 @@ h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
}
set_gdbarch_return_value (gdbarch, h8300h_return_value);
- set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
break;
case bfd_mach_h8300s:
case bfd_mach_h8300sn:
@@ -1317,7 +1315,6 @@ h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
}
set_gdbarch_return_value (gdbarch, h8300h_return_value);
- set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
break;
case bfd_mach_h8300sx:
case bfd_mach_h8300sxn:
@@ -1338,7 +1335,6 @@ h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
}
set_gdbarch_return_value (gdbarch, h8300h_return_value);
- set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
break;
}
--
1.9.1
^ permalink raw reply [flat|nested] 15+ messages in thread* [RFC 6/6] Move print_insn_XXX to an opcodes internal header
2017-05-16 10:49 [PATCH 0/6] Unify the disassembler selection in gdb and objdump Yao Qi
` (4 preceding siblings ...)
2017-05-16 10:49 ` [PATCH 3/6] Use disassble.c:disassembler select h8300 disassembler Yao Qi
@ 2017-05-16 10:49 ` Yao Qi
2017-05-17 3:00 ` [PATCH 0/6] Unify the disassembler selection in gdb and objdump Alan Modra
2017-05-23 9:19 ` Pedro Alves
7 siblings, 0 replies; 15+ messages in thread
From: Yao Qi @ 2017-05-16 10:49 UTC (permalink / raw)
To: binutils, gdb-patches
It is an RFC, so I didn't add ChangeLog entry.
With the changes done in previous patches, print_insn_XXX functions
don't have to be external visible out of opcodes, because both gdb
and objdump select disassemblers through a single interface.
This patch moves these print_insn_XXX declarations from
include/dis-asm.h to opcodes/disassemble.h, which is a new header
added by this patch.
---
include/dis-asm.h | 80 +------------------------------------
opcodes/alpha-dis.c | 2 +-
opcodes/avr-dis.c | 2 +-
opcodes/bfin-dis.c | 2 +-
opcodes/cr16-dis.c | 2 +-
opcodes/crx-dis.c | 2 +-
opcodes/d10v-dis.c | 2 +-
opcodes/d30v-dis.c | 2 +-
opcodes/disassemble.c | 2 +-
opcodes/disassemble.h | 102 +++++++++++++++++++++++++++++++++++++++++++++++
opcodes/dlx-dis.c | 2 +-
opcodes/epiphany-dis.c | 2 +-
opcodes/fr30-dis.c | 2 +-
opcodes/frv-dis.c | 2 +-
opcodes/ft32-dis.c | 2 +-
opcodes/h8300-dis.c | 2 +-
opcodes/h8500-dis.c | 2 +-
opcodes/hppa-dis.c | 2 +-
opcodes/i370-dis.c | 2 +-
opcodes/i386-dis.c | 2 +-
opcodes/i860-dis.c | 2 +-
opcodes/i960-dis.c | 2 +-
opcodes/ip2k-dis.c | 2 +-
opcodes/iq2000-dis.c | 2 +-
opcodes/lm32-dis.c | 2 +-
opcodes/m10200-dis.c | 2 +-
opcodes/m10300-dis.c | 2 +-
opcodes/m32r-dis.c | 2 +-
opcodes/m68hc11-dis.c | 2 +-
opcodes/m68k-dis.c | 2 +-
opcodes/m88k-dis.c | 2 +-
opcodes/mcore-dis.c | 2 +-
opcodes/metag-dis.c | 2 +-
opcodes/microblaze-dis.c | 2 +-
opcodes/mmix-dis.c | 2 +-
opcodes/moxie-dis.c | 2 +-
opcodes/msp430-dis.c | 2 +-
opcodes/mt-dis.c | 2 +-
opcodes/nds32-dis.c | 2 +-
opcodes/nios2-dis.c | 2 +-
opcodes/ns32k-dis.c | 2 +-
opcodes/or1k-dis.c | 2 +-
opcodes/pdp11-dis.c | 2 +-
opcodes/pj-dis.c | 2 +-
opcodes/ppc-dis.c | 2 +-
opcodes/pru-dis.c | 2 +-
opcodes/riscv-dis.c | 2 +-
opcodes/rl78-dis.c | 2 +-
opcodes/s390-dis.c | 2 +-
opcodes/score-dis.c | 2 +-
opcodes/sh-dis.c | 2 +-
opcodes/sh64-dis.c | 2 +-
opcodes/tic30-dis.c | 2 +-
opcodes/tic4x-dis.c | 2 +-
opcodes/tic54x-dis.c | 2 +-
opcodes/tic6x-dis.c | 2 +-
opcodes/tic80-dis.c | 2 +-
opcodes/tilegx-dis.c | 2 +-
opcodes/tilepro-dis.c | 2 +-
opcodes/v850-dis.c | 2 +-
opcodes/vax-dis.c | 2 +-
opcodes/visium-dis.c | 2 +-
opcodes/w65-dis.c | 2 +-
opcodes/wasm32-dis.c | 2 +-
opcodes/xc16x-dis.c | 2 +-
opcodes/xgate-dis.c | 2 +-
opcodes/xstormy16-dis.c | 2 +-
opcodes/xtensa-dis.c | 2 +-
opcodes/z80-dis.c | 2 +-
opcodes/z8k-dis.c | 2 +-
70 files changed, 172 insertions(+), 146 deletions(-)
create mode 100644 opcodes/disassemble.h
diff --git a/include/dis-asm.h b/include/dis-asm.h
index dd93504..911bfb0 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -237,95 +237,20 @@ typedef struct
target address. Return number of octets processed. */
typedef int (*disassembler_ftype) (bfd_vma, disassemble_info *);
+/* Disassemblers used out side of opcodes library. */
extern int print_insn_aarch64 (bfd_vma, disassemble_info *);
-extern int print_insn_alpha (bfd_vma, disassemble_info *);
-extern int print_insn_avr (bfd_vma, disassemble_info *);
-extern int print_insn_bfin (bfd_vma, disassemble_info *);
extern int print_insn_big_arm (bfd_vma, disassemble_info *);
extern int print_insn_big_mips (bfd_vma, disassemble_info *);
-extern int print_insn_big_nios2 (bfd_vma, disassemble_info *);
-extern int print_insn_big_powerpc (bfd_vma, disassemble_info *);
-extern int print_insn_big_score (bfd_vma, disassemble_info *);
-extern int print_insn_cr16 (bfd_vma, disassemble_info *);
-extern int print_insn_crx (bfd_vma, disassemble_info *);
-extern int print_insn_d10v (bfd_vma, disassemble_info *);
-extern int print_insn_d30v (bfd_vma, disassemble_info *);
-extern int print_insn_dlx (bfd_vma, disassemble_info *);
-extern int print_insn_epiphany (bfd_vma, disassemble_info *);
-extern int print_insn_fr30 (bfd_vma, disassemble_info *);
-extern int print_insn_frv (bfd_vma, disassemble_info *);
-extern int print_insn_ft32 (bfd_vma, disassemble_info *);
-extern int print_insn_h8300 (bfd_vma, disassemble_info *);
-extern int print_insn_h8300h (bfd_vma, disassemble_info *);
-extern int print_insn_h8300s (bfd_vma, disassemble_info *);
-extern int print_insn_h8500 (bfd_vma, disassemble_info *);
-extern int print_insn_hppa (bfd_vma, disassemble_info *);
-extern int print_insn_i370 (bfd_vma, disassemble_info *);
extern int print_insn_i386 (bfd_vma, disassemble_info *);
-extern int print_insn_i386_att (bfd_vma, disassemble_info *);
-extern int print_insn_i386_intel (bfd_vma, disassemble_info *);
-extern int print_insn_i860 (bfd_vma, disassemble_info *);
-extern int print_insn_i960 (bfd_vma, disassemble_info *);
extern int print_insn_ia64 (bfd_vma, disassemble_info *);
-extern int print_insn_ip2k (bfd_vma, disassemble_info *);
-extern int print_insn_iq2000 (bfd_vma, disassemble_info *);
extern int print_insn_little_arm (bfd_vma, disassemble_info *);
extern int print_insn_little_mips (bfd_vma, disassemble_info *);
-extern int print_insn_little_nios2 (bfd_vma, disassemble_info *);
-extern int print_insn_little_powerpc (bfd_vma, disassemble_info *);
-extern int print_insn_riscv (bfd_vma, disassemble_info *);
-extern int print_insn_little_score (bfd_vma, disassemble_info *);
-extern int print_insn_lm32 (bfd_vma, disassemble_info *);
-extern int print_insn_m32c (bfd_vma, disassemble_info *);
-extern int print_insn_m32r (bfd_vma, disassemble_info *);
-extern int print_insn_m68hc11 (bfd_vma, disassemble_info *);
-extern int print_insn_m68hc12 (bfd_vma, disassemble_info *);
-extern int print_insn_m9s12x (bfd_vma, disassemble_info *);
-extern int print_insn_m9s12xg (bfd_vma, disassemble_info *);
-extern int print_insn_m68k (bfd_vma, disassemble_info *);
-extern int print_insn_m88k (bfd_vma, disassemble_info *);
-extern int print_insn_mcore (bfd_vma, disassemble_info *);
+extern int print_insn_m32c (bfd_vma, disassemble_info *);
extern int print_insn_mep (bfd_vma, disassemble_info *);
-extern int print_insn_metag (bfd_vma, disassemble_info *);
-extern int print_insn_microblaze (bfd_vma, disassemble_info *);
-extern int print_insn_mmix (bfd_vma, disassemble_info *);
-extern int print_insn_mn10200 (bfd_vma, disassemble_info *);
-extern int print_insn_mn10300 (bfd_vma, disassemble_info *);
-extern int print_insn_moxie (bfd_vma, disassemble_info *);
-extern int print_insn_msp430 (bfd_vma, disassemble_info *);
-extern int print_insn_mt (bfd_vma, disassemble_info *);
-extern int print_insn_nds32 (bfd_vma, disassemble_info *);
-extern int print_insn_ns32k (bfd_vma, disassemble_info *);
-extern int print_insn_or1k (bfd_vma, disassemble_info *);
-extern int print_insn_pdp11 (bfd_vma, disassemble_info *);
-extern int print_insn_pj (bfd_vma, disassemble_info *);
-extern int print_insn_pru (bfd_vma, disassemble_info *);
-extern int print_insn_rs6000 (bfd_vma, disassemble_info *);
-extern int print_insn_s390 (bfd_vma, disassemble_info *);
extern int print_insn_sh (bfd_vma, disassemble_info *);
-extern int print_insn_sh64 (bfd_vma, disassemble_info *);
extern int print_insn_sh64x_media (bfd_vma, disassemble_info *);
extern int print_insn_sparc (bfd_vma, disassemble_info *);
extern int print_insn_spu (bfd_vma, disassemble_info *);
-extern int print_insn_tic30 (bfd_vma, disassemble_info *);
-extern int print_insn_tic4x (bfd_vma, disassemble_info *);
-extern int print_insn_tic54x (bfd_vma, disassemble_info *);
-extern int print_insn_tic6x (bfd_vma, disassemble_info *);
-extern int print_insn_tic80 (bfd_vma, disassemble_info *);
-extern int print_insn_tilegx (bfd_vma, disassemble_info *);
-extern int print_insn_tilepro (bfd_vma, disassemble_info *);
-extern int print_insn_v850 (bfd_vma, disassemble_info *);
-extern int print_insn_vax (bfd_vma, disassemble_info *);
-extern int print_insn_visium (bfd_vma, disassemble_info *);
-extern int print_insn_w65 (bfd_vma, disassemble_info *);
-extern int print_insn_wasm32 (bfd_vma, disassemble_info *);
-extern int print_insn_xc16x (bfd_vma, disassemble_info *);
-extern int print_insn_xgate (bfd_vma, disassemble_info *);
-extern int print_insn_xstormy16 (bfd_vma, disassemble_info *);
-extern int print_insn_xtensa (bfd_vma, disassemble_info *);
-extern int print_insn_z80 (bfd_vma, disassemble_info *);
-extern int print_insn_z8001 (bfd_vma, disassemble_info *);
-extern int print_insn_z8002 (bfd_vma, disassemble_info *);
extern int print_insn_rx (bfd_vma, disassemble_info *);
extern int print_insn_rl78 (bfd_vma, disassemble_info *);
extern int print_insn_rl78_g10 (bfd_vma, disassemble_info *);
@@ -334,7 +259,6 @@ extern int print_insn_rl78_g14 (bfd_vma, disassemble_info *);
extern disassembler_ftype arc_get_disassembler (bfd *);
extern disassembler_ftype cris_get_disassembler (bfd *);
-extern disassembler_ftype rl78_get_disassembler (bfd *);
extern void print_aarch64_disassembler_options (FILE *);
extern void print_i386_disassembler_options (FILE *);
diff --git a/opcodes/alpha-dis.c b/opcodes/alpha-dis.c
index 6fb7614..656e925 100644
--- a/opcodes/alpha-dis.c
+++ b/opcodes/alpha-dis.c
@@ -22,7 +22,7 @@
#include "sysdep.h"
#include <stdio.h>
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/alpha.h"
/* OSF register names. */
diff --git a/opcodes/avr-dis.c b/opcodes/avr-dis.c
index a16650a..97f1df5 100644
--- a/opcodes/avr-dis.c
+++ b/opcodes/avr-dis.c
@@ -22,7 +22,7 @@
#include "sysdep.h"
#include <assert.h>
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opintl.h"
#include "libiberty.h"
#include "bfd_stdint.h"
diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c
index a1eaeb4..bca68b4 100644
--- a/opcodes/bfin-dis.c
+++ b/opcodes/bfin-dis.c
@@ -38,7 +38,7 @@ typedef long TIword;
#define SIGNEXTEND(v, n) ((v << (HOST_LONG_WORD_SIZE - (n))) >> (HOST_LONG_WORD_SIZE - (n)))
#define MASKBITS(val, bits) (val & ((1 << bits) - 1))
-#include "dis-asm.h"
+#include "disassemble.h"
typedef unsigned int bu32;
diff --git a/opcodes/cr16-dis.c b/opcodes/cr16-dis.c
index 06ccfef..16385c3 100644
--- a/opcodes/cr16-dis.c
+++ b/opcodes/cr16-dis.c
@@ -19,7 +19,7 @@
Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/cr16.h"
#include "libiberty.h"
diff --git a/opcodes/crx-dis.c b/opcodes/crx-dis.c
index 9c14537..4e48668 100644
--- a/opcodes/crx-dis.c
+++ b/opcodes/crx-dis.c
@@ -21,7 +21,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/crx.h"
/* String to print when opcode was not matched. */
diff --git a/opcodes/d10v-dis.c b/opcodes/d10v-dis.c
index 657038f..7fa490e 100644
--- a/opcodes/d10v-dis.c
+++ b/opcodes/d10v-dis.c
@@ -21,7 +21,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "opcode/d10v.h"
-#include "dis-asm.h"
+#include "disassemble.h"
/* The PC wraps at 18 bits, except for the segment number,
so use this mask to keep the parts we want. */
diff --git a/opcodes/d30v-dis.c b/opcodes/d30v-dis.c
index b0c643e..aff3eb0 100644
--- a/opcodes/d30v-dis.c
+++ b/opcodes/d30v-dis.c
@@ -21,7 +21,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "opcode/d30v.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opintl.h"
#define PC_MASK 0xFFFFFFFF
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index e79b5c7..cd134e8 100644
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -19,7 +19,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "safe-ctype.h"
#include <assert.h>
diff --git a/opcodes/disassemble.h b/opcodes/disassemble.h
new file mode 100644
index 0000000..dec09fe
--- /dev/null
+++ b/opcodes/disassemble.h
@@ -0,0 +1,102 @@
+/* Header only used inside opcodes library for disassemble.
+
+ Copyright (C) 2017 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA. */
+
+#ifndef DISASSEMBLE_H
+#define DISASSEMBLE_H
+#include "dis-asm.h"
+
+extern int print_insn_alpha (bfd_vma, disassemble_info *);
+extern int print_insn_avr (bfd_vma, disassemble_info *);
+extern int print_insn_bfin (bfd_vma, disassemble_info *);
+extern int print_insn_big_nios2 (bfd_vma, disassemble_info *);
+extern int print_insn_big_powerpc (bfd_vma, disassemble_info *);
+extern int print_insn_big_score (bfd_vma, disassemble_info *);
+extern int print_insn_cr16 (bfd_vma, disassemble_info *);
+extern int print_insn_crx (bfd_vma, disassemble_info *);
+extern int print_insn_d10v (bfd_vma, disassemble_info *);
+extern int print_insn_d30v (bfd_vma, disassemble_info *);
+extern int print_insn_dlx (bfd_vma, disassemble_info *);
+extern int print_insn_epiphany (bfd_vma, disassemble_info *);
+extern int print_insn_fr30 (bfd_vma, disassemble_info *);
+extern int print_insn_frv (bfd_vma, disassemble_info *);
+extern int print_insn_ft32 (bfd_vma, disassemble_info *);
+extern int print_insn_h8300 (bfd_vma, disassemble_info *);
+extern int print_insn_h8300h (bfd_vma, disassemble_info *);
+extern int print_insn_h8300s (bfd_vma, disassemble_info *);
+extern int print_insn_h8500 (bfd_vma, disassemble_info *);
+extern int print_insn_hppa (bfd_vma, disassemble_info *);
+extern int print_insn_i370 (bfd_vma, disassemble_info *);
+extern int print_insn_i386_att (bfd_vma, disassemble_info *);
+extern int print_insn_i386_intel (bfd_vma, disassemble_info *);
+extern int print_insn_i860 (bfd_vma, disassemble_info *);
+extern int print_insn_i960 (bfd_vma, disassemble_info *);
+extern int print_insn_ip2k (bfd_vma, disassemble_info *);
+extern int print_insn_iq2000 (bfd_vma, disassemble_info *);
+extern int print_insn_little_nios2 (bfd_vma, disassemble_info *);
+extern int print_insn_riscv (bfd_vma, disassemble_info *);
+extern int print_insn_little_powerpc (bfd_vma, disassemble_info *);
+extern int print_insn_little_score (bfd_vma, disassemble_info *);
+extern int print_insn_lm32 (bfd_vma, disassemble_info *);
+extern int print_insn_m32r (bfd_vma, disassemble_info *);
+extern int print_insn_m68hc11 (bfd_vma, disassemble_info *);
+extern int print_insn_m68hc12 (bfd_vma, disassemble_info *);
+extern int print_insn_m9s12x (bfd_vma, disassemble_info *);
+extern int print_insn_m9s12xg (bfd_vma, disassemble_info *);
+extern int print_insn_m68k (bfd_vma, disassemble_info *);
+extern int print_insn_m88k (bfd_vma, disassemble_info *);
+extern int print_insn_mcore (bfd_vma, disassemble_info *);
+extern int print_insn_metag (bfd_vma, disassemble_info *);
+extern int print_insn_microblaze (bfd_vma, disassemble_info *);
+extern int print_insn_mmix (bfd_vma, disassemble_info *);
+extern int print_insn_mn10200 (bfd_vma, disassemble_info *);
+extern int print_insn_mn10300 (bfd_vma, disassemble_info *);
+extern int print_insn_moxie (bfd_vma, disassemble_info *);
+extern int print_insn_msp430 (bfd_vma, disassemble_info *);
+extern int print_insn_mt (bfd_vma, disassemble_info *);
+extern int print_insn_nds32 (bfd_vma, disassemble_info *);
+extern int print_insn_ns32k (bfd_vma, disassemble_info *);
+extern int print_insn_or1k (bfd_vma, disassemble_info *);
+extern int print_insn_pdp11 (bfd_vma, disassemble_info *);
+extern int print_insn_pj (bfd_vma, disassemble_info *);
+extern int print_insn_pru (bfd_vma, disassemble_info *);
+extern int print_insn_rs6000 (bfd_vma, disassemble_info *);
+extern int print_insn_s390 (bfd_vma, disassemble_info *);
+extern int print_insn_sh64 (bfd_vma, disassemble_info *);
+extern int print_insn_tic30 (bfd_vma, disassemble_info *);
+extern int print_insn_tic4x (bfd_vma, disassemble_info *);
+extern int print_insn_tic54x (bfd_vma, disassemble_info *);
+extern int print_insn_tic6x (bfd_vma, disassemble_info *);
+extern int print_insn_tic80 (bfd_vma, disassemble_info *);
+extern int print_insn_tilegx (bfd_vma, disassemble_info *);
+extern int print_insn_tilepro (bfd_vma, disassemble_info *);
+extern int print_insn_v850 (bfd_vma, disassemble_info *);
+extern int print_insn_vax (bfd_vma, disassemble_info *);
+extern int print_insn_visium (bfd_vma, disassemble_info *);
+extern int print_insn_w65 (bfd_vma, disassemble_info *);
+extern int print_insn_wasm32 (bfd_vma, disassemble_info *);
+extern int print_insn_xc16x (bfd_vma, disassemble_info *);
+extern int print_insn_xgate (bfd_vma, disassemble_info *);
+extern int print_insn_xstormy16 (bfd_vma, disassemble_info *);
+extern int print_insn_xtensa (bfd_vma, disassemble_info *);
+extern int print_insn_z80 (bfd_vma, disassemble_info *);
+extern int print_insn_z8001 (bfd_vma, disassemble_info *);
+extern int print_insn_z8002 (bfd_vma, disassemble_info *);
+
+extern disassembler_ftype rl78_get_disassembler (bfd *);
+#endif /* DISASSEMBLE_H */
diff --git a/opcodes/dlx-dis.c b/opcodes/dlx-dis.c
index cd9be30..f106d32 100644
--- a/opcodes/dlx-dis.c
+++ b/opcodes/dlx-dis.c
@@ -20,7 +20,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/dlx.h"
#define R_ERROR 0x1
diff --git a/opcodes/epiphany-dis.c b/opcodes/epiphany-dis.c
index adbc97f..90458dd 100644
--- a/opcodes/epiphany-dis.c
+++ b/opcodes/epiphany-dis.c
@@ -28,7 +28,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c
index 071eeba..70ad479 100644
--- a/opcodes/fr30-dis.c
+++ b/opcodes/fr30-dis.c
@@ -28,7 +28,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
diff --git a/opcodes/frv-dis.c b/opcodes/frv-dis.c
index 41dd506..60b8f3f 100644
--- a/opcodes/frv-dis.c
+++ b/opcodes/frv-dis.c
@@ -28,7 +28,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
diff --git a/opcodes/ft32-dis.c b/opcodes/ft32-dis.c
index a8a6bb6..0384073 100644
--- a/opcodes/ft32-dis.c
+++ b/opcodes/ft32-dis.c
@@ -25,7 +25,7 @@
#define DEFINE_TABLE
#include "opcode/ft32.h"
-#include "dis-asm.h"
+#include "disassemble.h"
extern const ft32_opc_info_t ft32_opc_info[128];
diff --git a/opcodes/h8300-dis.c b/opcodes/h8300-dis.c
index 0e7c65a..5b20b84 100644
--- a/opcodes/h8300-dis.c
+++ b/opcodes/h8300-dis.c
@@ -23,7 +23,7 @@
#include "sysdep.h"
#define h8_opcodes h8ops
#include "opcode/h8300.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opintl.h"
#include "libiberty.h"
diff --git a/opcodes/h8500-dis.c b/opcodes/h8500-dis.c
index dc2f45e..0737999 100644
--- a/opcodes/h8500-dis.c
+++ b/opcodes/h8500-dis.c
@@ -25,7 +25,7 @@
#define DEFINE_TABLE
#include "h8500-opc.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opintl.h"
/* Maximum length of an instruction. */
diff --git a/opcodes/hppa-dis.c b/opcodes/hppa-dis.c
index c174b9c..9c2e842 100644
--- a/opcodes/hppa-dis.c
+++ b/opcodes/hppa-dis.c
@@ -22,7 +22,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "libhppa.h"
#include "opcode/hppa.h"
diff --git a/opcodes/i370-dis.c b/opcodes/i370-dis.c
index 529ba13..e66a01c 100644
--- a/opcodes/i370-dis.c
+++ b/opcodes/i370-dis.c
@@ -22,7 +22,7 @@
#include "sysdep.h"
#include <stdio.h>
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/i370.h"
/* This file provides several disassembler functions, all of which use
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 3980c46..51d8afb 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -33,7 +33,7 @@
the Intel manual for details. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opintl.h"
#include "opcode/i386.h"
#include "libiberty.h"
diff --git a/opcodes/i860-dis.c b/opcodes/i860-dis.c
index 5d3125c..54cb835 100644
--- a/opcodes/i860-dis.c
+++ b/opcodes/i860-dis.c
@@ -21,7 +21,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/i860.h"
/* Later we should probably choose the prefix based on which OS flavor. */
diff --git a/opcodes/i960-dis.c b/opcodes/i960-dis.c
index a34e261..c7d353a 100644
--- a/opcodes/i960-dis.c
+++ b/opcodes/i960-dis.c
@@ -19,7 +19,7 @@
02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
static const char *const reg_names[] = {
/* 0 */ "pfp", "sp", "rip", "r3", "r4", "r5", "r6", "r7",
diff --git a/opcodes/ip2k-dis.c b/opcodes/ip2k-dis.c
index 345d5f3..e6008bd 100644
--- a/opcodes/ip2k-dis.c
+++ b/opcodes/ip2k-dis.c
@@ -28,7 +28,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
diff --git a/opcodes/iq2000-dis.c b/opcodes/iq2000-dis.c
index 1a39d02..1d55187 100644
--- a/opcodes/iq2000-dis.c
+++ b/opcodes/iq2000-dis.c
@@ -28,7 +28,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
diff --git a/opcodes/lm32-dis.c b/opcodes/lm32-dis.c
index 7fd6195..8238993 100644
--- a/opcodes/lm32-dis.c
+++ b/opcodes/lm32-dis.c
@@ -28,7 +28,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
diff --git a/opcodes/m10200-dis.c b/opcodes/m10200-dis.c
index 9e0def3..96e13a8 100644
--- a/opcodes/m10200-dis.c
+++ b/opcodes/m10200-dis.c
@@ -21,7 +21,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "opcode/mn10200.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opintl.h"
static void
diff --git a/opcodes/m10300-dis.c b/opcodes/m10300-dis.c
index ec71a1a..26e245f 100644
--- a/opcodes/m10300-dis.c
+++ b/opcodes/m10300-dis.c
@@ -21,7 +21,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "opcode/mn10300.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opintl.h"
#define HAVE_AM33_2 (info->mach == AM33_2)
diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c
index a1dafce..bee98bd 100644
--- a/opcodes/m32r-dis.c
+++ b/opcodes/m32r-dis.c
@@ -28,7 +28,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
diff --git a/opcodes/m68hc11-dis.c b/opcodes/m68hc11-dis.c
index 0a59739..9d1b2cc 100644
--- a/opcodes/m68hc11-dis.c
+++ b/opcodes/m68hc11-dis.c
@@ -24,7 +24,7 @@
#include <stdio.h>
#include "opcode/m68hc11.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#define PC_REGNUM 3
diff --git a/opcodes/m68k-dis.c b/opcodes/m68k-dis.c
index 345c66b..d98e5af 100644
--- a/opcodes/m68k-dis.c
+++ b/opcodes/m68k-dis.c
@@ -19,7 +19,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "floatformat.h"
#include "libiberty.h"
#include "opintl.h"
diff --git a/opcodes/m88k-dis.c b/opcodes/m88k-dis.c
index 928090f..d37d421 100644
--- a/opcodes/m88k-dis.c
+++ b/opcodes/m88k-dis.c
@@ -21,7 +21,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/m88k.h"
#include "opintl.h"
#include "libiberty.h"
diff --git a/opcodes/mcore-dis.c b/opcodes/mcore-dis.c
index ed52e99..741819c 100644
--- a/opcodes/mcore-dis.c
+++ b/opcodes/mcore-dis.c
@@ -25,7 +25,7 @@
#define DEFINE_TABLE
#include "mcore-opc.h"
-#include "dis-asm.h"
+#include "disassemble.h"
/* Mask for each mcore_opclass: */
static const unsigned short imsk[] = {
diff --git a/opcodes/metag-dis.c b/opcodes/metag-dis.c
index 3c472e6..97bae4c 100644
--- a/opcodes/metag-dis.c
+++ b/opcodes/metag-dis.c
@@ -18,7 +18,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opintl.h"
#include <stdio.h>
diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
index 7f57380..6a174b0 100644
--- a/opcodes/microblaze-dis.c
+++ b/opcodes/microblaze-dis.c
@@ -24,7 +24,7 @@
#define STATIC_TABLE
#define DEFINE_TABLE
-#include "dis-asm.h"
+#include "disassemble.h"
#include <strings.h>
#include "microblaze-opc.h"
#include "microblaze-dis.h"
diff --git a/opcodes/mmix-dis.c b/opcodes/mmix-dis.c
index 6ec50bf..bfd0d02 100644
--- a/opcodes/mmix-dis.c
+++ b/opcodes/mmix-dis.c
@@ -22,7 +22,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "opcode/mmix.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "libiberty.h"
#include "bfd.h"
#include "opintl.h"
diff --git a/opcodes/moxie-dis.c b/opcodes/moxie-dis.c
index 070edc2..390fc78 100644
--- a/opcodes/moxie-dis.c
+++ b/opcodes/moxie-dis.c
@@ -25,7 +25,7 @@
#define DEFINE_TABLE
#include "opcode/moxie.h"
-#include "dis-asm.h"
+#include "disassemble.h"
static fprintf_ftype fpr;
static void *stream;
diff --git a/opcodes/msp430-dis.c b/opcodes/msp430-dis.c
index 58d31df..1a08ea9 100644
--- a/opcodes/msp430-dis.c
+++ b/opcodes/msp430-dis.c
@@ -26,7 +26,7 @@
#include <sys/types.h>
#include <errno.h>
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opintl.h"
#include "libiberty.h"
diff --git a/opcodes/mt-dis.c b/opcodes/mt-dis.c
index 1c74f88..fddbc81 100644
--- a/opcodes/mt-dis.c
+++ b/opcodes/mt-dis.c
@@ -28,7 +28,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
diff --git a/opcodes/nds32-dis.c b/opcodes/nds32-dis.c
index 0f2b0f4..4ee3bb5 100644
--- a/opcodes/nds32-dis.c
+++ b/opcodes/nds32-dis.c
@@ -22,7 +22,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
diff --git a/opcodes/nios2-dis.c b/opcodes/nios2-dis.c
index d95bbc5..cc6fff2 100644
--- a/opcodes/nios2-dis.c
+++ b/opcodes/nios2-dis.c
@@ -21,7 +21,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/nios2.h"
#include "libiberty.h"
#include <string.h>
diff --git a/opcodes/ns32k-dis.c b/opcodes/ns32k-dis.c
index 440a382..0794163 100644
--- a/opcodes/ns32k-dis.c
+++ b/opcodes/ns32k-dis.c
@@ -20,7 +20,7 @@
#include "sysdep.h"
#include "bfd.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#if !defined(const) && !defined(__STDC__)
#define const
#endif
diff --git a/opcodes/or1k-dis.c b/opcodes/or1k-dis.c
index 739269c..c9a7620 100644
--- a/opcodes/or1k-dis.c
+++ b/opcodes/or1k-dis.c
@@ -28,7 +28,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
diff --git a/opcodes/pdp11-dis.c b/opcodes/pdp11-dis.c
index e4afcd6..d492175 100644
--- a/opcodes/pdp11-dis.c
+++ b/opcodes/pdp11-dis.c
@@ -19,7 +19,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/pdp11.h"
#define AFTER_INSTRUCTION "\t"
diff --git a/opcodes/pj-dis.c b/opcodes/pj-dis.c
index 7821528..f34f05f 100644
--- a/opcodes/pj-dis.c
+++ b/opcodes/pj-dis.c
@@ -22,7 +22,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "opcode/pj.h"
-#include "dis-asm.h"
+#include "disassemble.h"
extern const pj_opc_info_t pj_opc_info[512];
diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c
index 3c9cbaf..5e89c50 100644
--- a/opcodes/ppc-dis.c
+++ b/opcodes/ppc-dis.c
@@ -21,7 +21,7 @@
#include "sysdep.h"
#include <stdio.h>
-#include "dis-asm.h"
+#include "disassemble.h"
#include "elf-bfd.h"
#include "elf/ppc.h"
#include "opintl.h"
diff --git a/opcodes/pru-dis.c b/opcodes/pru-dis.c
index ed642e8..80b34ad 100644
--- a/opcodes/pru-dis.c
+++ b/opcodes/pru-dis.c
@@ -20,7 +20,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/pru.h"
#include "libiberty.h"
#include <string.h>
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index bb53463..2dc76de 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -21,7 +21,7 @@
see <http://www.gnu.org/licenses/>. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "libiberty.h"
#include "opcode/riscv.h"
#include "opintl.h"
diff --git a/opcodes/rl78-dis.c b/opcodes/rl78-dis.c
index 799cd38..15a86e8 100644
--- a/opcodes/rl78-dis.c
+++ b/opcodes/rl78-dis.c
@@ -25,7 +25,7 @@
#include "bfd.h"
#include "elf-bfd.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/rl78.h"
#include "elf/rl78.h"
diff --git a/opcodes/s390-dis.c b/opcodes/s390-dis.c
index 2d97a2a..8d450b4 100644
--- a/opcodes/s390-dis.c
+++ b/opcodes/s390-dis.c
@@ -22,7 +22,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opintl.h"
#include "opcode/s390.h"
#include "libiberty.h"
diff --git a/opcodes/score-dis.c b/opcodes/score-dis.c
index 9c1c06c..fdfc4a0 100644
--- a/opcodes/score-dis.c
+++ b/opcodes/score-dis.c
@@ -23,7 +23,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#define DEFINE_TABLE
#include "opintl.h"
#include "bfd.h"
diff --git a/opcodes/sh-dis.c b/opcodes/sh-dis.c
index 5b82bad..ea69ff6 100644
--- a/opcodes/sh-dis.c
+++ b/opcodes/sh-dis.c
@@ -25,7 +25,7 @@
#define DEFINE_TABLE
#include "sh-opc.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#ifdef ARCH_all
#define INCLUDE_SHMEDIA
diff --git a/opcodes/sh64-dis.c b/opcodes/sh64-dis.c
index 386fb15..7329aff 100644
--- a/opcodes/sh64-dis.c
+++ b/opcodes/sh64-dis.c
@@ -20,7 +20,7 @@
#include "sysdep.h"
#include <stdio.h>
-#include "dis-asm.h"
+#include "disassemble.h"
#include "sh64-opc.h"
#include "libiberty.h"
/* We need to refer to the ELF header structure. */
diff --git a/opcodes/tic30-dis.c b/opcodes/tic30-dis.c
index 5956f2b..a103865 100644
--- a/opcodes/tic30-dis.c
+++ b/opcodes/tic30-dis.c
@@ -22,7 +22,7 @@
#include "sysdep.h"
#include <errno.h>
#include <math.h>
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/tic30.h"
#define NORMAL_INSN 1
diff --git a/opcodes/tic4x-dis.c b/opcodes/tic4x-dis.c
index c4d1d87..bd314ea 100644
--- a/opcodes/tic4x-dis.c
+++ b/opcodes/tic4x-dis.c
@@ -24,7 +24,7 @@
#include "sysdep.h"
#include <math.h>
#include "libiberty.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/tic4x.h"
#define TIC4X_DEBUG 0
diff --git a/opcodes/tic54x-dis.c b/opcodes/tic54x-dis.c
index c5cd418..c3cd88c 100644
--- a/opcodes/tic54x-dis.c
+++ b/opcodes/tic54x-dis.c
@@ -23,7 +23,7 @@
#include <errno.h>
#include <math.h>
#include <stdlib.h>
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/tic54x.h"
#include "coff/tic54x.h"
diff --git a/opcodes/tic6x-dis.c b/opcodes/tic6x-dis.c
index 48046b2..b8284fd 100644
--- a/opcodes/tic6x-dis.c
+++ b/opcodes/tic6x-dis.c
@@ -21,7 +21,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/tic6x.h"
#include "libiberty.h"
diff --git a/opcodes/tic80-dis.c b/opcodes/tic80-dis.c
index 37932d7..b477638 100644
--- a/opcodes/tic80-dis.c
+++ b/opcodes/tic80-dis.c
@@ -21,7 +21,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "opcode/tic80.h"
-#include "dis-asm.h"
+#include "disassemble.h"
static int length;
\f
diff --git a/opcodes/tilegx-dis.c b/opcodes/tilegx-dis.c
index 2a1ff41..c0c82af 100644
--- a/opcodes/tilegx-dis.c
+++ b/opcodes/tilegx-dis.c
@@ -24,7 +24,7 @@
#include "bfd.h"
#include "elf/tilegx.h"
#include "elf-bfd.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/tilegx.h"
diff --git a/opcodes/tilepro-dis.c b/opcodes/tilepro-dis.c
index 066d1d6..2a6b7aa 100644
--- a/opcodes/tilepro-dis.c
+++ b/opcodes/tilepro-dis.c
@@ -24,7 +24,7 @@
#include "bfd.h"
#include "elf/tilepro.h"
#include "elf-bfd.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/tilepro.h"
diff --git a/opcodes/v850-dis.c b/opcodes/v850-dis.c
index 5e63f35..4e39a49 100644
--- a/opcodes/v850-dis.c
+++ b/opcodes/v850-dis.c
@@ -23,7 +23,7 @@
#include <stdio.h>
#include <string.h>
#include "opcode/v850.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opintl.h"
static const char *const v850_reg_names[] =
diff --git a/opcodes/vax-dis.c b/opcodes/vax-dis.c
index 4642702..7adde97 100644
--- a/opcodes/vax-dis.c
+++ b/opcodes/vax-dis.c
@@ -23,7 +23,7 @@
#include <setjmp.h>
#include <string.h>
#include "opcode/vax.h"
-#include "dis-asm.h"
+#include "disassemble.h"
static char *reg_names[] =
{
diff --git a/opcodes/visium-dis.c b/opcodes/visium-dis.c
index f5b5c41..eb2930b 100644
--- a/opcodes/visium-dis.c
+++ b/opcodes/visium-dis.c
@@ -20,7 +20,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/visium.h"
#include <string.h>
diff --git a/opcodes/w65-dis.c b/opcodes/w65-dis.c
index 015b39b..fe43c20 100644
--- a/opcodes/w65-dis.c
+++ b/opcodes/w65-dis.c
@@ -25,7 +25,7 @@
#define DEFINE_TABLE
#include "w65-opc.h"
-#include "dis-asm.h"
+#include "disassemble.h"
static fprintf_ftype fpr;
static void *stream;
diff --git a/opcodes/wasm32-dis.c b/opcodes/wasm32-dis.c
index 179a440..1832654 100644
--- a/opcodes/wasm32-dis.c
+++ b/opcodes/wasm32-dis.c
@@ -19,7 +19,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opintl.h"
#include "safe-ctype.h"
#include "floatformat.h"
diff --git a/opcodes/xc16x-dis.c b/opcodes/xc16x-dis.c
index 6a6758d..1cbf119 100644
--- a/opcodes/xc16x-dis.c
+++ b/opcodes/xc16x-dis.c
@@ -28,7 +28,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
diff --git a/opcodes/xgate-dis.c b/opcodes/xgate-dis.c
index da9ab6c..f200a8b 100644
--- a/opcodes/xgate-dis.c
+++ b/opcodes/xgate-dis.c
@@ -21,7 +21,7 @@
#include "sysdep.h"
#include <assert.h>
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opintl.h"
#include "libiberty.h"
#include "ansidecl.h"
diff --git a/opcodes/xstormy16-dis.c b/opcodes/xstormy16-dis.c
index b54a698..0b7fdf3 100644
--- a/opcodes/xstormy16-dis.c
+++ b/opcodes/xstormy16-dis.c
@@ -28,7 +28,7 @@
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
diff --git a/opcodes/xtensa-dis.c b/opcodes/xtensa-dis.c
index 93e5d83..09dbca6 100644
--- a/opcodes/xtensa-dis.c
+++ b/opcodes/xtensa-dis.c
@@ -27,7 +27,7 @@
#include "xtensa-isa.h"
#include "ansidecl.h"
#include "libiberty.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include <setjmp.h>
diff --git a/opcodes/z80-dis.c b/opcodes/z80-dis.c
index fbaa4d1..4445f08 100644
--- a/opcodes/z80-dis.c
+++ b/opcodes/z80-dis.c
@@ -20,7 +20,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include <stdio.h>
struct buffer
diff --git a/opcodes/z8k-dis.c b/opcodes/z8k-dis.c
index 0288a51..19ebb6e 100644
--- a/opcodes/z8k-dis.c
+++ b/opcodes/z8k-dis.c
@@ -19,7 +19,7 @@
MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#define DEFINE_TABLE
#include "z8k-opc.h"
--
1.9.1
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH 0/6] Unify the disassembler selection in gdb and objdump
2017-05-16 10:49 [PATCH 0/6] Unify the disassembler selection in gdb and objdump Yao Qi
` (5 preceding siblings ...)
2017-05-16 10:49 ` [RFC 6/6] Move print_insn_XXX to an opcodes internal header Yao Qi
@ 2017-05-17 3:00 ` Alan Modra
2017-05-24 16:26 ` Yao Qi
2017-05-23 9:19 ` Pedro Alves
7 siblings, 1 reply; 15+ messages in thread
From: Alan Modra @ 2017-05-17 3:00 UTC (permalink / raw)
To: Yao Qi; +Cc: binutils, gdb-patches
On Tue, May 16, 2017 at 11:48:12AM +0100, Yao Qi wrote:
> Refactor disassembler selection
> Delegate opcodes to select disassembler in GDB
> Use disassble.c:disassembler select h8300 disassembler
> Use disassble.c:disassembler select rl78 disassembler
> Use disassble.c:disassembler select rs6000 disassembler
> Move print_insn_XXX to an opcodes internal header
The binutils part of these patches is approved.
--
Alan Modra
Australia Development Lab, IBM
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH 0/6] Unify the disassembler selection in gdb and objdump
2017-05-16 10:49 [PATCH 0/6] Unify the disassembler selection in gdb and objdump Yao Qi
` (6 preceding siblings ...)
2017-05-17 3:00 ` [PATCH 0/6] Unify the disassembler selection in gdb and objdump Alan Modra
@ 2017-05-23 9:19 ` Pedro Alves
7 siblings, 0 replies; 15+ messages in thread
From: Pedro Alves @ 2017-05-23 9:19 UTC (permalink / raw)
To: Yao Qi, binutils, gdb-patches
On 05/16/2017 11:48 AM, Yao Qi wrote:
> Nowadays, we have opcodes library which provides disassembler for each
> architecture (print_insn_XX functions), and gdb, objdump and sim use
> them. However, they (at least gdb and objdump) select disassembler
> in different places, so this causes some duplicated code and
> inconsistencies.
>
> This patch series change gdb selecting disassembler through
> opcodes/disassemble.c:disassembler in default, but there are still
> some targets select their disassemblers in their own way (AFAICS,
> they can be changed to disassemble.c:disassembler too in the
> follow up patches).
>
> Patch #1 refactor the code. Patch #2 does the major change in this
> series, but only apply to the obvious places. Patch #3-4 do the
> similar changes too, but not as obvious as patch #2. Patch #5
> fixes the inconsistency of rs6000 disassembler selection. As a
> result of these changes, a lot of print_insn_XXX functions are no
> longer needed out side of opcodes library, so patch #6, as an RFC,
> moves these function declarations from include/dis-asm.h to an
> internal header in opcodes/.
>
> If this series is on the right track, I'll change the rest of gdb
> ports (like arm, mips, aarch64, etc) to default disassembler
> selection.
I like this.
Eliminating objdump / gdb inconsistencies by design is great.
Passing arch/mach to opcodes:disassembler makes it possible to
have gdb tell opcodes to select the right disassembler based on
what arch the remote target description says the target has, even
without a bfd.
The GDB parts look good to me.
>
> The series is tested for gdb on x86_64-linux and ppc64-linux (gcc110).
Good testing. I was wondering whether the POWER/gdb change had any
visible effect on the testsuite.
[OTOH, if it didn't, then it sounds like we're missing some kind of
test that exercises default disassembler selection].
> It is also tested for binutils/ld/gas on x86_64-linux with all targets
> enabled.
Thanks,
Pedro Alves
^ permalink raw reply [flat|nested] 15+ messages in thread