From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 126186 invoked by alias); 5 Sep 2017 18:53:07 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 125317 invoked by uid 89); 5 Sep 2017 18:53:06 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: smtp.polymtl.ca Received: from smtp.polymtl.ca (HELO smtp.polymtl.ca) (132.207.4.11) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 05 Sep 2017 18:53:01 +0000 Received: from simark.ca (simark.ca [158.69.221.121]) (authenticated bits=0) by smtp.polymtl.ca (8.14.7/8.14.7) with ESMTP id v85IqsxG029185 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 5 Sep 2017 14:52:59 -0400 Received: by simark.ca (Postfix, from userid 112) id BC7621EA2E; Tue, 5 Sep 2017 14:52:54 -0400 (EDT) Received: from simark.ca (localhost [127.0.0.1]) by simark.ca (Postfix) with ESMTP id BF0AF1E984; Tue, 5 Sep 2017 14:52:53 -0400 (EDT) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Tue, 05 Sep 2017 18:53:00 -0000 From: Simon Marchi To: Stafford Horne Cc: GDB patches , Openrisc , Mike Frysinger Subject: Re: [PATCH v4 3/5] sim: or1k: add or1k target to sim In-Reply-To: <20170904214854.GN2609@lianli.shorne-pla.net> References: <617acff0490f4ae9ffcf961fb55b2ef1@polymtl.ca> <20170904214854.GN2609@lianli.shorne-pla.net> Message-ID: <1735cd0e32315069945129777d92710f@polymtl.ca> X-Sender: simon.marchi@polymtl.ca User-Agent: Roundcube Webmail/1.3.0 X-Poly-FromMTA: (simark.ca [158.69.221.121]) at Tue, 5 Sep 2017 18:52:54 +0000 X-IsSubscribed: yes X-SW-Source: 2017-09/txt/msg00123.txt.bz2 On 2017-09-04 23:48, Stafford Horne wrote: > This is here to configure the UPR[UP] (UPR is present flag) to 1, even > in > case we didnt set it above when we do: > > SET_H_SYS_UPR (or1k_upr); > > The call to SET_H_SYS_UPR() sets all of the flags in the UPR as sent in > from the user arguments. If they didn't set UPR[UP] we make sure it > gets > set. Oh ok for some reason I though that CHECK_SPR_FIELD was throwing an error when a check failed, but actually it just prints a warning. That's why I thought that the UP bit would necessarily already be set at this point. Sorry about that. Simon