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Content-Language: en-US To: John Baldwin , binutils@sourceware.org, gdb-patches@sourceware.org References: <20220323210048.25525-1-jhb@FreeBSD.org> <20220323210048.25525-5-jhb@FreeBSD.org> <31fefe5b-4fe5-3e3b-5eeb-b1328c584916@arm.com> From: Luis Machado In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: LO2P123CA0086.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:138::19) To VI1PR08MB3919.eurprd08.prod.outlook.com (2603:10a6:803:c4::31) MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 7d0fb74a-1e76-4055-cc8d-08da1e00e409 X-MS-TrafficTypeDiagnostic: DB9PR08MB7471:EE_|AM5EUR03FT006:EE_|AM6PR08MB4069:EE_ X-Microsoft-Antispam-PRVS: x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: +vrTcdtUkjLgzzO0cp7rbPIkIPFhtbzosJpnfDw9qAxl9sUYII6iCRfzda8zn388RLWyoOzZ2f8tCzKsH7cbKgwEdNVXMSolr9VXq5k5ZBiVpsDLwVrc7XjDA+M4WB/amS7OfK+QF7Vof/0QFTJshy4Z18QHUlwVyMLSkNJcB3ti4dfRLsBreVD+aW6H6mYy8zjkk8XAZxVFbvKLWSZws/W1SM4BzbV2yBa0JpkJK7mv0cVtK2VxWIqi5SO1q49ywvaqwW5+7lxUoRtqVlGmGZ5Ml2yqXXsHchLZn1ecv9f5rDXYMGltZk8WeHweuwTFoYhtoM0nwW52QJK26NvpW2oOSyOFG4+T0T8Jzl7bw6aYmbOxNHW6L4ssr3BQ+vQVM+yfswNVNFJDnJ05DhQv9LxsrGTioqk6j5eU/EWoyp86HoPHKMNG2nQhy5aCjoGzkincKi+SHbmvyJTpdSM9CoOpUSyoL4fMMZ9dOHQpcr+QUZZl/UKzhb650ZsYlP0t2ZLX+MTYfGK+hDFbkgfQKO4eSthGmPF+6lppPMEEJxGGa/S/Nn3FntOJFg9/1xJnM1l7E5aEqukSKarhBfodj4D3EX70zWuXC1g0CzCpJukA8fLcroe2el3w2dNb35wtJNbOxxqWPx6Mq3p8k0QGrd3E3FxVEXQmoCuYOmv+X2ktz3mvxo2b/CnNrsMecQzl5hOu8AloyDm2UdOAVZfFg+Ps/mOqkT/TMh5XgV/Zgng= X-Forefront-Antispam-Report-Untrusted: CIP:255.255.255.255; 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>>>      tdesc_create_feature (tdesc.get (), "org.gnu.gdb.arm.neon"); >>> +  regnum = create_feature_arm_arm_tls (tdesc.get (), regnum); >>>      return tdesc.release (); >>>    } >>> diff --git a/gdb/arch/arm.c b/gdb/arch/arm.c >>> index 126e46a950a..15b600e22f4 100644 >>> --- a/gdb/arch/arm.c >>> +++ b/gdb/arch/arm.c >>> @@ -22,6 +22,7 @@ >>>    #include "arm.h" >>>    #include "../features/arm/arm-core.c" >>> +#include "../features/arm/arm-tls.c" >>>    #include "../features/arm/arm-vfpv2.c" >>>    #include "../features/arm/arm-vfpv3.c" >>>    #include "../features/arm/xscale-iwmmxt.c" >>> @@ -373,7 +374,7 @@ shifted_reg_val (struct regcache *regcache, >>> unsigned long inst, >>>    /* See arch/arm.h.  */ >>>    target_desc * >>> -arm_create_target_description (arm_fp_type fp_type) >>> +arm_create_target_description (arm_fp_type fp_type, bool tls) >>>    { >>>      target_desc_up tdesc = allocate_target_description (); >>> @@ -409,6 +410,9 @@ arm_create_target_description (arm_fp_type fp_type) >>>          error (_("Invalid Arm FP type: %d"), fp_type); >>>        } >>> +  if (tls) >>> +    regnum = create_feature_arm_arm_tls (tdesc.get (), regnum); >>> + >>>      return tdesc.release (); >>>    } >>> diff --git a/gdb/arch/arm.h b/gdb/arch/arm.h >>> index f75470e7572..32f29b20d33 100644 >>> --- a/gdb/arch/arm.h >>> +++ b/gdb/arch/arm.h >>> @@ -49,6 +49,7 @@ enum gdb_regnum { >>>      ARM_D0_REGNUM,        /* VFP double-precision registers.  */ >>>      ARM_D31_REGNUM = ARM_D0_REGNUM + 31, >>>      ARM_FPSCR_REGNUM, >>> +  ARM_TPIDRURO_REGNUM, >>>      /* Other useful registers.  */ >>>      ARM_FP_REGNUM = 11,        /* Frame register in ARM code, if >>> used.  */ >>> @@ -65,8 +66,8 @@ enum arm_register_counts { >>>      ARM_NUM_ARG_REGS = 4, >>>      /* Number of floating point argument registers.  */ >>>      ARM_NUM_FP_ARG_REGS = 4, >>> -  /* Number of registers (old, defined as ARM_FPSCR_REGNUM + 1.  */ >>> -  ARM_NUM_REGS = ARM_FPSCR_REGNUM + 1 >>> +  /* Number of registers (old, defined as ARM_TPIDRURO_REGNUM + 1.  */ >>> +  ARM_NUM_REGS = ARM_TPIDRURO_REGNUM + 1 >>>    }; >> >> I'm attempting to move away from these hardcoded register numbers. If >> there are optional features, that means ARM_NUM_REGS won't reflect the >> reality anymore, and there may be holes in the register numbering. >> >> For example, a bare metal target may not have ARM_TPIDRURO_REGNUM. The >> correct way is to account for it dynamically, similar to what we do with >> MVE (and to what we do for pauth, MTE and your TLS handling). > > Note that these constants aren't required for the remote protocol > however as > GDB's remote target figures out its own mapping between remote register > numbers and the internal numbers used in target descriptions.  Having fixed > values means one can use constant register_map_entry structures that can > be reused (e.g. I often reuse the structures from -fbsd-tdep.c files > in the -fbsd-nat.c file to handle a register set in a native target). > > Other arches work fine with holes in the register number space (e.g. > x86 uses fixed constants for various optional register sets like the > different sets of vector registers). > Indeed. It is true that these holes have no negative impact other than "maint print registers" showing empty entries and the number of registers being slightly misleading. The register_map_entry structures work nicely, but they don't provide a good way to track pseudo registers alongside the real feature registers. Having more clear boundaries between each feature and the registers and pseudo-registers in them looks cleaner to me. Some time ago I disentangled the handling of pseudo registers for 32-bit arm, as it started to get a bit chaotic. Most of the feature handling tends to happen in generic arm-tdep, so that only needs to change once. Unfortunately the linux and fbsd layers for 32-bit arm work in slightly different ways. Ideally they would share more code and we'd unify some register handling. But we're not there yet.