From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 13278 invoked by alias); 5 Mar 2010 07:29:06 -0000 Received: (qmail 13270 invoked by uid 22791); 5 Mar 2010 07:29:05 -0000 X-SWARE-Spam-Status: No, hits=-2.5 required=5.0 tests=AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from sibelius.xs4all.nl (HELO glazunov.sibelius.xs4all.nl) (83.163.83.176) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 05 Mar 2010 07:29:01 +0000 Received: from glazunov.sibelius.xs4all.nl (kettenis@localhost [127.0.0.1]) by glazunov.sibelius.xs4all.nl (8.14.3/8.14.3) with ESMTP id o257SvQt010938; Fri, 5 Mar 2010 08:28:57 +0100 (CET) Received: (from kettenis@localhost) by glazunov.sibelius.xs4all.nl (8.14.3/8.14.3/Submit) id o257Strd023831; Fri, 5 Mar 2010 08:28:55 +0100 (CET) Date: Fri, 05 Mar 2010 07:29:00 -0000 Message-Id: <201003050728.o257Strd023831@glazunov.sibelius.xs4all.nl> From: Mark Kettenis To: hjl.tools@gmail.com CC: hjl.tools@gmail.com, gdb-patches@sourceware.org In-reply-to: <6dc9ffc81003041806q5659ba84md02fbc75cd283e0d@mail.gmail.com> (hjl.tools@gmail.com) Subject: Re: PATCH: 1/6: Add AVX support References: <20100304180219.GA10826@intel.com> <20100304190934.GB15979@caradoc.them.org> <6dc9ffc81003041129i72a8a79bn66721fecc7b6a83b@mail.gmail.com> <20100304194645.GA20453@caradoc.them.org> <6dc9ffc81003041327m379c6903g571f4d66aac8d61a@mail.gmail.com> <20100304214723.GA2817@caradoc.them.org> <6dc9ffc81003041806q5659ba84md02fbc75cd283e0d@mail.gmail.com> Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2010-03/txt/msg00227.txt.bz2 > Date: Thu, 4 Mar 2010 18:06:11 -0800 > From: "H.J. Lu" > > On Thu, Mar 4, 2010 at 1:47 PM, Daniel Jacobowitz wrote: > > On Thu, Mar 04, 2010 at 01:27:09PM -0800, H.J. Lu wrote: > >> > No, it will fail to display SSE.  Core debugging should still be > >> > possible, and the newly added registers will be visible too.  If > >> > that's not the case, fix GDB to function with the SSE registers > >> > missing. > >> > >> Your description only works for truly NEW registers, which > >> AVX registers aren't.  AVX registers are actually the old SSE > >> registers with different names. > > > > I'm trying to get you to think about compatibility in the > > descriptions, instead of separately in the remote protocol. > > There are always ways to solve it.  For instance, you could present > > both the AVX registers and the hypothetical newer, larger registers as > > separate things.  As long as the P packet is implemented, which it is, > > GDB should work OK if modifying one register changes another. > > I don't know if there's an example of this in the GDB sources, but I > > have one in my tree; there's $sp, $sp_user, and $sp_system registers, > > and $sp is the same as one of the other two depending on processor > > mode.  But they're all visible. > > > > Another solution is to define new registers which correspond to the > > added bits, and have a sufficiently recent GDB synthesize the combined > > registers from the AVX registers and the new bits.  This, for > > instance, is how the Power E500 registers are handled > > (rs6000/power-spe.xml). > > > > OK, I will try SPE approach. It will take a while. Wait, please. I'll reply later when I have a bit more time, but I don't think this will be a good idea.