From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 14482 invoked by alias); 29 Jul 2010 22:00:42 -0000 Received: (qmail 14462 invoked by uid 22791); 29 Jul 2010 22:00:39 -0000 X-SWARE-Spam-Status: No, hits=-6.0 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_HI,SPF_HELO_PASS,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 29 Jul 2010 22:00:34 +0000 Received: from int-mx08.intmail.prod.int.phx2.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.21]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id o6TM0WQk008794 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 29 Jul 2010 18:00:32 -0400 Received: from greed.delorie.com ([10.3.112.10]) by int-mx08.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id o6TM0UWO031815 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 29 Jul 2010 18:00:31 -0400 Received: from greed.delorie.com (greed.delorie.com [127.0.0.1] (may be forged)) by greed.delorie.com (8.14.3/8.14.3) with ESMTP id o6TM0Uxp021761; Thu, 29 Jul 2010 18:00:30 -0400 Received: (from dj@localhost) by greed.delorie.com (8.14.3/8.14.3/Submit) id o6TM0TlC021758; Thu, 29 Jul 2010 18:00:29 -0400 Date: Thu, 29 Jul 2010 22:00:00 -0000 Message-Id: <201007292200.o6TM0TlC021758@greed.delorie.com> From: DJ Delorie To: Mike Frysinger CC: gdb-patches@sourceware.org, kevinb@redhat.com In-reply-to: <201007291741.50553.vapier@gentoo.org> (message from Mike Frysinger on Thu, 29 Jul 2010 17:41:49 -0400) Subject: Re: [rx sim] add decode cache References: <201007291841.o6TIfcgn017022@greed.delorie.com> <201007291523.07679.vapier@gentoo.org> <201007291933.o6TJXrRa018296@greed.delorie.com> <201007291741.50553.vapier@gentoo.org> X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2010-07/txt/msg00564.txt.bz2 > ok, so the cached info isnt as generic as i'd like ;). i wonder if > we could fit a cache in there somewhere though ... I don't think the decode is as cpu-intensive as the semantics, though. It seems to me there are a *lot* of loops in most software, so the more info you can re-use, the better. Actually, decoding a single opcode's syntax and semantics doesn't take that long, it's just that benchmarks tend to run *zillions* of opcodes, so even tiny savings add up. > doesnt seem like it's limited to CISC arches though ... in the > Blackfin decode/sim, we too have a big tree of if/switch/masks to > pull out arguments ive always been annoyed that we had to copy the > decode file, gut it, and then fill in the sim pieces to make it > work. seems like this opc2c might be a way back from that. There's no reason why it *wouldn't* work for RISC architectures, of course, I just never tried it, and don't know how optimal it would be with it. However, if you have a RISC case where an operand field isn't fully used, and certain operand patterns mean a whole different opcode, opc2c can help you there - it will only decode to a specific opcode if its operands are valid too, which is *really* hard to get right with simple mask tables. For the m32c, I used opc2c for the simulator, and cgen was used for everything else. For RX, opc2c was pushed to libopcodes, and it's used for the simulator, disassembler, *and* gdb. Nowhere else are RX opcodes decoded. Maybe Kevin can comment on how different it was to use opc2c's decoder for gdb's prolog analyzer? For the RX assembler, I used bison. The resulting file *looks* like an opc2c input file - syntax followed by semantics - but I didn't try to use the same input file for both purposes.