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* [commit/rx sim] Reset state associated with instruction decoder upon program load
@ 2010-09-24  7:54 Kevin Buettner
  0 siblings, 0 replies; only message in thread
From: Kevin Buettner @ 2010-09-24  7:54 UTC (permalink / raw)
  To: gdb-patches

I've committed the patch below.

Whilst running the GDB test suite, I found a number of instances where
the sim would stop with a SIGILL or SIGTRAP due to the instruction
decoder's state not being reset.  (I can explain in more detail
what is going on if desired...)

There may still be a lurking bug here as it is not clear to me what
happens if the program's start address resides on the zero page.

With this patch in place, I see no failures while running
gdb.base/break.exp.  (Running the rest of the test suite has
turned up some other problems though...)

Kevin

	* cpu.h (reset_decoder): Declare.
	* load.c (rx_load): Call `reset_decoder'.
	* rx.c (reset_decoder): New function.

Index: cpu.h
===================================================================
RCS file: /cvs/src/src/sim/rx/cpu.h,v
retrieving revision 1.4
diff -u -p -r1.4 cpu.h
--- cpu.h	29 Jul 2010 18:41:28 -0000	1.4
+++ cpu.h	23 Sep 2010 23:39:57 -0000
@@ -235,6 +235,7 @@ extern unsigned int heaptop;
 extern unsigned int heapbottom;
 
 extern int decode_opcode (void);
+extern void reset_decoder (void);
 extern void reset_pipeline_stats (void);
 extern void halt_pipeline_stats (void);
 extern void pipeline_stats (void);
Index: load.c
===================================================================
RCS file: /cvs/src/src/sim/rx/load.c,v
retrieving revision 1.3
diff -u -p -r1.3 load.c
--- load.c	23 Sep 2010 23:05:28 -0000	1.3
+++ load.c	23 Sep 2010 23:39:57 -0000
@@ -142,6 +142,8 @@ rx_load (bfd *prog)
       heaptop = heapbottom = 0;
     }
 
+  reset_decoder ();
+
   if (verbose > 1)
     fprintf (stderr, "[start pc=%08x %s]\n",
 	     (unsigned int) regs.r_pc,
Index: rx.c
===================================================================
RCS file: /cvs/src/src/sim/rx/rx.c,v
retrieving revision 1.7
diff -u -p -r1.7 rx.c
--- rx.c	23 Sep 2010 23:26:42 -0000	1.7
+++ rx.c	23 Sep 2010 23:39:57 -0000
@@ -298,6 +298,14 @@ static unsigned char *get_byte_base;
 static RX_Opcode_Decoded **decode_cache_base;
 static SI get_byte_page;
 
+void
+reset_decoder (void)
+{
+  get_byte_base = 0;
+  decode_cache_base = 0;
+  get_byte_page = 0;
+}
+
 static inline void
 maybe_get_mem_page (SI tpc)
 {

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2010-09-24  7:54 [commit/rx sim] Reset state associated with instruction decoder upon program load Kevin Buettner

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