* [PATCH V7 5/8] Add MPX support to gdbserver.
2013-10-09 12:01 [PATCH V7 0/8] Intel(R) MPX register support Walfred Tedeschi
2013-10-09 12:01 ` [PATCH V7 8/8] Add MPX feature description to GDB manual Walfred Tedeschi
@ 2013-10-09 12:01 ` Walfred Tedeschi
2013-11-19 15:14 ` Pedro Alves
2013-10-09 12:01 ` [PATCH V7 3/8] Add MPX support for i386 Walfred Tedeschi
` (6 subsequent siblings)
8 siblings, 1 reply; 23+ messages in thread
From: Walfred Tedeschi @ 2013-10-09 12:01 UTC (permalink / raw)
To: tromey, mark.kettenis; +Cc: gdb-patches, Walfred Tedeschi
2013-05-22 Walfred Tedeschi <walfred.tedeschi@intel.com>
gdbserver/
* Makefile.in: Add i386-mpx.c, i386-mpx-linux.c, amd64-mpx.c,
amd64-mpx-linux.c, x32-mpx.c and x32-mpx-linux.c generation.
* configure.srv (srv_i386_regobj): Add i386-mpx.o.
(srv_i386_linux_regobj): Add i386-mpx-linux.o.
(srv_amd64_regobj): Add amd64-mpx.o.
(srv_amd64_linux_regobj): Add amd64-mpx-linux.o.
(srv_i386_32bit_xmlfiles): Add i386/32bit-mpx.xml.
(srv_i386_64bit_xmlfiles): Add i386/64bit-mpx.xml.
* i387-fp.c (num_pl_bnd_register) Added constant.
(num_pl_bnd_cfg_registers) Added constant.
(struct i387_xsave) Added reserved area and MPX fields.
(i387_cache_to_xsave, i387_xsave_to_cache) Add MPX.
* linux-x86-low.c (init_registers_i386_mpx_linux): Declare new
function.
(tdesc_i386_mpx_linux): Add MPX amd64 target.
(init_registers_amd64_mpx_linux): Declare new function.
(tdesc_amd64_mpx_linux): Add MPX amd64 target.
(init_registers_x32_mpx_linux): Declare new function.
(tdesc_x32_mpx_linux): Add MPX amd64 target.
(x86_64_regmap): Add MPX registers.
(x86_linux_read_description): Add MPX case.
(initialize_low_arch): Initialize MPX targets.
---
gdb/gdbserver/Makefile.in | 15 +++++++
gdb/gdbserver/configure.srv | 20 ++++-----
gdb/gdbserver/i387-fp.c | 90 +++++++++++++++++++++++++++++++++++++++++
gdb/gdbserver/linux-x86-low.c | 87 +++++++++++++++++++++++++++++++--------
4 files changed, 186 insertions(+), 26 deletions(-)
diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
index e42c67f..81d223c 100644
--- a/gdb/gdbserver/Makefile.in
+++ b/gdb/gdbserver/Makefile.in
@@ -342,10 +342,13 @@ clean:
rm -f tic6x-c64xp-linux.c tic6x-c64x-linux.c tic6x-c62x-linux.c
rm -f xml-builtin.c stamp-xml
rm -f i386-avx.c i386-avx-linux.c
+ rm -f i386-mpx.c i386-mpx-linux.c
rm -f amd64-avx.c amd64-avx-linux.c
+ rm -f amd64-mpx.c amd64-mpx-linux.c
rm -f i386-mmx.c i386-mmx-linux.c
rm -f x32.c x32-linux.c
rm -f x32-avx.c x32-avx-linux.c
+ rm -f x32-mpx.c x32-mpx-linux.c
@$(MAKE) $(FLAGS_TO_PASS) DO=$@ "DODIRS=$(SUBDIRS)" subdir_do
maintainer-clean realclean distclean: clean
@@ -568,6 +571,10 @@ i386-avx.c : $(srcdir)/../regformats/i386/i386-avx.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/i386-avx.dat i386-avx.c
i386-avx-linux.c : $(srcdir)/../regformats/i386/i386-avx-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/i386-avx-linux.dat i386-avx-linux.c
+i386-mpx.c : $(srcdir)/../regformats/i386/i386-mpx.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/i386-mpx.dat i386-mpx.c
+i386-mpx-linux.c : $(srcdir)/../regformats/i386/i386-mpx-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/i386-mpx-linux.dat i386-mpx-linux.c
i386-mmx.c : $(srcdir)/../regformats/i386/i386-mmx.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/i386-mmx.dat i386-mmx.c
i386-mmx-linux.c : $(srcdir)/../regformats/i386/i386-mmx-linux.dat $(regdat_sh)
@@ -664,8 +671,12 @@ amd64-linux.c : $(srcdir)/../regformats/i386/amd64-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/amd64-linux.dat amd64-linux.c
amd64-avx.c : $(srcdir)/../regformats/i386/amd64-avx.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/amd64-avx.dat amd64-avx.c
+amd64-mpx.c : $(srcdir)/../regformats/i386/amd64-mpx.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/amd64-mpx.dat amd64-mpx.c
amd64-avx-linux.c : $(srcdir)/../regformats/i386/amd64-avx-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/amd64-avx-linux.dat amd64-avx-linux.c
+amd64-mpx-linux.c : $(srcdir)/../regformats/i386/amd64-mpx-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/amd64-mpx-linux.dat amd64-mpx-linux.c
x32.c : $(srcdir)/../regformats/i386/x32.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/x32.dat x32.c
x32-linux.c : $(srcdir)/../regformats/i386/x32-linux.dat $(regdat_sh)
@@ -674,6 +685,10 @@ x32-avx.c : $(srcdir)/../regformats/i386/x32-avx.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/x32-avx.dat x32-avx.c
x32-avx-linux.c : $(srcdir)/../regformats/i386/x32-avx-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/x32-avx-linux.dat x32-avx-linux.c
+x32-mpx.c : $(srcdir)/../regformats/i386/x32-mpx.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/x32-mpx.dat x32-mpx.c
+x32-mpx-linux.c : $(srcdir)/../regformats/i386/x32-mpx-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/x32-mpx-linux.dat x32-mpx-linux.c
reg-xtensa.c : $(srcdir)/../regformats/reg-xtensa.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-xtensa.dat reg-xtensa.c
reg-tilegx.c : $(srcdir)/../regformats/reg-tilegx.dat $(regdat_sh)
diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
index f65dd10..276452e 100644
--- a/gdb/gdbserver/configure.srv
+++ b/gdb/gdbserver/configure.srv
@@ -24,20 +24,20 @@
# Default hostio_last_error implementation
srv_hostio_err_objs="hostio-errno.o"
-srv_i386_regobj="i386.o i386-avx.o i386-mmx.o"
-srv_i386_linux_regobj="i386-linux.o i386-avx-linux.o i386-mmx-linux.o"
-srv_amd64_regobj="amd64.o amd64-avx.o x32.o x32-avx.o"
-srv_amd64_linux_regobj="amd64-linux.o amd64-avx-linux.o x32-linux.o x32-avx-linux.o"
+srv_i386_regobj="i386.o i386-avx.o i386-mpx.o i386-mmx.o"
+srv_i386_linux_regobj="i386-linux.o i386-avx-linux.o i386-mpx-linux.o i386-mmx-linux.o"
+srv_amd64_regobj="amd64.o amd64-avx.o amd64-mpx.o x32.o x32-avx.o x32-mpx.o"
+srv_amd64_linux_regobj="amd64-linux.o amd64-avx-linux.o amd64-mpx-linux.o x32-linux.o x32-avx-linux.o x32-mpx-linux.o"
ipa_i386_linux_regobj=i386-linux-ipa.o
ipa_amd64_linux_regobj=amd64-linux-ipa.o
-srv_i386_32bit_xmlfiles="i386/32bit-core.xml i386/32bit-sse.xml i386/32bit-avx.xml"
-srv_i386_64bit_xmlfiles="i386/64bit-core.xml i386/64bit-sse.xml i386/64bit-avx.xml i386/x32-core.xml"
-srv_i386_xmlfiles="i386/i386.xml i386/i386-avx.xml i386/i386-mmx.xml $srv_i386_32bit_xmlfiles"
-srv_amd64_xmlfiles="i386/amd64.xml i386/amd64-avx.xml i386/x32.xml i386/x32-avx.xml $srv_i386_64bit_xmlfiles"
-srv_i386_linux_xmlfiles="i386/i386-linux.xml i386/i386-avx-linux.xml i386/i386-mmx-linux.xml i386/32bit-linux.xml $srv_i386_32bit_xmlfiles"
-srv_amd64_linux_xmlfiles="i386/amd64-linux.xml i386/amd64-avx-linux.xml i386/64bit-linux.xml i386/x32-linux.xml i386/x32-avx-linux.xml $srv_i386_64bit_xmlfiles"
+srv_i386_32bit_xmlfiles="i386/32bit-core.xml i386/32bit-sse.xml i386/32bit-avx.xml i386/32bit-mpx.xml"
+srv_i386_64bit_xmlfiles="i386/64bit-core.xml i386/64bit-sse.xml i386/64bit-avx.xml i386/x32-core.xml i386/64bit-mpx.xml"
+srv_i386_xmlfiles="i386/i386.xml i386/i386-avx.xml i386/i386-mpx.xml i386/i386-mmx.xml $srv_i386_32bit_xmlfiles"
+srv_amd64_xmlfiles="i386/amd64.xml i386/amd64-avx.xml i386/x32.xml i386/x32-avx.xml i386/amd64-mpx.xml $srv_i386_64bit_xmlfiles"
+srv_i386_linux_xmlfiles="i386/i386-linux.xml i386/i386-avx-linux.xml i386/i386-mmx-linux.xml i386/32bit-linux.xml i386/i386-mpx-linux.xml $srv_i386_32bit_xmlfiles"
+srv_amd64_linux_xmlfiles="i386/amd64-linux.xml i386/amd64-avx-linux.xml i386/64bit-linux.xml i386/amd64-mpx-linux.xml i386/x32-linux.xml i386/x32-avx-linux.xml i386/x32-mpx-linux.xml $srv_i386_64bit_xmlfiles"
# Linux object files. This is so we don't have to repeat
diff --git a/gdb/gdbserver/i387-fp.c b/gdb/gdbserver/i387-fp.c
index 2886519..1240b67 100644
--- a/gdb/gdbserver/i387-fp.c
+++ b/gdb/gdbserver/i387-fp.c
@@ -20,6 +20,9 @@
#include "i387-fp.h"
#include "i386-xstate.h"
+static const int num_mpx_bnd_registers = 4;
+static const int num_mpx_cfg_registers = 2;
+
/* Note: These functions preserve the reserved bits in control registers.
However, gdbserver promptly throws away that information. */
@@ -108,6 +111,15 @@ struct i387_xsave {
/* Space for eight upper 128-bit YMM values, or 16 on x86-64. */
unsigned char ymmh_space[256];
+
+ unsigned char reserved4[128];
+
+ /* Space for 4 bound registers values of 128 bits. */
+ unsigned char mpx_bnd_space[64];
+
+ /* Space for 2 MPX configuration registers of 64 bits
+ plus reserved space. */
+ unsigned char mpx_cfg_space[16];
};
void
@@ -271,6 +283,14 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
if ((clear_bv & I386_XSTATE_AVX))
for (i = 0; i < num_xmm_registers; i++)
memset (((char *) &fp->ymmh_space[0]) + i * 16, 0, 16);
+
+ if ((clear_bv & I386_XSTATE_BNDREGS))
+ for (i = 0; i < num_mpx_bnd_registers; i++)
+ memset (((char *) &fp->mpx_bnd_space[0]) + i * 16, 0, 16);
+
+ if ((clear_bv & I386_XSTATE_BNDCFG))
+ for (i = 0; i < num_mpx_cfg_registers; i++)
+ memset (((char *) &fp->mpx_cfg_space[0]) + i * 8, 0, 8);
}
/* Check if any x87 registers are changed. */
@@ -324,6 +344,40 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
}
}
+ /* Check if any bound register has changed. */
+ if ((x86_xcr0 & I386_XSTATE_BNDREGS))
+ {
+ int bnd0r_regnum = find_regno (regcache->tdesc, "bnd0raw");
+
+ for (i = 0; i < num_mpx_bnd_registers; i++)
+ {
+ collect_register (regcache, i + bnd0r_regnum, raw);
+ p = ((char *) &fp->mpx_bnd_space[0]) + i * 16;
+ if (memcmp (raw, p, 16))
+ {
+ xstate_bv |= I386_XSTATE_BNDREGS;
+ memcpy (p, raw, 16);
+ }
+ }
+ }
+
+ /* Check if any status register has changed. */
+ if ((x86_xcr0 & I386_XSTATE_BNDCFG))
+ {
+ int bndcfg_regnum = find_regno (regcache->tdesc, "bndcfgu");
+
+ for (i = 0; i < num_mpx_cfg_registers; i++)
+ {
+ collect_register (regcache, i + bndcfg_regnum, raw);
+ p = ((char *) &fp->mpx_cfg_space[0]) + i * 8;
+ if (memcmp (raw, p, 8))
+ {
+ xstate_bv |= I386_XSTATE_BNDCFG;
+ memcpy (p, raw, 8);
+ }
+ }
+ }
+
/* Update the corresponding bits in xstate_bv if any SSE/AVX
registers are changed. */
fp->xstate_bv |= xstate_bv;
@@ -531,6 +585,42 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
}
}
+ if ((x86_xcr0 & I386_XSTATE_BNDREGS))
+ {
+ int bnd0r_regnum = find_regno (regcache->tdesc, "bnd0raw");
+
+
+ if ((clear_bv & I386_XSTATE_BNDREGS) != 0)
+ {
+ for (i = 0; i < num_mpx_bnd_registers; i++)
+ supply_register_zeroed (regcache, i + bnd0r_regnum);
+ }
+ else
+ {
+ p = (gdb_byte *) &fp->mpx_bnd_space[0];
+ for (i = 0; i < num_mpx_bnd_registers; i++)
+ supply_register (regcache, i + bnd0r_regnum, p + i * 16);
+ }
+
+ }
+
+ if ((x86_xcr0 & I386_XSTATE_BNDCFG))
+ {
+ int bndcfg_regnum = find_regno (regcache->tdesc, "bndcfgu");
+
+ if ((clear_bv & I386_XSTATE_BNDCFG) != 0)
+ {
+ for (i = 0; i < num_mpx_cfg_registers; i++)
+ supply_register_zeroed (regcache, i + bndcfg_regnum);
+ }
+ else
+ {
+ p = (gdb_byte *) &fp->mpx_cfg_space[0];
+ for (i = 0; i < num_mpx_cfg_registers; i++)
+ supply_register (regcache, i + bndcfg_regnum, p + i * 8);
+ }
+ }
+
supply_register_by_name (regcache, "fioff", &fp->fioff);
supply_register_by_name (regcache, "fooff", &fp->fooff);
supply_register_by_name (regcache, "mxcsr", &fp->mxcsr);
diff --git a/gdb/gdbserver/linux-x86-low.c b/gdb/gdbserver/linux-x86-low.c
index cf61872..8c2bfc9 100644
--- a/gdb/gdbserver/linux-x86-low.c
+++ b/gdb/gdbserver/linux-x86-low.c
@@ -43,6 +43,10 @@ extern const struct target_desc *tdesc_amd64_linux;
void init_registers_amd64_avx_linux (void);
extern const struct target_desc *tdesc_amd64_avx_linux;
+/* Defined in auto-generated file amd64-mpx-linux.c. */
+void init_registers_amd64_mpx_linux (void);
+extern const struct target_desc *tdesc_amd64_mpx_linux;
+
/* Defined in auto-generated file x32-linux.c. */
void init_registers_x32_linux (void);
extern const struct target_desc *tdesc_x32_linux;
@@ -50,6 +54,11 @@ extern const struct target_desc *tdesc_x32_linux;
/* Defined in auto-generated file x32-avx-linux.c. */
void init_registers_x32_avx_linux (void);
extern const struct target_desc *tdesc_x32_avx_linux;
+
+/* Defined in auto-generated file x32-mpx-linux.c. */
+void init_registers_x32_mpx_linux (void);
+extern const struct target_desc *tdesc_x32_mpx_linux;
+
#endif
/* Defined in auto-generated file i386-linux.c. */
@@ -64,6 +73,10 @@ extern const struct target_desc *tdesc_i386_mmx_linux;
void init_registers_i386_avx_linux (void);
extern const struct target_desc *tdesc_i386_avx_linux;
+/* Defined in auto-generated file i386-mpx-linux.c. */
+void init_registers_i386_mpx_linux (void);
+extern const struct target_desc *tdesc_i386_mpx_linux;
+
#ifdef __x86_64__
static struct target_desc *tdesc_amd64_linux_no_xml;
#endif
@@ -163,8 +176,11 @@ static const int x86_64_regmap[] =
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
- -1, -1, -1, -1, -1, -1, -1, -1, -1,
- ORIG_RAX * 8
+ -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ ORIG_RAX * 8,
+ -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
+ -1, -1 /* MPX registers BNDCFGU, BNDSTATUS. */
};
#define X86_64_NUM_REGS (sizeof (x86_64_regmap) / sizeof (x86_64_regmap[0]))
@@ -1233,7 +1249,7 @@ x86_linux_read_description (void)
{
unsigned int machine;
int is_elf64;
- int avx;
+ int xcr0_features;
int tid;
static uint64_t xcr0;
struct regset_info *regset;
@@ -1312,36 +1328,71 @@ x86_linux_read_description (void)
}
/* Check the native XCR0 only if PTRACE_GETREGSET is available. */
- avx = (have_ptrace_getregset
- && (xcr0 & I386_XSTATE_AVX_MASK) == I386_XSTATE_AVX_MASK);
+ xcr0_features = (have_ptrace_getregset
+ && (xcr0 & I386_XSTATE_ALL_MASK));
- /* AVX is the highest feature we support. */
- if (avx)
+ if (xcr0_features)
x86_xcr0 = xcr0;
if (machine == EM_X86_64)
{
#ifdef __x86_64__
- if (avx)
+ if (is_elf64)
{
- if (!is_elf64)
- return tdesc_x32_avx_linux;
+ if (xcr0_features)
+ {
+ switch (xcr0 & I386_XSTATE_ALL_MASK)
+ {
+ case I386_XSTATE_MPX_MASK:
+ return tdesc_amd64_mpx_linux;
+
+ case I386_XSTATE_AVX_MASK:
+ return tdesc_amd64_avx_linux;
+
+ default:
+ return tdesc_amd64_linux;
+ }
+ }
else
- return tdesc_amd64_avx_linux;
+ return tdesc_amd64_linux;
}
else
{
- if (!is_elf64)
- return tdesc_x32_linux;
+ if (xcr0_features)
+ {
+ switch (xcr0 & I386_XSTATE_ALL_MASK)
+ {
+ case I386_XSTATE_MPX_MASK:
+ return tdesc_x32_mpx_linux;
+
+ case I386_XSTATE_AVX_MASK:
+ return tdesc_x32_avx_linux;
+
+ default:
+ return tdesc_x32_linux;
+ }
+ }
else
- return tdesc_amd64_linux;
+ return tdesc_x32_linux;
}
#endif
}
else
{
- if (avx)
- return tdesc_i386_avx_linux;
+ if (xcr0_features)
+ {
+ switch (xcr0 & I386_XSTATE_ALL_MASK)
+ {
+ case (I386_XSTATE_MPX_MASK):
+ return tdesc_i386_mpx_linux;
+
+ case (I386_XSTATE_AVX_MASK):
+ return tdesc_i386_avx_linux;
+
+ default:
+ return tdesc_i386_linux;
+ }
+ }
else
return tdesc_i386_linux;
}
@@ -3338,8 +3389,11 @@ initialize_low_arch (void)
#ifdef __x86_64__
init_registers_amd64_linux ();
init_registers_amd64_avx_linux ();
+ init_registers_amd64_mpx_linux ();
+
init_registers_x32_linux ();
init_registers_x32_avx_linux ();
+ init_registers_x32_mpx_linux ();
tdesc_amd64_linux_no_xml = xmalloc (sizeof (struct target_desc));
copy_target_description (tdesc_amd64_linux_no_xml, tdesc_amd64_linux);
@@ -3348,6 +3402,7 @@ initialize_low_arch (void)
init_registers_i386_linux ();
init_registers_i386_mmx_linux ();
init_registers_i386_avx_linux ();
+ init_registers_i386_mpx_linux ();
tdesc_i386_linux_no_xml = xmalloc (sizeof (struct target_desc));
copy_target_description (tdesc_i386_linux_no_xml, tdesc_i386_linux);
--
1.7.10.4
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH V7 3/8] Add MPX support for i386
2013-10-09 12:01 [PATCH V7 0/8] Intel(R) MPX register support Walfred Tedeschi
2013-10-09 12:01 ` [PATCH V7 8/8] Add MPX feature description to GDB manual Walfred Tedeschi
2013-10-09 12:01 ` [PATCH V7 5/8] Add MPX support to gdbserver Walfred Tedeschi
@ 2013-10-09 12:01 ` Walfred Tedeschi
2013-10-09 12:01 ` [PATCH V7 4/8] MPX for amd64 Walfred Tedeschi
` (5 subsequent siblings)
8 siblings, 0 replies; 23+ messages in thread
From: Walfred Tedeschi @ 2013-10-09 12:01 UTC (permalink / raw)
To: tromey, mark.kettenis; +Cc: gdb-patches, Walfred Tedeschi
2013-14-06 Walfred Tedeschi <walfred.tedeschi@intel.com>
* i386-linux-nat.c (GETXSTATEREGS_SUPPLIES): Add MPX
registers on the range of registers to be read from
xsave buffer.
(i386_linux_read_description): Add case for MPX.
* i386-linux-tdep.c: Include features/i386/i386-mpx-linux.c.
(i386_linux_gregset_reg_offset): Add MPX registers.
(i386_linux_core_read_description): Initialize also MPX.
(_initialize_i386_linux_tdep): Add mpx initialization.
* i386-tdep.h (gdbarch_tdep): Add fields bnd0r_regnum, bnd0_regnum,
mpx_register_names.
(i386_regnum): Add MPX registers.
(I386_MPX_NUM_REGS): New macro.
(i386_bnd_regnum_p): New function.
* i386-linux-tdep.h (I386_LINUX_NUM_REGS): Set
number of registers to be the number of BNDSTATUS.
(tdesc_i386_mpx_linux): Add description for MPX Linux registers.
* i386-tdep.c: Include features/i386/i386-mpx.c.
(i386_mpx_names): Add MPX register names array.
(i386_bnd_names): Add bnd pseudo register names array.
(i386_bndr_regnum_p): Lookup register numbers for bnd raw
registers.
(i386_bndr_regnum_p): Lookup register numbers for bnd raw registers.
(386_mpx_ctrl_regnum_p): Lookup register numbers for MPX control
registers.
(i386_bnd_type): New function.
(i386_pseudo_register_type): Use i386_bnd_type for bnd pseudo
register types.
(i386_pseudo_register_read_into_value): Add bnd case.
(i386_pseudo_register_write): Add bnd pseudo registers.
(i386_register_reggroup_p): Add MPX register to the group all.
(i386_validate_tdesc_p): Add MPX to the target description
validation.
(i386_pseudo_register_name): Add bnd pseudo registers.
(i386_gdbarch_init): Add MPX for architecture initialization.
(_initia_initialize_i386_tdep): Add mpx initialization.
* i387-tdep.c (xsave_mpx_offset): New vector for MPX offsets on
XSAVE buffer.
(XSAVE_MPX_ADDR): New macro.
(i387_supply_xsave): Add MPX case.
(i387_collect_xsave): Add MPX case.
* i387-tdep.h (I387_BND0R_REGNUM): New macro.
(I387_BNDCFGU_REGNUM): New macro.
(I387_NUM_MPX_REGS): New macro.
(I387_NUM_BND_REGS): New macro.
(I387_NUM_MPX_CTRL_REGS): New macro.
(I387_MPXEND_REGNUM): New macro.
* common/i386-xstate.h (I386_XSTATE_BNDREGS): New macro.
(I386_XSTATE_BNDCFG): Likewise.
(I386_XSTATE_MPX_MASK): Likewise.
(I386_XSTATE_ALL_MASK): New macro represents flags for all states.
(I386_XSTATE_BNDREGS_SIZE): New macro.
(I386_XSTATE_BNDCFG_SIZE): Likewise.
(I386_XSTATE_SIZE): Adapt for MPX.
(I386_XSTATE_MAX_SIZE): Likewise.
---
gdb/common/i386-xstate.h | 20 ++++-
gdb/i386-linux-nat.c | 17 +++-
gdb/i386-linux-tdep.c | 9 +-
gdb/i386-linux-tdep.h | 4 +-
gdb/i386-tdep.c | 219 ++++++++++++++++++++++++++++++++++++++++++++--
gdb/i386-tdep.h | 24 ++++-
gdb/i387-tdep.c | 130 ++++++++++++++++++++++++++-
gdb/i387-tdep.h | 9 ++
8 files changed, 409 insertions(+), 23 deletions(-)
diff --git a/gdb/common/i386-xstate.h b/gdb/common/i386-xstate.h
index ed0a683..e76ecc1 100644
--- a/gdb/common/i386-xstate.h
+++ b/gdb/common/i386-xstate.h
@@ -24,19 +24,31 @@
#define I386_XSTATE_X87 (1ULL << 0)
#define I386_XSTATE_SSE (1ULL << 1)
#define I386_XSTATE_AVX (1ULL << 2)
+#define I386_XSTATE_BNDREGS (1ULL << 3)
+#define I386_XSTATE_BNDCFG (1ULL << 4)
/* Supported mask and size of the extended state. */
#define I386_XSTATE_X87_MASK I386_XSTATE_X87
#define I386_XSTATE_SSE_MASK (I386_XSTATE_X87 | I386_XSTATE_SSE)
#define I386_XSTATE_AVX_MASK (I386_XSTATE_SSE_MASK | I386_XSTATE_AVX)
+#define I386_XSTATE_MPX_MASK (I386_XSTATE_AVX_MASK \
+ | I386_XSTATE_BNDREGS \
+ | I386_XSTATE_BNDCFG)
+
+#define I386_XSTATE_ALL_MASK I386_XSTATE_MPX_MASK
#define I386_XSTATE_SSE_SIZE 576
#define I386_XSTATE_AVX_SIZE 832
-#define I386_XSTATE_MAX_SIZE 832
+#define I386_XSTATE_BNDREGS_SIZE 1024
+#define I386_XSTATE_BNDCFG_SIZE 1088
+
+#define I386_XSTATE_MAX_SIZE 1088
/* Get I386 XSAVE extended state size. */
-#define I386_XSTATE_SIZE(XCR0) \
- (((XCR0) & I386_XSTATE_AVX) != 0 \
- ? I386_XSTATE_AVX_SIZE : I386_XSTATE_SSE_SIZE)
+#define I386_XSTATE_SIZE(XCR0) \
+ (((XCR0) & I386_XSTATE_BNDCFG) != 0 ? I386_XSTATE_BNDCFG_SIZE \
+ : (((XCR0) & I386_XSTATE_BNDREGS) != 0 ? I386_XSTATE_BNDCFG_SIZE \
+ : (((XCR0) & I386_XSTATE_AVX_SIZE) != 0 ? I386_XSTATE_AVX_SIZE \
+ : I386_XSTATE_SSE_SIZE)))
#endif /* I386_XSTATE_H */
diff --git a/gdb/i386-linux-nat.c b/gdb/i386-linux-nat.c
index 52ecc38..25875e4 100644
--- a/gdb/i386-linux-nat.c
+++ b/gdb/i386-linux-nat.c
@@ -102,7 +102,7 @@ static int have_ptrace_getregset = -1;
(I386_ST0_REGNUM <= (regno) && (regno) < I386_SSE_NUM_REGS)
#define GETXSTATEREGS_SUPPLIES(regno) \
- (I386_ST0_REGNUM <= (regno) && (regno) < I386_AVX_NUM_REGS)
+ (I386_ST0_REGNUM <= (regno) && (regno) < I386_MPX_NUM_REGS)
/* Does the current host support the GETREGS request? */
int have_ptrace_getregs =
@@ -1041,9 +1041,18 @@ i386_linux_read_description (struct target_ops *ops)
}
/* Check the native XCR0 only if PTRACE_GETREGSET is available. */
- if (have_ptrace_getregset
- && (xcr0 & I386_XSTATE_AVX_MASK) == I386_XSTATE_AVX_MASK)
- return tdesc_i386_avx_linux;
+ if (have_ptrace_getregset)
+ {
+ switch ((xcr0 & I386_XSTATE_ALL_MASK))
+ {
+ case I386_XSTATE_MPX_MASK:
+ return tdesc_i386_mpx_linux;
+ case I386_XSTATE_AVX_MASK:
+ return tdesc_i386_avx_linux;
+ default:
+ return tdesc_i386_linux;
+ }
+ }
else
return tdesc_i386_linux;
}
diff --git a/gdb/i386-linux-tdep.c b/gdb/i386-linux-tdep.c
index 7b69aab..6d88df3 100644
--- a/gdb/i386-linux-tdep.c
+++ b/gdb/i386-linux-tdep.c
@@ -50,6 +50,7 @@
#include "features/i386/i386-linux.c"
#include "features/i386/i386-mmx-linux.c"
+#include "features/i386/i386-mpx-linux.c"
#include "features/i386/i386-avx-linux.c"
/* Supported register note sections. */
@@ -569,6 +570,8 @@ int i386_linux_gregset_reg_offset[] =
-1, -1, -1, -1, -1, -1, -1, -1,
-1,
-1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
+ -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
11 * 4 /* "orig_eax" */
};
@@ -642,8 +645,11 @@ i386_linux_core_read_description (struct gdbarch *gdbarch,
{
/* Linux/i386. */
uint64_t xcr0 = i386_linux_core_read_xcr0 (abfd);
- switch ((xcr0 & I386_XSTATE_AVX_MASK))
+
+ switch ((xcr0 & I386_XSTATE_ALL_MASK))
{
+ case I386_XSTATE_MPX_MASK:
+ return tdesc_i386_mpx_linux;
case I386_XSTATE_AVX_MASK:
return tdesc_i386_avx_linux;
case I386_XSTATE_SSE_MASK:
@@ -979,4 +985,5 @@ _initialize_i386_linux_tdep (void)
initialize_tdesc_i386_linux ();
initialize_tdesc_i386_mmx_linux ();
initialize_tdesc_i386_avx_linux ();
+ initialize_tdesc_i386_mpx_linux ();
}
diff --git a/gdb/i386-linux-tdep.h b/gdb/i386-linux-tdep.h
index 8e4bbf7..54b5058 100644
--- a/gdb/i386-linux-tdep.h
+++ b/gdb/i386-linux-tdep.h
@@ -29,7 +29,7 @@
/* Register number for the "orig_eax" pseudo-register. If this
pseudo-register contains a value >= 0 it is interpreted as the
system call number that the kernel is supposed to restart. */
-#define I386_LINUX_ORIG_EAX_REGNUM I386_AVX_NUM_REGS
+#define I386_LINUX_ORIG_EAX_REGNUM I386_MPX_NUM_REGS
/* Total number of registers for GNU/Linux. */
#define I386_LINUX_NUM_REGS (I386_LINUX_ORIG_EAX_REGNUM + 1)
@@ -41,6 +41,7 @@ extern uint64_t i386_linux_core_read_xcr0 (bfd *abfd);
extern struct target_desc *tdesc_i386_linux;
extern struct target_desc *tdesc_i386_mmx_linux;
extern struct target_desc *tdesc_i386_avx_linux;
+extern struct target_desc *tdesc_i386_mpx_linux;
/* Format of XSAVE extended state is:
struct
@@ -49,6 +50,7 @@ extern struct target_desc *tdesc_i386_avx_linux;
sw_usable_bytes[464..511]
xstate_hdr_bytes[512..575]
avx_bytes[576..831]
+ mpx_bytes [960..1032]
future_state etc
};
diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index b159b49..f1efa94 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -57,6 +57,7 @@
#include "features/i386/i386.c"
#include "features/i386/i386-avx.c"
+#include "features/i386/i386-mpx.c"
#include "features/i386/i386-mmx.c"
#include "ax.h"
@@ -98,6 +99,18 @@ static const char *i386_ymmh_names[] =
"ymm4h", "ymm5h", "ymm6h", "ymm7h",
};
+static const char *i386_mpx_names[] =
+{
+ "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
+};
+
+/* Register names for MPX pseudo-registers. */
+
+static const char *i386_bnd_names[] =
+{
+ "bnd0", "bnd1", "bnd2", "bnd3"
+};
+
/* Register names for MMX pseudo-registers. */
static const char *i386_mmx_names[] =
@@ -202,6 +215,21 @@ i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum)
return regnum >= 0 && regnum < tdep->num_ymm_regs;
}
+/* BND register? */
+
+int
+i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int bnd0_regnum = tdep->bnd0_regnum;
+
+ if (bnd0_regnum < 0)
+ return 0;
+
+ regnum -= bnd0_regnum;
+ return regnum >= 0 && regnum < I387_NUM_BND_REGS;
+}
+
/* SSE register? */
int
@@ -254,6 +282,34 @@ i386_fpc_regnum_p (struct gdbarch *gdbarch, int regnum)
&& regnum < I387_XMM0_REGNUM (tdep));
}
+/* BNDr (raw) register? */
+
+static int
+i386_bndr_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (I387_BND0R_REGNUM (tdep) < 0)
+ return 0;
+
+ regnum -= tdep->bnd0r_regnum;
+ return regnum >= 0 && regnum < I387_NUM_BND_REGS;
+}
+
+/* BND control register? */
+
+static int
+i386_mpx_ctrl_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (I387_BNDCFGU_REGNUM (tdep) < 0)
+ return 0;
+
+ regnum -= I387_BNDCFGU_REGNUM (tdep);
+ return regnum >= 0 && regnum < I387_NUM_MPX_CTRL_REGS;
+}
+
/* Return the name of register REGNUM, or the empty string if it is
an anonymous register. */
@@ -273,6 +329,8 @@ const char *
i386_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ if (i386_bnd_regnum_p (gdbarch, regnum))
+ return i386_bnd_names[regnum - tdep->bnd0_regnum];
if (i386_mmx_regnum_p (gdbarch, regnum))
return i386_mmx_names[regnum - I387_MM0_REGNUM (tdep)];
else if (i386_ymm_regnum_p (gdbarch, regnum))
@@ -2750,6 +2808,43 @@ i387_ext_type (struct gdbarch *gdbarch)
return tdep->i387_ext_type;
}
+/* Construct type for pseudo BND registers. We can't use
+ tdesc_find_type since a complement of one value has to be used
+ to describe the upper bound. */
+
+static struct type *
+i386_bnd_type (struct gdbarch *gdbarch)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+
+ if (!tdep->i386_bnd_type)
+ {
+ struct type *t, *bound_t;
+ const struct builtin_type *bt = builtin_type (gdbarch);
+
+ /* The type we're building is described bellow: */
+#if 0
+ struct __bound128
+ {
+ void *lbound;
+ void *ubound; /* One complement of raw ubound field. */
+ };
+#endif
+
+ t = arch_composite_type (gdbarch,
+ "__gdb_builtin_type_bound128", TYPE_CODE_STRUCT);
+
+ append_composite_type_field (t, "lbound", bt->builtin_data_ptr);
+ append_composite_type_field (t, "ubound", bt->builtin_data_ptr);
+
+ TYPE_NAME (t) = "builtin_type_bound128";
+ tdep->i386_bnd_type = t;
+ }
+
+ return tdep->i386_bnd_type;
+}
+
/* Construct vector type for pseudo YMM registers. We can't use
tdesc_find_type since YMM isn't described in target description. */
@@ -2851,6 +2946,8 @@ i386_mmx_type (struct gdbarch *gdbarch)
struct type *
i386_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
{
+ if (i386_bnd_regnum_p (gdbarch, regnum))
+ return i386_bnd_type (gdbarch);
if (i386_mmx_regnum_p (gdbarch, regnum))
return i386_mmx_type (gdbarch);
else if (i386_ymm_regnum_p (gdbarch, regnum))
@@ -2917,8 +3014,31 @@ i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
else
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ if (i386_bnd_regnum_p (gdbarch, regnum))
+ {
+ regnum -= tdep->bnd0_regnum;
- if (i386_ymm_regnum_p (gdbarch, regnum))
+ /* Extract (always little endian). Read lower 128bits. */
+ status = regcache_raw_read (regcache,
+ I387_BND0R_REGNUM (tdep) + regnum,
+ raw_buf);
+ if (status != REG_VALID)
+ mark_value_bytes_unavailable (result_value, 0, 16);
+ else
+ {
+ enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
+ LONGEST upper, lower;
+ int size = TYPE_LENGTH (builtin_type (gdbarch)->builtin_data_ptr);
+
+ lower = extract_unsigned_integer (raw_buf, 8, byte_order);
+ upper = extract_unsigned_integer (raw_buf + 8, 8, byte_order);
+ upper = ~upper;
+
+ memcpy (buf, &lower, size);
+ memcpy (buf + size, &upper, size);
+ }
+ }
+ else if (i386_ymm_regnum_p (gdbarch, regnum))
{
regnum -= tdep->ymm0_regnum;
@@ -3011,7 +3131,34 @@ i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- if (i386_ymm_regnum_p (gdbarch, regnum))
+ if (i386_bnd_regnum_p (gdbarch, regnum))
+ {
+ ULONGEST upper, lower;
+ int size = TYPE_LENGTH (builtin_type (gdbarch)->builtin_data_ptr);
+ enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
+
+ /* New values from input value. */
+ regnum -= tdep->bnd0_regnum;
+ lower = extract_unsigned_integer (buf, size, byte_order);
+ upper = extract_unsigned_integer (buf + size, size, byte_order);
+
+ /* Fetching register buffer. */
+ regcache_raw_read (regcache,
+ I387_BND0R_REGNUM (tdep) + regnum,
+ raw_buf);
+
+ upper = ~upper;
+
+ /* Set register bits. */
+ memcpy (raw_buf, &lower, 8);
+ memcpy (raw_buf + 8, &upper, 8);
+
+
+ regcache_raw_write (regcache,
+ I387_BND0R_REGNUM (tdep) + regnum,
+ raw_buf);
+ }
+ else if (i386_ymm_regnum_p (gdbarch, regnum))
{
regnum -= tdep->ymm0_regnum;
@@ -3866,7 +4013,8 @@ i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
{
const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int fp_regnum_p, mmx_regnum_p, xmm_regnum_p, mxcsr_regnum_p,
- ymm_regnum_p, ymmh_regnum_p;
+ ymm_regnum_p, ymmh_regnum_p, bndr_regnum_p, bnd_regnum_p,
+ mpx_ctrl_regnum_p;
/* Don't include pseudo registers, except for MMX, in any register
groups. */
@@ -3911,13 +4059,31 @@ i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
|| ymmh_regnum_p))
return 0;
+ bnd_regnum_p = i386_bnd_regnum_p (gdbarch, regnum);
+ if (group == all_reggroup
+ && ((bnd_regnum_p && (tdep->xcr0 & I386_XSTATE_MPX_MASK))))
+ return bnd_regnum_p;
+
+ bndr_regnum_p = i386_bndr_regnum_p (gdbarch, regnum);
+ if (group == all_reggroup
+ && ((bndr_regnum_p && (tdep->xcr0 & I386_XSTATE_MPX_MASK))))
+ return 0;
+
+ mpx_ctrl_regnum_p = i386_mpx_ctrl_regnum_p (gdbarch, regnum);
+ if (group == all_reggroup
+ && ((mpx_ctrl_regnum_p && (tdep->xcr0 & I386_XSTATE_MPX_MASK))))
+ return mpx_ctrl_regnum_p;
+
if (group == general_reggroup)
return (!fp_regnum_p
&& !mmx_regnum_p
&& !mxcsr_regnum_p
&& !xmm_regnum_p
&& !ymm_regnum_p
- && !ymmh_regnum_p);
+ && !ymmh_regnum_p
+ && !bndr_regnum_p
+ && !bnd_regnum_p
+ && !mpx_ctrl_regnum_p);
return default_register_reggroup_p (gdbarch, regnum, group);
}
@@ -7496,7 +7662,7 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep,
{
const struct target_desc *tdesc = tdep->tdesc;
const struct tdesc_feature *feature_core;
- const struct tdesc_feature *feature_sse, *feature_avx;
+ const struct tdesc_feature *feature_sse, *feature_avx, *feature_mpx;
int i, num_regs, valid_p;
if (! tdesc_has_registers (tdesc))
@@ -7513,6 +7679,9 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep,
/* Try AVX registers. */
feature_avx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx");
+ /* Try MPX registers. */
+ feature_mpx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.mpx");
+
valid_p = 1;
/* The XCR0 bits. */
@@ -7559,6 +7728,23 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep,
tdep->register_names[i]);
}
+ if (feature_mpx)
+ {
+ tdep->xcr0 = I386_XSTATE_MPX_MASK;
+
+ if (tdep->bnd0r_regnum == 0)
+ {
+ tdep->mpx_register_names = i386_mpx_names;
+ tdep->bnd0r_regnum = I386_BND0R_REGNUM;
+ tdep->bndcfgu_regnum = I386_BNDCFGU_REGNUM;
+ }
+
+ for (i = 0; i < I387_NUM_MPX_REGS; i++)
+ valid_p &= tdesc_numbered_register (feature_mpx, tdesc_data,
+ I387_BND0R_REGNUM (tdep) + i,
+ tdep->mpx_register_names[i]);
+ }
+
return valid_p;
}
@@ -7572,6 +7758,8 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
const struct target_desc *tdesc;
int mm0_regnum;
int ymm0_regnum;
+ int bnd0_regnum;
+ int num_bnd_cooked;
/* If there is already a candidate, use it. */
arches = gdbarch_list_lookup_by_info (arches, &info);
@@ -7745,8 +7933,8 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
/* Even though the default ABI only includes general-purpose registers,
floating-point registers and the SSE registers, we have to leave a
- gap for the upper AVX registers. */
- set_gdbarch_num_regs (gdbarch, I386_AVX_NUM_REGS);
+ gap for the upper AVX registers and the MPX registers. */
+ set_gdbarch_num_regs (gdbarch, I386_MPX_NUM_REGS);
/* Get the x86 target description from INFO. */
tdesc = info.target_desc;
@@ -7767,6 +7955,10 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
tdep->num_mmx_regs = 8;
tdep->num_ymm_regs = 0;
+ /* No MPX registers. */
+ tdep->bnd0r_regnum = -1;
+ tdep->bndcfgu_regnum = -1;
+
tdesc_data = tdesc_data_alloc ();
set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
@@ -7785,13 +7977,16 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
return NULL;
}
+ num_bnd_cooked = (tdep->bnd0r_regnum > 0 ? I387_NUM_BND_REGS : 0);
+
/* Wire in pseudo registers. Number of pseudo registers may be
changed. */
set_gdbarch_num_pseudo_regs (gdbarch, (tdep->num_byte_regs
+ tdep->num_word_regs
+ tdep->num_dword_regs
+ tdep->num_mmx_regs
- + tdep->num_ymm_regs));
+ + tdep->num_ymm_regs
+ + num_bnd_cooked));
/* Target description may be changed. */
tdesc = tdep->tdesc;
@@ -7825,14 +8020,21 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
else
tdep->ymm0_regnum = -1;
+ bnd0_regnum = mm0_regnum;
if (tdep->num_mmx_regs != 0)
{
/* Support MMX pseudo-register if MMX hasn't been disabled. */
tdep->mm0_regnum = mm0_regnum;
+ bnd0_regnum += tdep->num_mmx_regs;
}
else
tdep->mm0_regnum = -1;
+ if (tdep->bnd0r_regnum > 0)
+ tdep->bnd0_regnum = bnd0_regnum;
+ else
+ tdep-> bnd0_regnum = -1;
+
/* Hook in the legacy prologue-based unwinders last (fallback). */
frame_unwind_append_unwinder (gdbarch, &i386_stack_tramp_frame_unwind);
frame_unwind_append_unwinder (gdbarch, &i386_sigtramp_frame_unwind);
@@ -7910,6 +8112,7 @@ is \"default\"."),
initialize_tdesc_i386 ();
initialize_tdesc_i386_mmx ();
initialize_tdesc_i386_avx ();
+ initialize_tdesc_i386_mpx ();
/* Tell remote stub that we support XML target description. */
register_remote_support_xml ("i386");
diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h
index 092744c..6529c98 100644
--- a/gdb/i386-tdep.h
+++ b/gdb/i386-tdep.h
@@ -130,6 +130,21 @@ struct gdbarch_tdep
/* Upper YMM register names. Only used for tdesc_numbered_register. */
const char **ymmh_register_names;
+ /* Register number for %bnd0r. Set this to -1 to indicate the absence
+ bound registers. */
+ int bnd0r_regnum;
+
+ /* Register number for pseudo register %bnd0. Set this to -1 to indicate the absence
+ bound registers. */
+ int bnd0_regnum;
+
+ /* Register number for %bndcfgu. Set this to -1 to indicate the absence
+ bound control registers. */
+ int bndcfgu_regnum;
+
+ /* MPX register names. Only used for tdesc_numbered_register. */
+ const char **mpx_register_names;
+
/* Target description. */
const struct target_desc *tdesc;
@@ -165,6 +180,7 @@ struct gdbarch_tdep
struct type *i386_mmx_type;
struct type *i386_ymm_type;
struct type *i387_ext_type;
+ struct type *i386_bnd_type;
/* Process record/replay target. */
/* The map for registers because the AMD64's registers order
@@ -212,7 +228,11 @@ enum i386_regnum
I386_ST0_REGNUM, /* %st(0) */
I386_MXCSR_REGNUM = 40, /* %mxcsr */
I386_YMM0H_REGNUM, /* %ymm0h */
- I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7
+ I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
+ I386_BND0R_REGNUM,
+ I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
+ I386_BNDCFGU_REGNUM,
+ I386_BNDSTATUS_REGNUM
};
/* Register numbers of RECORD_REGMAP. */
@@ -250,6 +270,7 @@ enum record_i386_regnum
#define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
#define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
+#define I386_MPX_NUM_REGS (I386_BNDSTATUS_REGNUM + 1)
/* Size of the largest register. */
#define I386_MAX_REGISTER_SIZE 16
@@ -263,6 +284,7 @@ extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
int regnum);
diff --git a/gdb/i387-tdep.c b/gdb/i387-tdep.c
index 48a00c3..5871b19 100644
--- a/gdb/i387-tdep.c
+++ b/gdb/i387-tdep.c
@@ -763,9 +763,22 @@ static int xsave_avxh_offset[] =
576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */
};
+static int xsave_mpx_offset[] =
+{
+ 960 + 0 * 16, /* bnd0r...bnd3r registers. */
+ 960 + 1 * 16,
+ 960 + 2 * 16,
+ 960 + 3 * 16,
+ 1024 + 0 * 8, /* bndcfg ... bndstatus. */
+ 1024 + 1 * 8,
+};
+
#define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \
(xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)])
+#define XSAVE_MPX_ADDR(tdep, xsave, regnum) \
+ (xsave + xsave_mpx_offset[regnum - I387_BND0R_REGNUM (tdep)])
+
/* Similar to i387_supply_fxsave, but use XSAVE extended state. */
void
@@ -783,7 +796,8 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
x87 = 0x1,
sse = 0x2,
avxh = 0x4,
- all = x87 | sse | avxh
+ mpx = 0x8,
+ all = x87 | sse | avxh | mpx
} regclass;
gdb_assert (regs != NULL);
@@ -795,6 +809,9 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
else if (regnum >= I387_YMM0H_REGNUM (tdep)
&& regnum < I387_YMMENDH_REGNUM (tdep))
regclass = avxh;
+ else if (regnum >= I387_BND0R_REGNUM (tdep)
+ && regnum < I387_MPXEND_REGNUM (tdep))
+ regclass = mpx;
else if (regnum >= I387_XMM0_REGNUM(tdep)
&& regnum < I387_MXCSR_REGNUM (tdep))
regclass = sse;
@@ -814,7 +831,7 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
}
else
- clear_bv = I386_XSTATE_AVX_MASK;
+ clear_bv = I386_XSTATE_ALL_MASK;
/* With the delayed xsave mechanism, in between the program
starting, and the program accessing the vector registers for the
@@ -838,6 +855,14 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
XSAVE_AVXH_ADDR (tdep, regs, regnum));
return;
+ case mpx:
+ if ((clear_bv & I386_XSTATE_BNDREGS))
+ regcache_raw_supply (regcache, regnum, zero);
+ else
+ regcache_raw_supply (regcache, regnum,
+ XSAVE_MPX_ADDR (tdep, regs, regnum));
+ return;
+
case sse:
if ((clear_bv & I386_XSTATE_SSE))
regcache_raw_supply (regcache, regnum, zero);
@@ -875,6 +900,42 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
}
}
+ /* Handle the MPX registers. */
+ if ((tdep->xcr0 & I386_XSTATE_BNDREGS))
+ {
+ if (clear_bv & I386_XSTATE_BNDREGS)
+ {
+ for (i = I387_BND0R_REGNUM (tdep);
+ i < I387_BNDCFGU_REGNUM (tdep); i++)
+ regcache_raw_supply (regcache, i, zero);
+ }
+ else
+ {
+ for (i = I387_BND0R_REGNUM (tdep);
+ i < I387_BNDCFGU_REGNUM (tdep); i++)
+ regcache_raw_supply (regcache, i,
+ XSAVE_MPX_ADDR (tdep, regs, i));
+ }
+ }
+
+ /* Handle the MPX registers. */
+ if ((tdep->xcr0 & I386_XSTATE_BNDCFG))
+ {
+ if (clear_bv & I386_XSTATE_BNDCFG)
+ {
+ for (i = I387_BNDCFGU_REGNUM (tdep);
+ i < I387_MPXEND_REGNUM (tdep); i++)
+ regcache_raw_supply (regcache, i, zero);
+ }
+ else
+ {
+ for (i = I387_BNDCFGU_REGNUM (tdep);
+ i < I387_MPXEND_REGNUM (tdep); i++)
+ regcache_raw_supply (regcache, i,
+ XSAVE_MPX_ADDR (tdep, regs, i));
+ }
+ }
+
/* Handle the XMM registers. */
if ((tdep->xcr0 & I386_XSTATE_SSE))
{
@@ -989,7 +1050,8 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
x87 = 0x2 | check,
sse = 0x4 | check,
avxh = 0x8 | check,
- all = x87 | sse | avxh
+ mpx = 0x10 | check,
+ all = x87 | sse | avxh | mpx
} regclass;
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
@@ -1000,7 +1062,10 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
else if (regnum >= I387_YMM0H_REGNUM (tdep)
&& regnum < I387_YMMENDH_REGNUM (tdep))
regclass = avxh;
- else if (regnum >= I387_XMM0_REGNUM(tdep)
+ else if (regnum >= I387_BND0R_REGNUM (tdep)
+ && regnum < I387_MPXEND_REGNUM (tdep))
+ regclass = mpx;
+ else if (regnum >= I387_XMM0_REGNUM (tdep)
&& regnum < I387_MXCSR_REGNUM (tdep))
regclass = sse;
else if (regnum >= I387_ST0_REGNUM (tdep)
@@ -1032,6 +1097,16 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
/* Clear register set if its bit in xstat_bv is zero. */
if (clear_bv)
{
+ if ((clear_bv & I386_XSTATE_BNDREGS))
+ for (i = I387_BND0R_REGNUM (tdep);
+ i < I387_BNDCFGU_REGNUM (tdep); i++)
+ memset (XSAVE_MPX_ADDR (tdep, regs, i), 0, 16);
+
+ if ((clear_bv & I386_XSTATE_BNDCFG))
+ for (i = I387_BNDCFGU_REGNUM (tdep);
+ i < I387_MPXEND_REGNUM (tdep); i++)
+ memset (XSAVE_MPX_ADDR (tdep, regs, i), 0, 8);
+
if ((clear_bv & I386_XSTATE_AVX))
for (i = I387_YMM0H_REGNUM (tdep);
i < I387_YMMENDH_REGNUM (tdep); i++)
@@ -1063,6 +1138,33 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
memcpy (p, raw, 16);
}
}
+ /* Check if any upper MPX registers are changed. */
+ if ((tdep->xcr0 & I386_XSTATE_BNDREGS))
+ for (i = I387_BND0R_REGNUM (tdep);
+ i < I387_BNDCFGU_REGNUM (tdep); i++)
+ {
+ regcache_raw_collect (regcache, i, raw);
+ p = XSAVE_MPX_ADDR (tdep, regs, i);
+ if (memcmp (raw, p, 16))
+ {
+ xstate_bv |= I386_XSTATE_BNDREGS;
+ memcpy (p, raw, 16);
+ }
+ }
+
+ /* Check if any upper MPX registers are changed. */
+ if ((tdep->xcr0 & I386_XSTATE_BNDCFG))
+ for (i = I387_BNDCFGU_REGNUM (tdep);
+ i < I387_MPXEND_REGNUM (tdep); i++)
+ {
+ regcache_raw_collect (regcache, i, raw);
+ p = XSAVE_MPX_ADDR (tdep, regs, i);
+ if (memcmp (raw, p, 8))
+ {
+ xstate_bv |= I386_XSTATE_BNDCFG;
+ memcpy (p, raw, 8);
+ }
+ }
/* Check if any SSE registers are changed. */
if ((tdep->xcr0 & I386_XSTATE_SSE))
@@ -1113,6 +1215,25 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
}
break;
+ case mpx:
+ if (regnum < I387_BNDCFGU_REGNUM (tdep))
+ {
+ regcache_raw_collect (regcache, regnum, raw);
+ p = XSAVE_MPX_ADDR (tdep, regs, regnum);
+ if (memcmp (raw, p, 16))
+ {
+ xstate_bv |= I386_XSTATE_BNDREGS;
+ memcpy (p, raw, 16);
+ }
+ }
+ else
+ {
+ p = XSAVE_MPX_ADDR (tdep, regs, regnum);
+ xstate_bv |= I386_XSTATE_BNDCFG;
+ memcpy (p, raw, 8);
+ }
+ break;
+
case sse:
/* This is an SSE register. */
p = FXSAVE_ADDR (tdep, regs, regnum);
@@ -1154,6 +1275,7 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
case x87:
case sse:
case avxh:
+ case mpx:
/* Register REGNUM has been updated. Return. */
return;
}
diff --git a/gdb/i387-tdep.h b/gdb/i387-tdep.h
index 64cbb1e..3f63971 100644
--- a/gdb/i387-tdep.h
+++ b/gdb/i387-tdep.h
@@ -34,6 +34,13 @@ struct ui_file;
#define I387_MM0_REGNUM(tdep) ((tdep)->mm0_regnum)
#define I387_NUM_YMM_REGS(tdep) ((tdep)->num_ymm_regs)
#define I387_YMM0H_REGNUM(tdep) ((tdep)->ymm0h_regnum)
+#define I387_BND0R_REGNUM(tdep) ((tdep)->bnd0r_regnum)
+#define I387_BNDCFGU_REGNUM(tdep) ((tdep)->bndcfgu_regnum)
+
+/* Set of constants used for 32 and 64-bit. */
+#define I387_NUM_MPX_REGS 6
+#define I387_NUM_BND_REGS 4
+#define I387_NUM_MPX_CTRL_REGS 2
#define I387_FCTRL_REGNUM(tdep) (I387_ST0_REGNUM (tdep) + 8)
#define I387_FSTAT_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + 1)
@@ -48,6 +55,8 @@ struct ui_file;
(I387_XMM0_REGNUM (tdep) + I387_NUM_XMM_REGS (tdep))
#define I387_YMMENDH_REGNUM(tdep) \
(I387_YMM0H_REGNUM (tdep) + I387_NUM_YMM_REGS (tdep))
+#define I387_MPXEND_REGNUM(tdep) \
+ (I387_BND0R_REGNUM (tdep) + I387_NUM_MPX_REGS)
/* Print out the i387 floating point state. */
--
1.7.10.4
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH V7 4/8] MPX for amd64
2013-10-09 12:01 [PATCH V7 0/8] Intel(R) MPX register support Walfred Tedeschi
` (2 preceding siblings ...)
2013-10-09 12:01 ` [PATCH V7 3/8] Add MPX support for i386 Walfred Tedeschi
@ 2013-10-09 12:01 ` Walfred Tedeschi
2013-10-09 12:01 ` [PATCH V7 6/8] Add pretty-printer for MPX bnd registers Walfred Tedeschi
` (4 subsequent siblings)
8 siblings, 0 replies; 23+ messages in thread
From: Walfred Tedeschi @ 2013-10-09 12:01 UTC (permalink / raw)
To: tromey, mark.kettenis; +Cc: gdb-patches, Walfred Tedeschi
2013-06-24 Walfred Tedeschi <walfred.tedeschi@intel.com>
* amd64-linux-nat.c (amd64_linux_gregset32_reg_offset):
Add MPX registers.
(amd64_linux_read_description): Add initialization for MPX and
AVX independently.
* amd64-linux-tdep.c: Includes features/i386/amd64-mpx-linux.c and
features/i386/x32-mpx-linux.c.
(amd64_linux_gregset_reg_offset): Add MPX registers.
(amd64_linux_core_read_description): Add initialization for MPX
registers.
(_initialize_amd64_linux_tdep): Initialize MPX targets.
* amd64-linux-tdep.h (AMD64_LINUX_NUM_REGS): Set it to the last
register on the list.
(tdesc_amd64_mpx_linux and tdesc_x32_mpx_linux) Add new targets
for MPX.
* amd64-tdep.c: Includes features/i386/amd64-mpx.c and
features/i386/x32-mpx.c.
(amd64_mpx_names): MPX register names.
(amd64_init_abi): Add MPX register while initializing the ABI.
(_initialize_amd64_tdep): Initialize MPX targets.
* amd64-tdep.h (amd64_regnum): Add MPX registers.
(AMD64_NUM_REGS): Set number of registers taking MPX into account.
---
gdb/amd64-linux-nat.c | 43 ++++++++++++++++++++++++++++++++++---------
gdb/amd64-linux-tdep.c | 14 +++++++++++++-
gdb/amd64-linux-tdep.h | 4 +++-
gdb/amd64-tdep.c | 16 ++++++++++++++++
gdb/amd64-tdep.h | 8 ++++++--
5 files changed, 72 insertions(+), 13 deletions(-)
diff --git a/gdb/amd64-linux-nat.c b/gdb/amd64-linux-nat.c
index a61d218..a24b415 100644
--- a/gdb/amd64-linux-nat.c
+++ b/gdb/amd64-linux-nat.c
@@ -100,7 +100,9 @@ static int amd64_linux_gregset32_reg_offset[] =
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
- ORIG_RAX * 8 /* "orig_eax" */
+ -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
+ -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
+ ORIG_RAX * 8, /* "orig_eax" */
};
\f
@@ -1094,18 +1096,41 @@ amd64_linux_read_description (struct target_ops *ops)
}
/* Check the native XCR0 only if PTRACE_GETREGSET is available. */
- if (have_ptrace_getregset
- && (xcr0 & I386_XSTATE_AVX_MASK) == I386_XSTATE_AVX_MASK)
+ if (have_ptrace_getregset && (xcr0 & I386_XSTATE_ALL_MASK))
{
- if (is_64bit)
+ switch (xcr0 & I386_XSTATE_ALL_MASK)
{
- if (is_x32)
- return tdesc_x32_avx_linux;
+ case I386_XSTATE_MPX_MASK:
+ if (is_64bit)
+ {
+ if (is_x32)
+ return tdesc_x32_mpx_linux;
+ else
+ return tdesc_amd64_mpx_linux;
+ }
+ else
+ return tdesc_i386_mpx_linux;
+ case I386_XSTATE_AVX_MASK:
+ if (is_64bit)
+ {
+ if (is_x32)
+ return tdesc_x32_avx_linux;
+ else
+ return tdesc_amd64_avx_linux;
+ }
+ else
+ return tdesc_i386_avx_linux;
+ default:
+ if (is_64bit)
+ {
+ if (is_x32)
+ return tdesc_x32_linux;
+ else
+ return tdesc_amd64_linux;
+ }
else
- return tdesc_amd64_avx_linux;
+ return tdesc_i386_linux;
}
- else
- return tdesc_i386_avx_linux;
}
else
{
diff --git a/gdb/amd64-linux-tdep.c b/gdb/amd64-linux-tdep.c
index 4f67762..9740aff 100644
--- a/gdb/amd64-linux-tdep.c
+++ b/gdb/amd64-linux-tdep.c
@@ -42,8 +42,10 @@
#include "features/i386/amd64-linux.c"
#include "features/i386/amd64-avx-linux.c"
+#include "features/i386/amd64-mpx-linux.c"
#include "features/i386/x32-linux.c"
#include "features/i386/x32-avx-linux.c"
+#include "features/i386/x32-mpx-linux.c"
/* The syscall's XML filename for i386. */
#define XML_SYSCALL_FILENAME_AMD64 "syscalls/amd64-linux.xml"
@@ -96,6 +98,8 @@ int amd64_linux_gregset_reg_offset[] =
-1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
+ -1, -1, /* MPX registers BNDCFGU and BNDSTATUS. */
15 * 8 /* "orig_rax" */
};
\f
@@ -1287,8 +1291,14 @@ amd64_linux_core_read_description (struct gdbarch *gdbarch,
{
/* Linux/x86-64. */
uint64_t xcr0 = i386_linux_core_read_xcr0 (abfd);
- switch ((xcr0 & I386_XSTATE_AVX_MASK))
+
+ switch (xcr0 & I386_XSTATE_ALL_MASK)
{
+ case I386_XSTATE_MPX_MASK:
+ if (gdbarch_ptr_bit (gdbarch) == 32)
+ return tdesc_x32_mpx_linux;
+ else
+ return tdesc_amd64_mpx_linux;
case I386_XSTATE_AVX_MASK:
if (gdbarch_ptr_bit (gdbarch) == 32)
return tdesc_x32_avx_linux;
@@ -1623,6 +1633,8 @@ _initialize_amd64_linux_tdep (void)
/* Initialize the Linux target description. */
initialize_tdesc_amd64_linux ();
initialize_tdesc_amd64_avx_linux ();
+ initialize_tdesc_amd64_mpx_linux ();
initialize_tdesc_x32_linux ();
initialize_tdesc_x32_avx_linux ();
+ initialize_tdesc_x32_mpx_linux ();
}
diff --git a/gdb/amd64-linux-tdep.h b/gdb/amd64-linux-tdep.h
index e9eaeaa..5783fa3 100644
--- a/gdb/amd64-linux-tdep.h
+++ b/gdb/amd64-linux-tdep.h
@@ -26,7 +26,7 @@
/* Register number for the "orig_rax" register. If this register
contains a value >= 0 it is interpreted as the system call number
that the kernel is supposed to restart. */
-#define AMD64_LINUX_ORIG_RAX_REGNUM (AMD64_YMM15H_REGNUM + 1)
+#define AMD64_LINUX_ORIG_RAX_REGNUM (AMD64_BNDSTATUS_REGNUM + 1)
/* Total number of registers for GNU/Linux. */
#define AMD64_LINUX_NUM_REGS (AMD64_LINUX_ORIG_RAX_REGNUM + 1)
@@ -34,8 +34,10 @@
/* Linux target description. */
extern struct target_desc *tdesc_amd64_linux;
extern struct target_desc *tdesc_amd64_avx_linux;
+extern struct target_desc *tdesc_amd64_mpx_linux;
extern struct target_desc *tdesc_x32_linux;
extern struct target_desc *tdesc_x32_avx_linux;
+extern struct target_desc *tdesc_x32_mpx_linux;
/* Enum that defines the syscall identifiers for amd64 linux.
Used for process record/replay, these will be translated into
diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index 4d6b325..d0a62a7 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -43,8 +43,10 @@
#include "features/i386/amd64.c"
#include "features/i386/amd64-avx.c"
+#include "features/i386/amd64-mpx.c"
#include "features/i386/x32.c"
#include "features/i386/x32-avx.c"
+#include "features/i386/x32-mpx.c"
#include "ax.h"
#include "ax-gdb.h"
@@ -92,6 +94,11 @@ static const char *amd64_ymmh_names[] =
"ymm12h", "ymm13h", "ymm14h", "ymm15h"
};
+static const char *amd64_mpx_names[] =
+{
+ "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
+};
+
/* DWARF Register Number Mapping as defined in the System V psABI,
section 3.6. */
@@ -2845,6 +2852,13 @@ amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
tdep->ymm0h_regnum = AMD64_YMM0H_REGNUM;
}
+ if (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.mpx") != NULL)
+ {
+ tdep->mpx_register_names = amd64_mpx_names;
+ tdep->bndcfgu_regnum = AMD64_BNDCFGU_REGNUM;
+ tdep->bnd0r_regnum = AMD64_BND0R_REGNUM;
+ }
+
tdep->num_byte_regs = 20;
tdep->num_word_regs = 16;
tdep->num_dword_regs = 16;
@@ -2986,8 +3000,10 @@ _initialize_amd64_tdep (void)
{
initialize_tdesc_amd64 ();
initialize_tdesc_amd64_avx ();
+ initialize_tdesc_amd64_mpx ();
initialize_tdesc_x32 ();
initialize_tdesc_x32_avx ();
+ initialize_tdesc_x32_mpx ();
}
\f
diff --git a/gdb/amd64-tdep.h b/gdb/amd64-tdep.h
index 265e535..ff58c35 100644
--- a/gdb/amd64-tdep.h
+++ b/gdb/amd64-tdep.h
@@ -64,13 +64,17 @@ enum amd64_regnum
AMD64_XMM1_REGNUM, /* %xmm1 */
AMD64_MXCSR_REGNUM = AMD64_XMM0_REGNUM + 16,
AMD64_YMM0H_REGNUM, /* %ymm0h */
- AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15
+ AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15,
+ AMD64_BND0R_REGNUM = AMD64_YMM15H_REGNUM + 1,
+ AMD64_BND3R_REGNUM = AMD64_BND0R_REGNUM + 3,
+ AMD64_BNDCFGU_REGNUM,
+ AMD64_BNDSTATUS_REGNUM
};
/* Number of general purpose registers. */
#define AMD64_NUM_GREGS 24
-#define AMD64_NUM_REGS (AMD64_YMM15H_REGNUM + 1)
+#define AMD64_NUM_REGS (AMD64_BNDSTATUS_REGNUM + 1)
extern struct displaced_step_closure *amd64_displaced_step_copy_insn
(struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
--
1.7.10.4
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH V7 7/8] Add MPX registers tests.
2013-10-09 12:01 [PATCH V7 0/8] Intel(R) MPX register support Walfred Tedeschi
` (4 preceding siblings ...)
2013-10-09 12:01 ` [PATCH V7 6/8] Add pretty-printer for MPX bnd registers Walfred Tedeschi
@ 2013-10-09 12:01 ` Walfred Tedeschi
2013-10-09 12:01 ` [PATCH V7 1/8] Fix conditions in creating a bitfield Walfred Tedeschi
` (2 subsequent siblings)
8 siblings, 0 replies; 23+ messages in thread
From: Walfred Tedeschi @ 2013-10-09 12:01 UTC (permalink / raw)
To: tromey, mark.kettenis; +Cc: gdb-patches, Walfred Tedeschi
2013-06-25 Walfred Tedeschi <walfred.tedeschi@intel.com>
* common/i386-gcc-cpuid.h (bit_MPX): Synchronize with gcc file.
testsuite/
* gdb.arch/i386-mpx.c: New file
* gdb.arch/i386-mpx.exp: New file.
---
gdb/common/i386-gcc-cpuid.h | 8 +-
gdb/testsuite/gdb.arch/i386-mpx.c | 92 +++++++++++++++++++++++
gdb/testsuite/gdb.arch/i386-mpx.exp | 142 +++++++++++++++++++++++++++++++++++
3 files changed, 241 insertions(+), 1 deletion(-)
create mode 100644 gdb/testsuite/gdb.arch/i386-mpx.c
create mode 100644 gdb/testsuite/gdb.arch/i386-mpx.exp
diff --git a/gdb/common/i386-gcc-cpuid.h b/gdb/common/i386-gcc-cpuid.h
index e045ba8..dafb21c 100644
--- a/gdb/common/i386-gcc-cpuid.h
+++ b/gdb/common/i386-gcc-cpuid.h
@@ -75,8 +75,14 @@
#define bit_AVX2 (1 << 5)
#define bit_BMI2 (1 << 8)
#define bit_RTM (1 << 11)
+#define bit_AVX512F (1 << 16)
+#define bit_MPX (1 << 14)
#define bit_RDSEED (1 << 18)
#define bit_ADX (1 << 19)
+#define bit_AVX512PF (1 << 26)
+#define bit_AVX512ER (1 << 27)
+#define bit_AVX512CD (1 << 28)
+#define bit_SHA (1 << 29)
/* Extended State Enumeration Sub-leaf (%eax == 13, %ecx == 1) */
#define bit_XSAVEOPT (1 << 0)
@@ -207,7 +213,7 @@ __get_cpuid_max (unsigned int __ext, unsigned int *__sig)
{
unsigned int __eax, __ebx, __ecx, __edx;
-#ifdef __i386__
+#ifndef __x86_64__
/* See if we can use cpuid. On AMD64 we always can. */
#if __GNUC__ >= 3
__asm__ ("pushf{l|d}\n\t"
diff --git a/gdb/testsuite/gdb.arch/i386-mpx.c b/gdb/testsuite/gdb.arch/i386-mpx.c
new file mode 100644
index 0000000..db7cb3b
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/i386-mpx.c
@@ -0,0 +1,92 @@
+/* Test program for MPX registers.
+
+ Copyright 2013 Free Software Foundation, Inc.
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#include <stdio.h>
+#include "i386-cpuid.h"
+
+#ifndef NOINLINE
+#define NOINLINE __attribute__ ((noinline))
+#endif
+
+unsigned int have_mpx (void) NOINLINE;
+
+unsigned int NOINLINE
+have_mpx (void)
+{
+ unsigned int eax, ebx, ecx, edx;
+
+ if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+ return 0;
+
+ if ((ecx & bit_OSXSAVE) == bit_OSXSAVE)
+ {
+ if (__get_cpuid_max (0, NULL) < 7)
+ return 0;
+
+ __cpuid_count (7, 0, eax, ebx, ecx, edx);
+
+ if ((ebx & bit_MPX) == bit_MPX)
+ return 1;
+ else
+ return 0;
+ }
+}
+
+int
+main (int argc, char **argv)
+{
+ if (have_mpx ())
+ {
+#ifdef __x86_64__
+ asm ("mov $10, %rax\n\t"
+ "mov $9, %rdx\n\t"
+ "bndmk (%rax,%rdx), %bnd0\n\t"
+ "mov $20, %rax\n\t"
+ "mov $9, %rdx\n\t"
+ "bndmk (%rax,%rdx), %bnd1\n\t"
+ "mov $30, %rax\n\t"
+ "mov $9, %rdx\n\t"
+ "bndmk (%rax,%rdx), %bnd2\n\t"
+ "mov $40, %rax\n\t"
+ "mov $9, %rdx\n\t"
+ "bndmk (%rax,%rdx), %bnd3\n\t"
+ "bndstx %bnd3, (%rax) \n\t"
+ "nop\n\t"
+ );
+#else
+ asm ("mov $10, %eax\n\t"
+ "mov $9, %edx\n\t"
+ "bndmk (%eax,%edx), %bnd0\n\t"
+ "mov $20, %eax\n\t"
+ "mov $9, %edx\n\t"
+ "bndmk (%eax,%edx), %bnd1\n\t"
+ "mov $30, %eax\n\t"
+ "mov $9, %edx\n\t"
+ "bndmk (%eax,%edx), %bnd2\n\t"
+ "mov $40, %eax\n\t"
+ "mov $9, %edx\n\t"
+ "bndmk (%eax,%edx), %bnd3\n\t"
+ "bndstx %bnd3, (%eax)\n\t"
+ "nop\n\t"
+ );
+#endif
+ asm ("nop\n\t"); /* break here. */
+ }
+ return 0;
+}
diff --git a/gdb/testsuite/gdb.arch/i386-mpx.exp b/gdb/testsuite/gdb.arch/i386-mpx.exp
new file mode 100644
index 0000000..ff1c2eb
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/i386-mpx.exp
@@ -0,0 +1,142 @@
+# Copyright 2013 Free Software Foundation, Inc.
+#
+# Contributed by Intel Corp. <walfred.tedeschi@intel.com>
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+if { ![istarget i?86-*-*] && ![istarget x86_64-*-* ] } {
+ verbose "Skipping x86 MPX tests."
+ return
+}
+
+standard_testfile
+
+set comp_flags "-fmpx -I${srcdir}/../common"
+
+if { [prepare_for_testing ${testfile}.exp ${testfile} ${srcfile} \
+ [list debug nowarnings additional_flags=${comp_flags}]] } {
+ return -1
+}
+
+if ![runto_main] {
+ untested "could not run to main"
+ return -1
+}
+
+send_gdb "print have_mpx ()\r"
+gdb_expect {
+ -re ".. = 1\r\n$gdb_prompt " {
+ pass "check whether processor supports MPX"
+ }
+ -re ".. = 0\r\n$gdb_prompt " {
+ verbose "processor does not support MPX; skipping MPX tests"
+ return
+ }
+ -re ".*$gdb_prompt $" {
+ fail "check whether processor supports MPX"
+ }
+ timeout {
+ fail "check whether processor supports MPX (timeout)"
+ }
+}
+
+# Test bndcfg register and bndstatus at startup
+set test_string "\\\{raw = 0x\[0-9a-f\]+, config = \\\{base = \[0-9\]+,\
+reserved = \[0-9\]+, preserved = \[0-9\]+, enabled = \[0-9\]+\\\}\\\}"
+
+gdb_test "print \$bndcfgu" $test_string "bndcfgu formating"
+gdb_test "print \$bndcfgu.config.enabled" "= 1" "test if bndstatus is enabled"
+gdb_test "print \$bndstatus" "\\\{raw = 0x0, status = \\\{bde = 0, error = 0\\\}\\\}" \
+ "bndstatus formating"
+gdb_test "print \$bndstatus.raw" "= \\\(void \\\*\\\) 0x0" "bndstatus is zero by startup"
+
+# Read values from pseudo registers.
+gdb_breakpoint [ gdb_get_line_number "break here" ]
+gdb_continue_to_breakpoint "break here" ".*break here.*"
+
+set test_string ".*\\\{lbound = 0xa, ubound = 0x13\\\}.*"
+gdb_test "info register bnd0" ".*bnd0$test_string" "Pure bnd0 register"
+
+set test_string ".*\\\{lbound = 0x14, ubound = 0x1d\\\}.*"
+gdb_test "info register bnd1" ".*bnd1$test_string" "Pure bnd1 register"
+
+set test_string ".*\\\{lbound = 0x1e, ubound = 0x27\\\}.*"
+gdb_test "info register bnd2" ".*bnd2$test_string" "Pure bnd2 register"
+
+set test_string ".*\\\{lbound = 0x28, ubound = 0x31\\\}.*"
+gdb_test "info register bnd3" ".*bnd3$test_string" "Pure bnd3 register"
+
+# Read value from registers bndrs.
+
+set test_string ".*\\\{lbound = 0xa, ubound_raw = 0x\[f\]+ec\\\}.*"
+gdb_test "info register bnd0raw" ".*bnd0$test_string" "Pure bnd0r register"
+
+set test_string ".*\\\{lbound = 0x14, ubound_raw = 0x\[f\]+e2\\\}.*"
+gdb_test "info register bnd1raw" ".*bnd1$test_string" "Pure bnd1r register"
+
+set test_string ".*\\\{lbound = 0x1e, ubound_raw = 0x\[f\]+d8\\\}.*"
+gdb_test "info register bnd2raw" ".*bnd2$test_string" "Pure bnd2r register"
+
+set test_string ".*\\\{lbound = 0x28, ubound_raw = 0x\[f\]+ce\\\}.*"
+gdb_test "info register bnd3raw" ".*bnd3$test_string" "Pure bnd3r register"
+
+# Setting fields on bnds
+set test_string ".*\\\{lbound = 0xa, ubound = 0x400\\\}.*"
+gdb_test "print \$bnd0.ubound = 0x400" "= \\\(void \\\*\\\) 0x400" "set value for bnd0.ubound"
+gdb_test "print \$bnd0" "$test_string" "after setting bnd0.ubound"
+set test_string ".*\\\{lbound = 0xa, ubound_raw = 0x\[f\]+bff\\\}.*"
+gdb_test "print /x \$bnd0raw" "$test_string" "bnd0raw after set bnd0.ubound"
+
+set test_string ".*\\\{lbound = 0x1, ubound = 0x400\\\}.*"
+gdb_test "print \$bnd0.lbound = 0x1" "= \\\(void \\\*\\\) 0x1" "set value for bnd0.lbound"
+gdb_test "print \$bnd0" "$test_string" "after setting bnd0.lbound"
+set test_string ".*\\\{lbound = 0x1, ubound_raw = 0x\[f\]+bff\\\}.*"
+gdb_test "print /x \$bnd0raw" "$test_string" "bnd0raw after set bnd0.lbound"
+
+# Setting fields on bnd0raw.
+set test_string ".*\\\{lbound = 0x1, ubound_raw = 0x600\\\}.*"
+gdb_test "print /x \$bnd0raw.ubound_raw = 0x600" "= 0x600" "set value for bnd0raw.ubound"
+gdb_test "print /x \$bnd0raw" "$test_string" "bnd0raw after setting bnd0raw.ubound"
+set test_string ".*\\\{lbound = 0x1, ubound = 0x\[f\]+9ff\\\}.*"
+gdb_test "print /x \$bnd0" "$test_string" "bnd0 after set bnd0raw.ubound"
+
+set test_string ".*\\\{lbound = 0x100, ubound_raw = 0x600\\\}.*"
+gdb_test "print /x \$bnd0raw.lbound = 0x100" "= 0x100" "set value for bnd0raw.lbound"
+gdb_test "print /x \$bnd0raw" "$test_string" "bnd0raw after setting bnd0raw.lbound"
+set test_string ".*\\\{lbound = 0x100, ubound = 0x\[f\]+9ff\\\}.*"
+gdb_test "print /x \$bnd0" "$test_string" "bnd0 after set bnd0raw.lbound"
+
+# Set full value bnd raw
+set test_string ".*\\\{lbound = 0x10, ubound_raw = 0x\[f\]+cff\\\}.*"
+gdb_test "print /x \$bnd0raw = {0x10, ~0x300}" "$test_string" "set full value for bnd0raw"
+set test_string ".*\\\{lbound = 0x10, ubound = 0x300\\\}.*"
+gdb_test "print /x \$bnd0" "$test_string" "bnd0raw after setting full bnd0raw"
+
+# Set full value bnd
+set test_string ".*\\\{lbound = 0x10, ubound = 0x300\\\}.*"
+gdb_test "print /x \$bnd0 = {0x10, 0x300}" "$test_string" "set full value for bnd0"
+set test_string ".*\\\{lbound = 0x10, ubound_raw = 0x\[f\]+cff\\\}.*"
+gdb_test "print /x \$bnd0raw" "$test_string" "bnd0raw after setting full bnd0"
+
+# Test bndcfg register and bndstatus after a failure on bndstr
+gdb_test "print \$bndstatus.status.error" "= 2" "bndstatus error is 2\
+after a failure on allocating an entry"
+
+# Going to test the python extension for lenght.
+if { [skip_python_tests] } { continue }
+# Verify if size is right
+set test_string ".*\\\: size 17.*"
+gdb_test "print /x \$bnd0 = {0x10, 0x20}" "$test_string" "verify size for bnd0"
+
+send_gdb "quit\n"
--
1.7.10.4
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH V7 0/8] Intel(R) MPX register support
@ 2013-10-09 12:01 Walfred Tedeschi
2013-10-09 12:01 ` [PATCH V7 8/8] Add MPX feature description to GDB manual Walfred Tedeschi
` (8 more replies)
0 siblings, 9 replies; 23+ messages in thread
From: Walfred Tedeschi @ 2013-10-09 12:01 UTC (permalink / raw)
To: tromey, mark.kettenis; +Cc: gdb-patches, Walfred Tedeschi
Mark and all,
I have noticed no feedback on this patch series.
Is there a major change that you would like to see in here?
Thanks a lot for your support,
Best regards,
-Fred
This patch series adds support for the Intel(R) Memory Protection
Extension MPX registers. Native and remote debugging are covered
by this patch.
New registers are bound registers known as bnd register (bnd0...bnd3),
a configuration register bndcfgu and a status register bndstatus. Bound
registers store pointer bounds, i.e. bound limits of a pointer. Bndstatus
and bndcfgu store information of the current status and configuration
of other MPX counterparts. For more information [1][2].
Design notes:
Bound register are represented in hardware as two fields of 64bits each,
both in 64bit and 32bit mode. The fields are lower bound and upper bound.
Upper bound value is a complement of one value of the upper limiting
address. To take this into account the bnd0...bnd3 are created as pseudo
registers while the hardware values are stored on bnd0raw...bnd3raw.
Ok to commit?
References:
[1] Intel(R) Architecture Instruction Set Extensions Programming Reference.
http://download-software.intel.com/sites/default/files/319433-015.pdf.
[2] http://software.intel.com/en-us/intel-isa-extensions.
Approvals:
Documentation (8/8) was approved by Eli.
Changes between V6 and V7:
* Fixed initialization of MPX registers in i386_gdbarch_init.
This fixed some regressions.
* Fixed indentation for macros on i386-xstate.h.
* Preserved symmetry of initializing the I386_LINUX_ORIG_EAX_REGNUM
using the way it was used formely by AVX.
Changes between V5 and V6:
* Removed some fields from gdbarch_tdep and added them as macros,
as indicated by Mark Kettenis.
* Fixed a comparison for XCR0 on gdbserver implementation.
Changes between V4 and V5:
* Improved text for MPX feature on gdb.texinfo following Eli indications.
* Fixed one table that still had ORIG_EAX and ORIG_RAX in the middle.
Changes between V3 and V4:
* Added NEWS entry for MPX.
* Improved text for MPX feature on gdb.texinfo.
* Fixed several ChangeLogs.
Changes between V2 and V3:
* Small changes on changelogs: "Add MPX support for i386" and "Add
support for MPX amd64".
* Add MPX feature documentation as extra patch.
Changes between V1 and V2:
* Folowing the Mark Kettenis feedback: Orig_rax and orig_eax are left as the
last register on the internal list.
* Ported gcc file used for cpuid and corrected overlooked condition to
detect MPX hardware while performing MPX related tests.
Walfred Tedeschi (8):
Fix conditions in creating a bitfield.
Add MPX registers XML files.
Add MPX support for i386
MPX for amd64
Add MPX support to gdbserver.
Add pretty-printer for MPX bnd registers.
Add MPX registers tests.
Add MPX feature description to GDB manual.
gdb/NEWS | 2 +
gdb/amd64-linux-nat.c | 43 ++++-
gdb/amd64-linux-tdep.c | 14 +-
gdb/amd64-linux-tdep.h | 4 +-
gdb/amd64-tdep.c | 16 ++
gdb/amd64-tdep.h | 8 +-
gdb/common/i386-gcc-cpuid.h | 8 +-
gdb/common/i386-xstate.h | 20 ++-
gdb/data-directory/Makefile.in | 1 +
gdb/doc/gdb.texinfo | 25 +++
gdb/features/Makefile | 38 ++++-
gdb/features/i386/32bit-mpx.xml | 43 +++++
gdb/features/i386/64bit-mpx.xml | 43 +++++
gdb/features/i386/amd64-mpx-linux.c | 211 ++++++++++++++++++++++++
gdb/features/i386/amd64-mpx-linux.xml | 19 +++
gdb/features/i386/amd64-mpx.c | 206 +++++++++++++++++++++++
gdb/features/i386/amd64-mpx.xml | 17 ++
gdb/features/i386/i386-mpx-linux.c | 187 +++++++++++++++++++++
gdb/features/i386/i386-mpx-linux.xml | 19 +++
gdb/features/i386/i386-mpx.c | 182 ++++++++++++++++++++
gdb/features/i386/i386-mpx.xml | 17 ++
gdb/features/i386/x32-mpx-linux.c | 211 ++++++++++++++++++++++++
gdb/features/i386/x32-mpx-linux.xml | 19 +++
gdb/features/i386/x32-mpx.c | 206 +++++++++++++++++++++++
gdb/features/i386/x32-mpx.xml | 17 ++
gdb/gdbserver/Makefile.in | 15 ++
gdb/gdbserver/configure.srv | 20 +--
gdb/gdbserver/i387-fp.c | 90 ++++++++++
gdb/gdbserver/linux-x86-low.c | 87 ++++++++--
gdb/i386-linux-nat.c | 17 +-
gdb/i386-linux-tdep.c | 9 +-
gdb/i386-linux-tdep.h | 4 +-
gdb/i386-tdep.c | 219 ++++++++++++++++++++++++-
gdb/i386-tdep.h | 24 ++-
gdb/i387-tdep.c | 130 ++++++++++++++-
gdb/i387-tdep.h | 9 +
gdb/python/lib/gdb/command/bound_registers.py | 45 +++++
gdb/regformats/i386/amd64-mpx-linux.dat | 84 ++++++++++
gdb/regformats/i386/amd64-mpx.dat | 83 ++++++++++
gdb/regformats/i386/i386-mpx-linux.dat | 60 +++++++
gdb/regformats/i386/i386-mpx.dat | 59 +++++++
gdb/regformats/i386/x32-mpx-linux.dat | 84 ++++++++++
gdb/regformats/i386/x32-mpx.dat | 83 ++++++++++
gdb/target-descriptions.c | 2 +-
gdb/testsuite/gdb.arch/i386-mpx.c | 92 +++++++++++
gdb/testsuite/gdb.arch/i386-mpx.exp | 142 ++++++++++++++++
gdb/testsuite/gdb.python/py-pp-maint.exp | 8 +-
gdb/testsuite/gdb.xml/maint_print_struct.xml | 1 +
48 files changed, 2871 insertions(+), 72 deletions(-)
create mode 100644 gdb/features/i386/32bit-mpx.xml
create mode 100644 gdb/features/i386/64bit-mpx.xml
create mode 100644 gdb/features/i386/amd64-mpx-linux.c
create mode 100644 gdb/features/i386/amd64-mpx-linux.xml
create mode 100644 gdb/features/i386/amd64-mpx.c
create mode 100644 gdb/features/i386/amd64-mpx.xml
create mode 100644 gdb/features/i386/i386-mpx-linux.c
create mode 100644 gdb/features/i386/i386-mpx-linux.xml
create mode 100644 gdb/features/i386/i386-mpx.c
create mode 100644 gdb/features/i386/i386-mpx.xml
create mode 100644 gdb/features/i386/x32-mpx-linux.c
create mode 100644 gdb/features/i386/x32-mpx-linux.xml
create mode 100644 gdb/features/i386/x32-mpx.c
create mode 100644 gdb/features/i386/x32-mpx.xml
create mode 100644 gdb/python/lib/gdb/command/bound_registers.py
create mode 100644 gdb/regformats/i386/amd64-mpx-linux.dat
create mode 100644 gdb/regformats/i386/amd64-mpx.dat
create mode 100644 gdb/regformats/i386/i386-mpx-linux.dat
create mode 100644 gdb/regformats/i386/i386-mpx.dat
create mode 100644 gdb/regformats/i386/x32-mpx-linux.dat
create mode 100644 gdb/regformats/i386/x32-mpx.dat
create mode 100644 gdb/testsuite/gdb.arch/i386-mpx.c
create mode 100644 gdb/testsuite/gdb.arch/i386-mpx.exp
--
1.7.10.4
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH V7 6/8] Add pretty-printer for MPX bnd registers.
2013-10-09 12:01 [PATCH V7 0/8] Intel(R) MPX register support Walfred Tedeschi
` (3 preceding siblings ...)
2013-10-09 12:01 ` [PATCH V7 4/8] MPX for amd64 Walfred Tedeschi
@ 2013-10-09 12:01 ` Walfred Tedeschi
2013-10-09 12:01 ` [PATCH V7 7/8] Add MPX registers tests Walfred Tedeschi
` (3 subsequent siblings)
8 siblings, 0 replies; 23+ messages in thread
From: Walfred Tedeschi @ 2013-10-09 12:01 UTC (permalink / raw)
To: tromey, mark.kettenis; +Cc: gdb-patches, Walfred Tedeschi
Boundary length is simpler implemented by means of a pretty
printer. This simplifies users life when examining a bound register.
Changelog:
2012-10-16 Walfred Tedeschi <walfred.tedeschi@intel.com>
* python/lib/gdb/command/bound_register.py: New file.
* gdb/data-directory/Makefile.in: copy bond_register.py to the right path to
be initialized at gdb startup.
testsuite/
* gdb.python/py-pp-maint.exp: Consider new pretty-print added for registers.
---
gdb/data-directory/Makefile.in | 1 +
gdb/python/lib/gdb/command/bound_registers.py | 45 +++++++++++++++++++++++++
gdb/testsuite/gdb.python/py-pp-maint.exp | 8 ++---
3 files changed, 50 insertions(+), 4 deletions(-)
create mode 100644 gdb/python/lib/gdb/command/bound_registers.py
diff --git a/gdb/data-directory/Makefile.in b/gdb/data-directory/Makefile.in
index 3d05213..1e00c58 100644
--- a/gdb/data-directory/Makefile.in
+++ b/gdb/data-directory/Makefile.in
@@ -61,6 +61,7 @@ PYTHON_FILES = \
gdb/types.py \
gdb/printing.py \
gdb/prompt.py \
+ gdb/command/bound_registers.py \
gdb/command/__init__.py \
gdb/command/frame_filters.py \
gdb/command/type_printers.py \
diff --git a/gdb/python/lib/gdb/command/bound_registers.py b/gdb/python/lib/gdb/command/bound_registers.py
new file mode 100644
index 0000000..0b1baf6
--- /dev/null
+++ b/gdb/python/lib/gdb/command/bound_registers.py
@@ -0,0 +1,45 @@
+# Pretty-printer utilities.
+# Copyright (C) 2013 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+import gdb.printing
+
+class BoundPrinter:
+ """Adds size field to a _rawbound128 type."""
+
+ def __init__ (self, val):
+ self.val = val
+
+ def to_string (self):
+ upper = self.val["ubound"]
+ lower = self.val["lbound"]
+ size = (long) ((upper) - (lower))
+ if size > -1:
+ size = size + 1
+ result = '{lbound = %s, ubound = %s} : size %s' % (lower, upper, size)
+ return result
+
+# There are two pattern matching used: first one is related to a library
+# second is related to the type. Since we are displaying a register all
+# libraries are accepted. Type to be processed is the same present
+# in the xml file.
+
+def build_pretty_printer ():
+ pp = gdb.printing.RegexpCollectionPrettyPrinter (".*")
+ pp.add_printer ('bound', '^__gdb_builtin_type_bound128', BoundPrinter)
+ return pp
+
+gdb.printing.register_pretty_printer (gdb.current_objfile (),
+ build_pretty_printer ())
diff --git a/gdb/testsuite/gdb.python/py-pp-maint.exp b/gdb/testsuite/gdb.python/py-pp-maint.exp
index 4b5ef5a..023d55f 100644
--- a/gdb/testsuite/gdb.python/py-pp-maint.exp
+++ b/gdb/testsuite/gdb.python/py-pp-maint.exp
@@ -60,7 +60,7 @@ gdb_test "print flt" " = x=<42> y=<43>" \
gdb_test "print ss" " = a=<a=<1> b=<$hex>> b=<a=<2> b=<$hex>>" \
"print ss enabled #1"
-set num_pp 6
+set num_pp 7
gdb_test "disable pretty-printer" \
"$num_pp printers disabled.*0 of $num_pp printers enabled"
@@ -78,7 +78,7 @@ gdb_test "disable pretty-printer global lookup_function_lookup_test" \
"1 printer disabled.*[expr $num_pp - 1] of $num_pp printers enabled"
gdb_test "disable pretty-printer global pp-test;.*" \
- "[expr $num_pp - 1] printers disabled.*0 of $num_pp printers enabled"
+ "[expr $num_pp - 2] printers disabled.*1 of $num_pp printers enabled"
gdb_test "info pretty-printer global .*function" \
{.*function_lookup_test \[disabled\].*}
@@ -93,13 +93,13 @@ gdb_test "print ss" " = {a = {a = 1, b = $hex}, b = {a = 2, b = $hex}}" \
"print ss disabled"
gdb_test "enable pretty-printer global lookup_function_lookup_test" \
- "1 printer enabled.*1 of $num_pp printers enabled"
+ "1 printer enabled.*2 of $num_pp printers enabled"
# This doesn't enable any printers because each subprinter in the collection
# is still individually disabled. But this is still needed, to enable the
# collection itself.
gdb_test "enable pretty-printer global pp-test" \
- "0 printers enabled.*1 of $num_pp printers enabled"
+ "0 printers enabled.*2 of $num_pp printers enabled"
gdb_test "enable pretty-printer global pp-test;.*ss.*" \
"2 printers enabled.*[expr $num_pp - 3] of $num_pp printers enabled"
--
1.7.10.4
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH V7 1/8] Fix conditions in creating a bitfield.
2013-10-09 12:01 [PATCH V7 0/8] Intel(R) MPX register support Walfred Tedeschi
` (5 preceding siblings ...)
2013-10-09 12:01 ` [PATCH V7 7/8] Add MPX registers tests Walfred Tedeschi
@ 2013-10-09 12:01 ` Walfred Tedeschi
2013-10-09 12:02 ` [PATCH V7 2/8] Add MPX registers XML files Walfred Tedeschi
2013-10-20 19:23 ` [PATCH V7 0/8] Intel(R) MPX register support Mark Kettenis
8 siblings, 0 replies; 23+ messages in thread
From: Walfred Tedeschi @ 2013-10-09 12:01 UTC (permalink / raw)
To: tromey, mark.kettenis; +Cc: gdb-patches, Walfred Tedeschi
Bitfields are represented by intervals [start, begin]. It means that for an
interval comprised by only one bit start and end will be equal.
The present condition does not always hold. On the other hand in target-description.c
(tdesc_gdb_type) bitfield is created when "f->type" is null. The routine
maint_print_maint_print_c_tdesc_cmd is modified to follow the same strategy.
2013-07-31 Walfred Tedeschi <walfred.tedeschi@intel.com>
* target-descriptions.c (maint_print_maint_print_c_tdesc_cmd):
Modified logic of creating a bitfield to be in sync with
tdesc_gdb_type.
testsuite/
* gdb.xml/maint_print_struct.xml (bitfield): Added bitfield having
start and end equal 0.
---
gdb/target-descriptions.c | 2 +-
gdb/testsuite/gdb.xml/maint_print_struct.xml | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/gdb/target-descriptions.c b/gdb/target-descriptions.c
index 44ad401..1410c02 100644
--- a/gdb/target-descriptions.c
+++ b/gdb/target-descriptions.c
@@ -1762,7 +1762,7 @@ feature = tdesc_create_feature (result, \"%s\");\n",
/* Going first for implicitly sized types, else part handles
bitfields. As reported on xml-tdesc.c implicitly sized types
cannot contain a bitfield. */
- if (f->start == 0 && f->end == 0)
+ if (f->type != NULL)
{
printf_unfiltered
(" field_type = tdesc_named_type (feature, \"%s\");\n",
diff --git a/gdb/testsuite/gdb.xml/maint_print_struct.xml b/gdb/testsuite/gdb.xml/maint_print_struct.xml
index 5ef0683..deac300 100644
--- a/gdb/testsuite/gdb.xml/maint_print_struct.xml
+++ b/gdb/testsuite/gdb.xml/maint_print_struct.xml
@@ -15,6 +15,7 @@
</struct>
<struct id="bitfield" size="8">
+ <field name="field0" start="0" end="0"/>
<field name="field1" start="24" end="63"/>
<field name="field2" start="16" end="24"/>
</struct>
--
1.7.10.4
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH V7 8/8] Add MPX feature description to GDB manual.
2013-10-09 12:01 [PATCH V7 0/8] Intel(R) MPX register support Walfred Tedeschi
@ 2013-10-09 12:01 ` Walfred Tedeschi
2013-11-18 20:26 ` Pedro Alves
2013-10-09 12:01 ` [PATCH V7 5/8] Add MPX support to gdbserver Walfred Tedeschi
` (7 subsequent siblings)
8 siblings, 1 reply; 23+ messages in thread
From: Walfred Tedeschi @ 2013-10-09 12:01 UTC (permalink / raw)
To: tromey, mark.kettenis; +Cc: gdb-patches, Walfred Tedeschi
Describes MPX feature registers including bnd0raw ... bnd3raw, bnd0 ... bnd3
bndstatus and bndcfgu. News adds the section for Intel(R) Architecture
Instructions Extensions and mention the MPX support.
2013-08-30 Walfred Tedeschi <walfred.tedeschi>
* NEWS: Add section for Intel(R) Architecture Instructions
Extesions mentioning MPX.
doc/
* gdb.texinfo (i386 Features): Add MPX feature.
---
gdb/NEWS | 2 ++
gdb/doc/gdb.texinfo | 25 +++++++++++++++++++++++++
2 files changed, 27 insertions(+)
diff --git a/gdb/NEWS b/gdb/NEWS
index 8114fb1..ef6592f 100644
--- a/gdb/NEWS
+++ b/gdb/NEWS
@@ -5522,3 +5522,5 @@ GDB now handles cross debugging. If you are remotely debugging between
two different machines, type ``./configure host -target=targ''.
Host is the machine where GDB will run; targ is the machine
where the program that you are debugging will run.
+
+ * GDB now supports access to Intel(R) MPX registers on GNU/Linux.
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index e196658..d787050 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -42740,6 +42740,31 @@ describe the upper 128 bits of @sc{ymm} registers:
@samp{ymm0h} through @samp{ymm15h} for amd64
@end itemize
+The @samp{org.gnu.gdb.i386.mpx} is an optional feature representing Intel(R)
+Memory Protection Extension (MPX). MPX adds the bound registers @samp{BND0}
+@footnote{Capital letters were used to distinguish between architecture
+registers and pseudo registers. A set of pseudo register for the bound
+registers were created to simplify the display.} through @samp{BND3}. Bound
+registers store a pair of 64-bit values which are the lower bound and upper
+bound. Bounds are effective addresses or memory locations. The upper bounds
+are architecturally represented in 1's complement form. A bound having lower
+bound = 0, and upper bound = 0 (1's complement of all bits set) will allow
+access to the entire address space.
+
+In order to take the upper bound complement
+of one into account the @samp{BND0} through @samp{BND3} are described in GDB
+as @samp{bnd0raw} through @samp{bnd3raw}. Pseudo registers @samp{bnd0} through
+@samp{bnd3} display the upper bound performing the complement of one operation,
+i.e.@ when upper bound in @samp{bnd0raw} is 0 in the GDB @samp{bnd0} it will be
+@code{0xfff...}. The feature adds the following registers:
+
+@itemize @minus
+@item
+@samp{bnd0raw} through @samp{bnd3raw} for i386, amd64 and x32.
+@item
+@samp{bndcfgu} and @samp{bndstatus} for i386, amd64 and x32.
+@end itemize
+
The @samp{org.gnu.gdb.i386.linux} feature is optional. It should
describe a single register, @samp{orig_eax}.
--
1.7.10.4
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH V7 2/8] Add MPX registers XML files.
2013-10-09 12:01 [PATCH V7 0/8] Intel(R) MPX register support Walfred Tedeschi
` (6 preceding siblings ...)
2013-10-09 12:01 ` [PATCH V7 1/8] Fix conditions in creating a bitfield Walfred Tedeschi
@ 2013-10-09 12:02 ` Walfred Tedeschi
2013-10-20 19:23 ` [PATCH V7 0/8] Intel(R) MPX register support Mark Kettenis
8 siblings, 0 replies; 23+ messages in thread
From: Walfred Tedeschi @ 2013-10-09 12:02 UTC (permalink / raw)
To: tromey, mark.kettenis; +Cc: gdb-patches, Walfred Tedeschi
2013-14-06 Walfred Tedeschi <walfred.tedeschi@intel.com>
* features/i386/Makefile: Adapts for using MPX registers.
* features/i386/32bit-mpx.xml: New file.
* features/i386/64bit-mpx.xml: Likewise.
* features/i386/amd64-avx-linux.c: Likewise.
* features/i386/amd64-avx-linux.xml: Likewise.
* features/i386/amd64-avx.c: Likewise.
* features/i386/amd64-avx.xml: Likewise.
* features/i386/i386-avx-linux.c: Likewise.
* features/i386/i386-avx-linux.xml: Likewise.
* features/i386/i386-avx.c: Likewise.
* features/i386/i386-avx.xml: Likewise.
* features/i386/x32-avx-linux.xml: Likewise.
* features/i386/x32-avx-linux.c: Likewise.
* features/i386/x32-avx.c: Likewise.
* features/i386/x32-avx.xml: Likewise.
* regformats/i386/amd64-avx-linux.dat: New file.
* regformats/i386/amd64-avx.dat: Likewise.
* regformats/i386/i386-avx-linux.dat: Likewise.
* regformats/i386/i386-avx.dat: Likewise.
* regformats/i386/x32-avx.dat: Likewise.
* regformats/i386/x32-avx-linux.dat: Likewise.
---
gdb/features/Makefile | 38 +++++-
gdb/features/i386/32bit-mpx.xml | 43 +++++++
gdb/features/i386/64bit-mpx.xml | 43 +++++++
gdb/features/i386/amd64-mpx-linux.c | 211 +++++++++++++++++++++++++++++++
gdb/features/i386/amd64-mpx-linux.xml | 19 +++
gdb/features/i386/amd64-mpx.c | 206 ++++++++++++++++++++++++++++++
gdb/features/i386/amd64-mpx.xml | 17 +++
gdb/features/i386/i386-mpx-linux.c | 187 +++++++++++++++++++++++++++
gdb/features/i386/i386-mpx-linux.xml | 19 +++
gdb/features/i386/i386-mpx.c | 182 ++++++++++++++++++++++++++
gdb/features/i386/i386-mpx.xml | 17 +++
gdb/features/i386/x32-mpx-linux.c | 211 +++++++++++++++++++++++++++++++
gdb/features/i386/x32-mpx-linux.xml | 19 +++
gdb/features/i386/x32-mpx.c | 206 ++++++++++++++++++++++++++++++
gdb/features/i386/x32-mpx.xml | 17 +++
gdb/regformats/i386/amd64-mpx-linux.dat | 84 ++++++++++++
gdb/regformats/i386/amd64-mpx.dat | 83 ++++++++++++
gdb/regformats/i386/i386-mpx-linux.dat | 60 +++++++++
gdb/regformats/i386/i386-mpx.dat | 59 +++++++++
gdb/regformats/i386/x32-mpx-linux.dat | 84 ++++++++++++
gdb/regformats/i386/x32-mpx.dat | 83 ++++++++++++
21 files changed, 1884 insertions(+), 4 deletions(-)
create mode 100644 gdb/features/i386/32bit-mpx.xml
create mode 100644 gdb/features/i386/64bit-mpx.xml
create mode 100644 gdb/features/i386/amd64-mpx-linux.c
create mode 100644 gdb/features/i386/amd64-mpx-linux.xml
create mode 100644 gdb/features/i386/amd64-mpx.c
create mode 100644 gdb/features/i386/amd64-mpx.xml
create mode 100644 gdb/features/i386/i386-mpx-linux.c
create mode 100644 gdb/features/i386/i386-mpx-linux.xml
create mode 100644 gdb/features/i386/i386-mpx.c
create mode 100644 gdb/features/i386/i386-mpx.xml
create mode 100644 gdb/features/i386/x32-mpx-linux.c
create mode 100644 gdb/features/i386/x32-mpx-linux.xml
create mode 100644 gdb/features/i386/x32-mpx.c
create mode 100644 gdb/features/i386/x32-mpx.xml
create mode 100644 gdb/regformats/i386/amd64-mpx-linux.dat
create mode 100644 gdb/regformats/i386/amd64-mpx.dat
create mode 100644 gdb/regformats/i386/i386-mpx-linux.dat
create mode 100644 gdb/regformats/i386/i386-mpx.dat
create mode 100644 gdb/regformats/i386/x32-mpx-linux.dat
create mode 100644 gdb/regformats/i386/x32-mpx.dat
diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index f311c4e..c0bc0de 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -37,9 +37,12 @@ WHICH = aarch64 \
i386/i386-mmx i386/i386-mmx-linux \
i386/amd64 i386/amd64-linux \
i386/i386-avx i386/i386-avx-linux \
+ i386/i386-mpx i386/i386-mpx-linux \
i386/amd64-avx i386/amd64-avx-linux \
+ i386/amd64-mpx i386/amd64-mpx-linux \
i386/x32 i386/x32-linux \
i386/x32-avx i386/x32-avx-linux \
+ i386/x32-mpx i386/x32-mpx-linux \
mips-linux mips-dsp-linux \
mips64-linux mips64-dsp-linux \
nios2-linux \
@@ -63,14 +66,20 @@ i386/amd64-expedite = rbp,rsp,rip
i386/amd64-linux-expedite = rbp,rsp,rip
i386/i386-avx-expedite = ebp,esp,eip
i386/i386-avx-linux-expedite = ebp,esp,eip
+i386/i386-mpx-expedite = ebp,esp,eip
+i386/i386-mpx-linux-expedite = ebp,esp,eip
i386/i386-mmx-expedite = ebp,esp,eip
i386/i386-mmx-linux-expedite = ebp,esp,eip
i386/amd64-avx-expedite = rbp,rsp,rip
i386/amd64-avx-linux-expedite = rbp,rsp,rip
+i386/amd64-mpx-expedite = rbp,rsp,rip
+i386/amd64-mpx-linux-expedite = rbp,rsp,rip
i386/x32-expedite = rbp,rsp,rip
i386/x32-linux-expedite = rbp,rsp,rip
i386/x32-avx-expedite = rbp,rsp,rip
i386/x32-avx-linux-expedite = rbp,rsp,rip
+i386/x32-mpx-expedite = rbp,rsp,rip
+i386/x32-mpx-linux-expedite = rbp,rsp,rip
mips-expedite = r29,pc
mips-dsp-expedite = r29,pc
mips64-expedite = r29,pc
@@ -132,18 +141,39 @@ $(outdir)/i386/i386-linux.dat: i386/32bit-core.xml i386/32bit-sse.xml \
i386/32bit-linux.xml
$(outdir)/i386/amd64.dat: i386/64bit-core.xml i386/64bit-sse.xml
$(outdir)/i386/amd64-linux.dat: i386/64bit-core.xml i386/64bit-sse.xml \
- i386/64bit-linux.xml
+ i386/64bit-linux.xml
$(outdir)/i386/i386-avx.dat: i386/32bit-core.xml i386/32bit-avx.xml
$(outdir)/i386/i386-avx-linux.dat: i386/32bit-core.xml i386/32bit-avx.xml \
i386/32bit-linux.xml
+$(outdir)/i386/i386-mpx.dat: i386/32bit-core.xml i386/32bit-avx.xml \
+ i386/32bit-mpx.xml
+$(outdir)/i386/i386-mpx-linux.dat: i386/32bit-core.xml i386/32bit-avx.xml \
+ i386/32bit-linux.xml i386/32bit-mpx.xml
$(outdir)/i386/i386-mmx.dat: i386/32bit-core.xml
$(outdir)/i386/i386-mmx-linux.dat: i386/32bit-core.xml i386/32bit-linux.xml
$(outdir)/i386/amd64-avx.dat: i386/64bit-core.xml i386/64bit-avx.xml
$(outdir)/i386/amd64-avx-linux.dat: i386/64bit-core.xml i386/64bit-avx.xml \
- i386/64bit-linux.xml
+ i386/64bit-linux.xml
+$(outdir)/i386/amd64-mpx-linux.dat: i386/64bit-core.xml i386/64bit-avx.xml \
+ i386/64bit-linux.xml i386/64bit-mpx.xml
+$(outdir)/i386/amd64-mpx.dat: i386/64bit-core.xml i386/64bit-avx.xml \
+ i386/64bit-mpx.xml
$(outdir)/i386/x32.dat: i386/x32-core.xml i386/64bit-sse.xml
$(outdir)/i386/x32-linux.dat: i386/x32-core.xml i386/64bit-sse.xml \
- i386/64bit-linux.xml
+ i386/64bit-linux.xml
$(outdir)/i386/x32-avx.dat: i386/x32-core.xml i386/64bit-avx.xml
$(outdir)/i386/x32-avx-linux.dat: i386/x32-core.xml i386/64bit-avx.xml \
- i386/64bit-linux.xml
+ i386/64bit-linux.xml
+$(outdir)/i386/amd64-mpx.dat: i386/64bit-core.xml i386/64bit-avx.xml \
+ i386/64bit-mpx.xml
+$(outdir)/i386/amd64-mpx-linux.dat: i386/64bit-core.xml i386/64bit-avx.xml \
+ i386/64bit-linux.xml i386/64bit-mpx.xml
+$(outdir)/i386/x32.dat: i386/x32-core.xml i386/64bit-sse.xml
+$(outdir)/i386/x32-linux.dat: i386/x32-core.xml i386/64bit-sse.xml \
+ i386/64bit-linux.xml
+$(outdir)/i386/x32-avx.dat: i386/x32-core.xml i386/64bit-avx.xml
+$(outdir)/i386/x32-avx-linux.dat: i386/x32-core.xml i386/64bit-avx.xml \
+ i386/64bit-linux.xml
+$(outdir)/i386/x32-mpx.dat: i386/x32-core.xml i386/64bit-avx.xml i386/64bit-mpx.xml
+$(outdir)/i386/x32-mpx-linux.dat: i386/x32-core.xml i386/64bit-avx.xml \
+ i386/64bit-linux.xml i386/64bit-mpx.xml
diff --git a/gdb/features/i386/32bit-mpx.xml b/gdb/features/i386/32bit-mpx.xml
new file mode 100644
index 0000000..80d9948
--- /dev/null
+++ b/gdb/features/i386/32bit-mpx.xml
@@ -0,0 +1,43 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2013 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.i386.mpx">
+ <struct id="br128">
+ <field name="lbound" type="uint64"/>
+ <field name="ubound_raw" type="uint64"/>
+ </struct>
+
+ <struct id="_bndstatus" size="8">
+ <field name="bde" start="2" end="31"/>
+ <field name="error" start="0" end="1"/>
+ </struct>
+
+ <union id="status">
+ <field name="raw" type="data_ptr"/>
+ <field name="status" type="_bndstatus"/>
+ </union>
+
+ <struct id="_bndcfgu" size="8">
+ <field name="base" start="12" end="31" />
+ <field name="reserved" start="2" end="11"/>
+ <field name="preserved" start="1" end="1"/>
+ <field name="enabled" start="0" end="1"/>
+ </struct>
+
+ <union id="cfgu">
+ <field name="raw" type="data_ptr"/>
+ <field name="config" type="_bndcfgu"/>
+ </union>
+
+ <reg name="bnd0raw" bitsize="128" type="br128"/>
+ <reg name="bnd1raw" bitsize="128" type="br128"/>
+ <reg name="bnd2raw" bitsize="128" type="br128"/>
+ <reg name="bnd3raw" bitsize="128" type="br128"/>
+ <reg name="bndcfgu" bitsize="64" type="cfgu"/>
+ <reg name="bndstatus" bitsize="64" type="status"/>
+</feature>
diff --git a/gdb/features/i386/64bit-mpx.xml b/gdb/features/i386/64bit-mpx.xml
new file mode 100644
index 0000000..2691b17
--- /dev/null
+++ b/gdb/features/i386/64bit-mpx.xml
@@ -0,0 +1,43 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2013 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.i386.mpx">
+ <struct id="br128">
+ <field name="lbound" type="uint64"/>
+ <field name="ubound_raw" type="uint64"/>
+ </struct>
+
+ <struct id="_bndstatus" size="8">
+ <field name="bde" start="2" end="63"/>
+ <field name="error" start="0" end="1"/>
+ </struct>
+
+ <union id="status">
+ <field name="raw" type="data_ptr"/>
+ <field name="status" type="_bndstatus"/>
+ </union>
+
+ <struct id="_bndcfgu" size="8">
+ <field name="base" start="12" end="63"/>
+ <field name="reserved" start="2" end="11"/>
+ <field name="preserved" start="1" end="1"/>
+ <field name="enabled" start="0" end="0"/>
+ </struct>
+
+ <union id="cfgu">
+ <field name="raw" type="data_ptr"/>
+ <field name="config" type="_bndcfgu"/>
+ </union>
+
+ <reg name="bnd0raw" bitsize="128" type="br128"/>
+ <reg name="bnd1raw" bitsize="128" type="br128"/>
+ <reg name="bnd2raw" bitsize="128" type="br128"/>
+ <reg name="bnd3raw" bitsize="128" type="br128"/>
+ <reg name="bndcfgu" bitsize="64" type="cfgu"/>
+ <reg name="bndstatus" bitsize="64" type="status"/>
+</feature>
diff --git a/gdb/features/i386/amd64-mpx-linux.c b/gdb/features/i386/amd64-mpx-linux.c
new file mode 100644
index 0000000..86a1774
--- /dev/null
+++ b/gdb/features/i386/amd64-mpx-linux.c
@@ -0,0 +1,211 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: amd64-mpx-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_amd64_mpx_linux;
+static void
+initialize_tdesc_amd64_mpx_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("i386:x86-64"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core");
+ field_type = tdesc_create_flags (feature, "i386_eflags", 4);
+ tdesc_add_flag (field_type, 0, "CF");
+ tdesc_add_flag (field_type, 1, "");
+ tdesc_add_flag (field_type, 2, "PF");
+ tdesc_add_flag (field_type, 4, "AF");
+ tdesc_add_flag (field_type, 6, "ZF");
+ tdesc_add_flag (field_type, 7, "SF");
+ tdesc_add_flag (field_type, 8, "TF");
+ tdesc_add_flag (field_type, 9, "IF");
+ tdesc_add_flag (field_type, 10, "DF");
+ tdesc_add_flag (field_type, 11, "OF");
+ tdesc_add_flag (field_type, 14, "NT");
+ tdesc_add_flag (field_type, 16, "RF");
+ tdesc_add_flag (field_type, 17, "VM");
+ tdesc_add_flag (field_type, 18, "AC");
+ tdesc_add_flag (field_type, 19, "VIF");
+ tdesc_add_flag (field_type, 20, "VIP");
+ tdesc_add_flag (field_type, 21, "ID");
+
+ tdesc_create_reg (feature, "rax", 0, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbx", 1, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rcx", 2, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdx", 3, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rsi", 4, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdi", 5, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbp", 6, 1, NULL, 64, "data_ptr");
+ tdesc_create_reg (feature, "rsp", 7, 1, NULL, 64, "data_ptr");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rip", 16, 1, NULL, 64, "code_ptr");
+ tdesc_create_reg (feature, "eflags", 17, 1, NULL, 32, "i386_eflags");
+ tdesc_create_reg (feature, "cs", 18, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ss", 19, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ds", 20, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "es", 21, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "fs", 22, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "gs", 23, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "st0", 24, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st1", 25, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st2", 26, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st3", 27, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st4", 28, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st5", 29, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st6", 30, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st7", 31, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "fctrl", 32, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fstat", 33, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "ftag", 34, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fiseg", 35, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fioff", 36, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "foseg", 37, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fooff", 38, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fop", 39, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_create_flags (feature, "i386_mxcsr", 4);
+ tdesc_add_flag (field_type, 0, "IE");
+ tdesc_add_flag (field_type, 1, "DE");
+ tdesc_add_flag (field_type, 2, "ZE");
+ tdesc_add_flag (field_type, 3, "OE");
+ tdesc_add_flag (field_type, 4, "UE");
+ tdesc_add_flag (field_type, 5, "PE");
+ tdesc_add_flag (field_type, 6, "DAZ");
+ tdesc_add_flag (field_type, 7, "IM");
+ tdesc_add_flag (field_type, 8, "DM");
+ tdesc_add_flag (field_type, 9, "ZM");
+ tdesc_add_flag (field_type, 10, "OM");
+ tdesc_add_flag (field_type, 11, "UM");
+ tdesc_add_flag (field_type, 12, "PM");
+ tdesc_add_flag (field_type, 15, "FZ");
+
+ tdesc_create_reg (feature, "xmm0", 40, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm1", 41, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm2", 42, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm3", 43, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm4", 44, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm5", 45, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm6", 46, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm7", 47, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm8", 48, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm9", 49, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm10", 50, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm11", 51, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm12", 52, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm13", 53, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm14", 54, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm15", 55, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "mxcsr", 56, 1, "vector", 32, "i386_mxcsr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.linux");
+ tdesc_create_reg (feature, "orig_rax", 57, 1, NULL, 64, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx");
+ tdesc_create_reg (feature, "ymm0h", 58, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm1h", 59, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm2h", 60, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm3h", 61, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm4h", 62, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm5h", 63, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm6h", 64, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm7h", 65, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm8h", 66, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm9h", 67, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm10h", 68, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm11h", 69, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm12h", 70, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm13h", 71, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm14h", 72, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm15h", 73, 1, NULL, 128, "uint128");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
+ type = tdesc_create_struct (feature, "br128");
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "lbound", field_type);
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "ubound_raw", field_type);
+
+ type = tdesc_create_struct (feature, "_bndstatus");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "bde", 2, 63);
+ tdesc_add_bitfield (type, "error", 0, 1);
+
+ type = tdesc_create_union (feature, "status");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndstatus");
+ tdesc_add_field (type, "status", field_type);
+
+ type = tdesc_create_struct (feature, "_bndcfgu");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "base", 12, 63);
+ tdesc_add_bitfield (type, "reserved", 2, 11);
+ tdesc_add_bitfield (type, "preserved", 1, 1);
+ tdesc_add_bitfield (type, "enabled", 0, 0);
+
+ type = tdesc_create_union (feature, "cfgu");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndcfgu");
+ tdesc_add_field (type, "config", field_type);
+
+ tdesc_create_reg (feature, "bnd0raw", 74, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd1raw", 75, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd2raw", 76, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd3raw", 77, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bndcfgu", 78, 1, NULL, 64, "cfgu");
+ tdesc_create_reg (feature, "bndstatus", 79, 1, NULL, 64, "status");
+
+ tdesc_amd64_mpx_linux = result;
+}
diff --git a/gdb/features/i386/amd64-mpx-linux.xml b/gdb/features/i386/amd64-mpx-linux.xml
new file mode 100644
index 0000000..73b9043
--- /dev/null
+++ b/gdb/features/i386/amd64-mpx-linux.xml
@@ -0,0 +1,19 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2013 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- AMD64 with MPX - Includes Linux-only special "register". -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>i386:x86-64</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="64bit-core.xml"/>
+ <xi:include href="64bit-sse.xml"/>
+ <xi:include href="64bit-linux.xml"/>
+ <xi:include href="64bit-avx.xml"/>
+ <xi:include href="64bit-mpx.xml"/>
+</target>
diff --git a/gdb/features/i386/amd64-mpx.c b/gdb/features/i386/amd64-mpx.c
new file mode 100644
index 0000000..15ae5f7
--- /dev/null
+++ b/gdb/features/i386/amd64-mpx.c
@@ -0,0 +1,206 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: amd64-mpx.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_amd64_mpx;
+static void
+initialize_tdesc_amd64_mpx (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("i386:x86-64"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core");
+ field_type = tdesc_create_flags (feature, "i386_eflags", 4);
+ tdesc_add_flag (field_type, 0, "CF");
+ tdesc_add_flag (field_type, 1, "");
+ tdesc_add_flag (field_type, 2, "PF");
+ tdesc_add_flag (field_type, 4, "AF");
+ tdesc_add_flag (field_type, 6, "ZF");
+ tdesc_add_flag (field_type, 7, "SF");
+ tdesc_add_flag (field_type, 8, "TF");
+ tdesc_add_flag (field_type, 9, "IF");
+ tdesc_add_flag (field_type, 10, "DF");
+ tdesc_add_flag (field_type, 11, "OF");
+ tdesc_add_flag (field_type, 14, "NT");
+ tdesc_add_flag (field_type, 16, "RF");
+ tdesc_add_flag (field_type, 17, "VM");
+ tdesc_add_flag (field_type, 18, "AC");
+ tdesc_add_flag (field_type, 19, "VIF");
+ tdesc_add_flag (field_type, 20, "VIP");
+ tdesc_add_flag (field_type, 21, "ID");
+
+ tdesc_create_reg (feature, "rax", 0, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbx", 1, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rcx", 2, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdx", 3, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rsi", 4, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdi", 5, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbp", 6, 1, NULL, 64, "data_ptr");
+ tdesc_create_reg (feature, "rsp", 7, 1, NULL, 64, "data_ptr");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rip", 16, 1, NULL, 64, "code_ptr");
+ tdesc_create_reg (feature, "eflags", 17, 1, NULL, 32, "i386_eflags");
+ tdesc_create_reg (feature, "cs", 18, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ss", 19, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ds", 20, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "es", 21, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "fs", 22, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "gs", 23, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "st0", 24, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st1", 25, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st2", 26, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st3", 27, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st4", 28, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st5", 29, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st6", 30, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st7", 31, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "fctrl", 32, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fstat", 33, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "ftag", 34, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fiseg", 35, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fioff", 36, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "foseg", 37, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fooff", 38, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fop", 39, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_create_flags (feature, "i386_mxcsr", 4);
+ tdesc_add_flag (field_type, 0, "IE");
+ tdesc_add_flag (field_type, 1, "DE");
+ tdesc_add_flag (field_type, 2, "ZE");
+ tdesc_add_flag (field_type, 3, "OE");
+ tdesc_add_flag (field_type, 4, "UE");
+ tdesc_add_flag (field_type, 5, "PE");
+ tdesc_add_flag (field_type, 6, "DAZ");
+ tdesc_add_flag (field_type, 7, "IM");
+ tdesc_add_flag (field_type, 8, "DM");
+ tdesc_add_flag (field_type, 9, "ZM");
+ tdesc_add_flag (field_type, 10, "OM");
+ tdesc_add_flag (field_type, 11, "UM");
+ tdesc_add_flag (field_type, 12, "PM");
+ tdesc_add_flag (field_type, 15, "FZ");
+
+ tdesc_create_reg (feature, "xmm0", 40, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm1", 41, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm2", 42, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm3", 43, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm4", 44, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm5", 45, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm6", 46, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm7", 47, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm8", 48, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm9", 49, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm10", 50, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm11", 51, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm12", 52, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm13", 53, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm14", 54, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm15", 55, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "mxcsr", 56, 1, "vector", 32, "i386_mxcsr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx");
+ tdesc_create_reg (feature, "ymm0h", 57, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm1h", 58, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm2h", 59, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm3h", 60, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm4h", 61, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm5h", 62, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm6h", 63, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm7h", 64, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm8h", 65, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm9h", 66, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm10h", 67, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm11h", 68, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm12h", 69, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm13h", 70, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm14h", 71, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm15h", 72, 1, NULL, 128, "uint128");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
+ type = tdesc_create_struct (feature, "br128");
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "lbound", field_type);
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "ubound_raw", field_type);
+
+ type = tdesc_create_struct (feature, "_bndstatus");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "bde", 2, 63);
+ tdesc_add_bitfield (type, "error", 0, 1);
+
+ type = tdesc_create_union (feature, "status");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndstatus");
+ tdesc_add_field (type, "status", field_type);
+
+ type = tdesc_create_struct (feature, "_bndcfgu");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "base", 12, 63);
+ tdesc_add_bitfield (type, "reserved", 2, 11);
+ tdesc_add_bitfield (type, "preserved", 1, 1);
+ tdesc_add_bitfield (type, "enabled", 0, 0);
+
+ type = tdesc_create_union (feature, "cfgu");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndcfgu");
+ tdesc_add_field (type, "config", field_type);
+
+ tdesc_create_reg (feature, "bnd0raw", 73, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd1raw", 74, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd2raw", 75, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd3raw", 76, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bndcfgu", 77, 1, NULL, 64, "cfgu");
+ tdesc_create_reg (feature, "bndstatus", 78, 1, NULL, 64, "status");
+
+ tdesc_amd64_mpx = result;
+}
diff --git a/gdb/features/i386/amd64-mpx.xml b/gdb/features/i386/amd64-mpx.xml
new file mode 100644
index 0000000..420b354
--- /dev/null
+++ b/gdb/features/i386/amd64-mpx.xml
@@ -0,0 +1,17 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2013 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- AMD64 with MPX -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>i386:x86-64</architecture>
+ <xi:include href="64bit-core.xml"/>
+ <xi:include href="64bit-sse.xml"/>
+ <xi:include href="64bit-avx.xml"/>
+ <xi:include href="64bit-mpx.xml"/>
+</target>
diff --git a/gdb/features/i386/i386-mpx-linux.c b/gdb/features/i386/i386-mpx-linux.c
new file mode 100644
index 0000000..dbf8789
--- /dev/null
+++ b/gdb/features/i386/i386-mpx-linux.c
@@ -0,0 +1,187 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: i386-mpx-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_i386_mpx_linux;
+static void
+initialize_tdesc_i386_mpx_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("i386"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core");
+ field_type = tdesc_create_flags (feature, "i386_eflags", 4);
+ tdesc_add_flag (field_type, 0, "CF");
+ tdesc_add_flag (field_type, 1, "");
+ tdesc_add_flag (field_type, 2, "PF");
+ tdesc_add_flag (field_type, 4, "AF");
+ tdesc_add_flag (field_type, 6, "ZF");
+ tdesc_add_flag (field_type, 7, "SF");
+ tdesc_add_flag (field_type, 8, "TF");
+ tdesc_add_flag (field_type, 9, "IF");
+ tdesc_add_flag (field_type, 10, "DF");
+ tdesc_add_flag (field_type, 11, "OF");
+ tdesc_add_flag (field_type, 14, "NT");
+ tdesc_add_flag (field_type, 16, "RF");
+ tdesc_add_flag (field_type, 17, "VM");
+ tdesc_add_flag (field_type, 18, "AC");
+ tdesc_add_flag (field_type, 19, "VIF");
+ tdesc_add_flag (field_type, 20, "VIP");
+ tdesc_add_flag (field_type, 21, "ID");
+
+ tdesc_create_reg (feature, "eax", 0, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ecx", 1, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "edx", 2, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ebx", 3, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "esp", 4, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "ebp", 5, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "esi", 6, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "edi", 7, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "eip", 8, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "eflags", 9, 1, NULL, 32, "i386_eflags");
+ tdesc_create_reg (feature, "cs", 10, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ss", 11, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ds", 12, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "es", 13, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "fs", 14, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "gs", 15, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "st0", 16, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st1", 17, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st2", 18, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st3", 19, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st4", 20, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st5", 21, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st6", 22, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st7", 23, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "fctrl", 24, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fstat", 25, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "ftag", 26, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fiseg", 27, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fioff", 28, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "foseg", 29, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fooff", 30, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fop", 31, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_create_flags (feature, "i386_mxcsr", 4);
+ tdesc_add_flag (field_type, 0, "IE");
+ tdesc_add_flag (field_type, 1, "DE");
+ tdesc_add_flag (field_type, 2, "ZE");
+ tdesc_add_flag (field_type, 3, "OE");
+ tdesc_add_flag (field_type, 4, "UE");
+ tdesc_add_flag (field_type, 5, "PE");
+ tdesc_add_flag (field_type, 6, "DAZ");
+ tdesc_add_flag (field_type, 7, "IM");
+ tdesc_add_flag (field_type, 8, "DM");
+ tdesc_add_flag (field_type, 9, "ZM");
+ tdesc_add_flag (field_type, 10, "OM");
+ tdesc_add_flag (field_type, 11, "UM");
+ tdesc_add_flag (field_type, 12, "PM");
+ tdesc_add_flag (field_type, 15, "FZ");
+
+ tdesc_create_reg (feature, "xmm0", 32, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm1", 33, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm2", 34, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm3", 35, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm4", 36, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm5", 37, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm6", 38, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm7", 39, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "mxcsr", 40, 1, "vector", 32, "i386_mxcsr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.linux");
+ tdesc_create_reg (feature, "orig_eax", 41, 1, NULL, 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx");
+ tdesc_create_reg (feature, "ymm0h", 42, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm1h", 43, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm2h", 44, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm3h", 45, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm4h", 46, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm5h", 47, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm6h", 48, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm7h", 49, 1, NULL, 128, "uint128");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
+ type = tdesc_create_struct (feature, "br128");
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "lbound", field_type);
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "ubound_raw", field_type);
+
+ type = tdesc_create_struct (feature, "_bndstatus");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "bde", 2, 31);
+ tdesc_add_bitfield (type, "error", 0, 1);
+
+ type = tdesc_create_union (feature, "status");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndstatus");
+ tdesc_add_field (type, "status", field_type);
+
+ type = tdesc_create_struct (feature, "_bndcfgu");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "base", 12, 31);
+ tdesc_add_bitfield (type, "reserved", 2, 11);
+ tdesc_add_bitfield (type, "preserved", 1, 1);
+ tdesc_add_bitfield (type, "enabled", 0, 1);
+
+ type = tdesc_create_union (feature, "cfgu");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndcfgu");
+ tdesc_add_field (type, "config", field_type);
+
+ tdesc_create_reg (feature, "bnd0raw", 50, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd1raw", 51, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd2raw", 52, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd3raw", 53, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bndcfgu", 54, 1, NULL, 64, "cfgu");
+ tdesc_create_reg (feature, "bndstatus", 55, 1, NULL, 64, "status");
+
+ tdesc_i386_mpx_linux = result;
+}
diff --git a/gdb/features/i386/i386-mpx-linux.xml b/gdb/features/i386/i386-mpx-linux.xml
new file mode 100644
index 0000000..9f492eb
--- /dev/null
+++ b/gdb/features/i386/i386-mpx-linux.xml
@@ -0,0 +1,19 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2013 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- I386 with MPX- Includes Linux-only special "register". -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>i386</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="32bit-core.xml"/>
+ <xi:include href="32bit-sse.xml"/>
+ <xi:include href="32bit-linux.xml"/>
+ <xi:include href="32bit-avx.xml"/>
+ <xi:include href="32bit-mpx.xml"/>
+</target>
diff --git a/gdb/features/i386/i386-mpx.c b/gdb/features/i386/i386-mpx.c
new file mode 100644
index 0000000..1e04afd
--- /dev/null
+++ b/gdb/features/i386/i386-mpx.c
@@ -0,0 +1,182 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: i386-mpx.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_i386_mpx;
+static void
+initialize_tdesc_i386_mpx (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("i386"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core");
+ field_type = tdesc_create_flags (feature, "i386_eflags", 4);
+ tdesc_add_flag (field_type, 0, "CF");
+ tdesc_add_flag (field_type, 1, "");
+ tdesc_add_flag (field_type, 2, "PF");
+ tdesc_add_flag (field_type, 4, "AF");
+ tdesc_add_flag (field_type, 6, "ZF");
+ tdesc_add_flag (field_type, 7, "SF");
+ tdesc_add_flag (field_type, 8, "TF");
+ tdesc_add_flag (field_type, 9, "IF");
+ tdesc_add_flag (field_type, 10, "DF");
+ tdesc_add_flag (field_type, 11, "OF");
+ tdesc_add_flag (field_type, 14, "NT");
+ tdesc_add_flag (field_type, 16, "RF");
+ tdesc_add_flag (field_type, 17, "VM");
+ tdesc_add_flag (field_type, 18, "AC");
+ tdesc_add_flag (field_type, 19, "VIF");
+ tdesc_add_flag (field_type, 20, "VIP");
+ tdesc_add_flag (field_type, 21, "ID");
+
+ tdesc_create_reg (feature, "eax", 0, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ecx", 1, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "edx", 2, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ebx", 3, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "esp", 4, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "ebp", 5, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "esi", 6, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "edi", 7, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "eip", 8, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "eflags", 9, 1, NULL, 32, "i386_eflags");
+ tdesc_create_reg (feature, "cs", 10, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ss", 11, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ds", 12, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "es", 13, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "fs", 14, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "gs", 15, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "st0", 16, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st1", 17, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st2", 18, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st3", 19, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st4", 20, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st5", 21, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st6", 22, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st7", 23, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "fctrl", 24, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fstat", 25, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "ftag", 26, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fiseg", 27, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fioff", 28, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "foseg", 29, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fooff", 30, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fop", 31, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_create_flags (feature, "i386_mxcsr", 4);
+ tdesc_add_flag (field_type, 0, "IE");
+ tdesc_add_flag (field_type, 1, "DE");
+ tdesc_add_flag (field_type, 2, "ZE");
+ tdesc_add_flag (field_type, 3, "OE");
+ tdesc_add_flag (field_type, 4, "UE");
+ tdesc_add_flag (field_type, 5, "PE");
+ tdesc_add_flag (field_type, 6, "DAZ");
+ tdesc_add_flag (field_type, 7, "IM");
+ tdesc_add_flag (field_type, 8, "DM");
+ tdesc_add_flag (field_type, 9, "ZM");
+ tdesc_add_flag (field_type, 10, "OM");
+ tdesc_add_flag (field_type, 11, "UM");
+ tdesc_add_flag (field_type, 12, "PM");
+ tdesc_add_flag (field_type, 15, "FZ");
+
+ tdesc_create_reg (feature, "xmm0", 32, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm1", 33, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm2", 34, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm3", 35, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm4", 36, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm5", 37, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm6", 38, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm7", 39, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "mxcsr", 40, 1, "vector", 32, "i386_mxcsr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx");
+ tdesc_create_reg (feature, "ymm0h", 41, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm1h", 42, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm2h", 43, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm3h", 44, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm4h", 45, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm5h", 46, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm6h", 47, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm7h", 48, 1, NULL, 128, "uint128");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
+ type = tdesc_create_struct (feature, "br128");
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "lbound", field_type);
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "ubound_raw", field_type);
+
+ type = tdesc_create_struct (feature, "_bndstatus");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "bde", 2, 31);
+ tdesc_add_bitfield (type, "error", 0, 1);
+
+ type = tdesc_create_union (feature, "status");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndstatus");
+ tdesc_add_field (type, "status", field_type);
+
+ type = tdesc_create_struct (feature, "_bndcfgu");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "base", 12, 31);
+ tdesc_add_bitfield (type, "reserved", 2, 11);
+ tdesc_add_bitfield (type, "preserved", 1, 1);
+ tdesc_add_bitfield (type, "enabled", 0, 1);
+
+ type = tdesc_create_union (feature, "cfgu");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndcfgu");
+ tdesc_add_field (type, "config", field_type);
+
+ tdesc_create_reg (feature, "bnd0raw", 49, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd1raw", 50, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd2raw", 51, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd3raw", 52, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bndcfgu", 53, 1, NULL, 64, "cfgu");
+ tdesc_create_reg (feature, "bndstatus", 54, 1, NULL, 64, "status");
+
+ tdesc_i386_mpx = result;
+}
diff --git a/gdb/features/i386/i386-mpx.xml b/gdb/features/i386/i386-mpx.xml
new file mode 100644
index 0000000..c7cf8da
--- /dev/null
+++ b/gdb/features/i386/i386-mpx.xml
@@ -0,0 +1,17 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2013 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- I386 with MPX -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>i386</architecture>
+ <xi:include href="32bit-core.xml"/>
+ <xi:include href="32bit-sse.xml"/>
+ <xi:include href="32bit-avx.xml"/>
+ <xi:include href="32bit-mpx.xml"/>
+</target>
diff --git a/gdb/features/i386/x32-mpx-linux.c b/gdb/features/i386/x32-mpx-linux.c
new file mode 100644
index 0000000..44ee9c8
--- /dev/null
+++ b/gdb/features/i386/x32-mpx-linux.c
@@ -0,0 +1,211 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: x32-mpx-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_x32_mpx_linux;
+static void
+initialize_tdesc_x32_mpx_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("i386:x64-32"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core");
+ field_type = tdesc_create_flags (feature, "i386_eflags", 4);
+ tdesc_add_flag (field_type, 0, "CF");
+ tdesc_add_flag (field_type, 1, "");
+ tdesc_add_flag (field_type, 2, "PF");
+ tdesc_add_flag (field_type, 4, "AF");
+ tdesc_add_flag (field_type, 6, "ZF");
+ tdesc_add_flag (field_type, 7, "SF");
+ tdesc_add_flag (field_type, 8, "TF");
+ tdesc_add_flag (field_type, 9, "IF");
+ tdesc_add_flag (field_type, 10, "DF");
+ tdesc_add_flag (field_type, 11, "OF");
+ tdesc_add_flag (field_type, 14, "NT");
+ tdesc_add_flag (field_type, 16, "RF");
+ tdesc_add_flag (field_type, 17, "VM");
+ tdesc_add_flag (field_type, 18, "AC");
+ tdesc_add_flag (field_type, 19, "VIF");
+ tdesc_add_flag (field_type, 20, "VIP");
+ tdesc_add_flag (field_type, 21, "ID");
+
+ tdesc_create_reg (feature, "rax", 0, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbx", 1, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rcx", 2, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdx", 3, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rsi", 4, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdi", 5, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbp", 6, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rsp", 7, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rip", 16, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "eflags", 17, 1, NULL, 32, "i386_eflags");
+ tdesc_create_reg (feature, "cs", 18, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ss", 19, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ds", 20, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "es", 21, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "fs", 22, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "gs", 23, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "st0", 24, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st1", 25, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st2", 26, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st3", 27, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st4", 28, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st5", 29, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st6", 30, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st7", 31, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "fctrl", 32, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fstat", 33, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "ftag", 34, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fiseg", 35, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fioff", 36, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "foseg", 37, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fooff", 38, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fop", 39, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_create_flags (feature, "i386_mxcsr", 4);
+ tdesc_add_flag (field_type, 0, "IE");
+ tdesc_add_flag (field_type, 1, "DE");
+ tdesc_add_flag (field_type, 2, "ZE");
+ tdesc_add_flag (field_type, 3, "OE");
+ tdesc_add_flag (field_type, 4, "UE");
+ tdesc_add_flag (field_type, 5, "PE");
+ tdesc_add_flag (field_type, 6, "DAZ");
+ tdesc_add_flag (field_type, 7, "IM");
+ tdesc_add_flag (field_type, 8, "DM");
+ tdesc_add_flag (field_type, 9, "ZM");
+ tdesc_add_flag (field_type, 10, "OM");
+ tdesc_add_flag (field_type, 11, "UM");
+ tdesc_add_flag (field_type, 12, "PM");
+ tdesc_add_flag (field_type, 15, "FZ");
+
+ tdesc_create_reg (feature, "xmm0", 40, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm1", 41, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm2", 42, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm3", 43, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm4", 44, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm5", 45, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm6", 46, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm7", 47, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm8", 48, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm9", 49, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm10", 50, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm11", 51, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm12", 52, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm13", 53, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm14", 54, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm15", 55, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "mxcsr", 56, 1, "vector", 32, "i386_mxcsr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.linux");
+ tdesc_create_reg (feature, "orig_rax", 57, 1, NULL, 64, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx");
+ tdesc_create_reg (feature, "ymm0h", 58, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm1h", 59, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm2h", 60, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm3h", 61, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm4h", 62, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm5h", 63, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm6h", 64, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm7h", 65, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm8h", 66, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm9h", 67, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm10h", 68, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm11h", 69, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm12h", 70, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm13h", 71, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm14h", 72, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm15h", 73, 1, NULL, 128, "uint128");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
+ type = tdesc_create_struct (feature, "br128");
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "lbound", field_type);
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "ubound_raw", field_type);
+
+ type = tdesc_create_struct (feature, "_bndstatus");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "bde", 2, 63);
+ tdesc_add_bitfield (type, "error", 0, 1);
+
+ type = tdesc_create_union (feature, "status");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndstatus");
+ tdesc_add_field (type, "status", field_type);
+
+ type = tdesc_create_struct (feature, "_bndcfgu");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "base", 12, 63);
+ tdesc_add_bitfield (type, "reserved", 2, 11);
+ tdesc_add_bitfield (type, "preserved", 1, 1);
+ tdesc_add_bitfield (type, "enabled", 0, 0);
+
+ type = tdesc_create_union (feature, "cfgu");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndcfgu");
+ tdesc_add_field (type, "config", field_type);
+
+ tdesc_create_reg (feature, "bnd0raw", 74, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd1raw", 75, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd2raw", 76, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd3raw", 77, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bndcfgu", 78, 1, NULL, 64, "cfgu");
+ tdesc_create_reg (feature, "bndstatus", 79, 1, NULL, 64, "status");
+
+ tdesc_x32_mpx_linux = result;
+}
diff --git a/gdb/features/i386/x32-mpx-linux.xml b/gdb/features/i386/x32-mpx-linux.xml
new file mode 100644
index 0000000..f803eb3
--- /dev/null
+++ b/gdb/features/i386/x32-mpx-linux.xml
@@ -0,0 +1,19 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2013 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- X32 with MPX - Includes Linux-only special "register". -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>i386:x64-32</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="x32-core.xml"/>
+ <xi:include href="64bit-sse.xml"/>
+ <xi:include href="64bit-linux.xml"/>
+ <xi:include href="64bit-avx.xml"/>
+ <xi:include href="64bit-mpx.xml"/>
+</target>
diff --git a/gdb/features/i386/x32-mpx.c b/gdb/features/i386/x32-mpx.c
new file mode 100644
index 0000000..57e2c5f
--- /dev/null
+++ b/gdb/features/i386/x32-mpx.c
@@ -0,0 +1,206 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: x32-mpx.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_x32_mpx;
+static void
+initialize_tdesc_x32_mpx (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("i386:x64-32"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core");
+ field_type = tdesc_create_flags (feature, "i386_eflags", 4);
+ tdesc_add_flag (field_type, 0, "CF");
+ tdesc_add_flag (field_type, 1, "");
+ tdesc_add_flag (field_type, 2, "PF");
+ tdesc_add_flag (field_type, 4, "AF");
+ tdesc_add_flag (field_type, 6, "ZF");
+ tdesc_add_flag (field_type, 7, "SF");
+ tdesc_add_flag (field_type, 8, "TF");
+ tdesc_add_flag (field_type, 9, "IF");
+ tdesc_add_flag (field_type, 10, "DF");
+ tdesc_add_flag (field_type, 11, "OF");
+ tdesc_add_flag (field_type, 14, "NT");
+ tdesc_add_flag (field_type, 16, "RF");
+ tdesc_add_flag (field_type, 17, "VM");
+ tdesc_add_flag (field_type, 18, "AC");
+ tdesc_add_flag (field_type, 19, "VIF");
+ tdesc_add_flag (field_type, 20, "VIP");
+ tdesc_add_flag (field_type, 21, "ID");
+
+ tdesc_create_reg (feature, "rax", 0, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbx", 1, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rcx", 2, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdx", 3, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rsi", 4, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rdi", 5, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rbp", 6, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rsp", 7, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "int64");
+ tdesc_create_reg (feature, "rip", 16, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "eflags", 17, 1, NULL, 32, "i386_eflags");
+ tdesc_create_reg (feature, "cs", 18, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ss", 19, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "ds", 20, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "es", 21, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "fs", 22, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "gs", 23, 1, NULL, 32, "int32");
+ tdesc_create_reg (feature, "st0", 24, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st1", 25, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st2", 26, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st3", 27, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st4", 28, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st5", 29, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st6", 30, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "st7", 31, 1, NULL, 80, "i387_ext");
+ tdesc_create_reg (feature, "fctrl", 32, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fstat", 33, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "ftag", 34, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fiseg", 35, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fioff", 36, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "foseg", 37, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fooff", 38, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fop", 39, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ tdesc_create_vector (feature, "v4f", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "v2d", field_type, 2);
+
+ field_type = tdesc_named_type (feature, "int8");
+ tdesc_create_vector (feature, "v16i8", field_type, 16);
+
+ field_type = tdesc_named_type (feature, "int16");
+ tdesc_create_vector (feature, "v8i16", field_type, 8);
+
+ field_type = tdesc_named_type (feature, "int32");
+ tdesc_create_vector (feature, "v4i32", field_type, 4);
+
+ field_type = tdesc_named_type (feature, "int64");
+ tdesc_create_vector (feature, "v2i64", field_type, 2);
+
+ type = tdesc_create_union (feature, "vec128");
+ field_type = tdesc_named_type (feature, "v4f");
+ tdesc_add_field (type, "v4_float", field_type);
+ field_type = tdesc_named_type (feature, "v2d");
+ tdesc_add_field (type, "v2_double", field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ tdesc_add_field (type, "v16_int8", field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ tdesc_add_field (type, "v8_int16", field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ tdesc_add_field (type, "v4_int32", field_type);
+ field_type = tdesc_named_type (feature, "v2i64");
+ tdesc_add_field (type, "v2_int64", field_type);
+ field_type = tdesc_named_type (feature, "uint128");
+ tdesc_add_field (type, "uint128", field_type);
+
+ field_type = tdesc_create_flags (feature, "i386_mxcsr", 4);
+ tdesc_add_flag (field_type, 0, "IE");
+ tdesc_add_flag (field_type, 1, "DE");
+ tdesc_add_flag (field_type, 2, "ZE");
+ tdesc_add_flag (field_type, 3, "OE");
+ tdesc_add_flag (field_type, 4, "UE");
+ tdesc_add_flag (field_type, 5, "PE");
+ tdesc_add_flag (field_type, 6, "DAZ");
+ tdesc_add_flag (field_type, 7, "IM");
+ tdesc_add_flag (field_type, 8, "DM");
+ tdesc_add_flag (field_type, 9, "ZM");
+ tdesc_add_flag (field_type, 10, "OM");
+ tdesc_add_flag (field_type, 11, "UM");
+ tdesc_add_flag (field_type, 12, "PM");
+ tdesc_add_flag (field_type, 15, "FZ");
+
+ tdesc_create_reg (feature, "xmm0", 40, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm1", 41, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm2", 42, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm3", 43, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm4", 44, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm5", 45, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm6", 46, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm7", 47, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm8", 48, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm9", 49, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm10", 50, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm11", 51, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm12", 52, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm13", 53, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm14", 54, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "xmm15", 55, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "mxcsr", 56, 1, "vector", 32, "i386_mxcsr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx");
+ tdesc_create_reg (feature, "ymm0h", 57, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm1h", 58, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm2h", 59, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm3h", 60, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm4h", 61, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm5h", 62, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm6h", 63, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm7h", 64, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm8h", 65, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm9h", 66, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm10h", 67, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm11h", 68, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm12h", 69, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm13h", 70, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm14h", 71, 1, NULL, 128, "uint128");
+ tdesc_create_reg (feature, "ymm15h", 72, 1, NULL, 128, "uint128");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
+ type = tdesc_create_struct (feature, "br128");
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "lbound", field_type);
+ field_type = tdesc_named_type (feature, "uint64");
+ tdesc_add_field (type, "ubound_raw", field_type);
+
+ type = tdesc_create_struct (feature, "_bndstatus");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "bde", 2, 63);
+ tdesc_add_bitfield (type, "error", 0, 1);
+
+ type = tdesc_create_union (feature, "status");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndstatus");
+ tdesc_add_field (type, "status", field_type);
+
+ type = tdesc_create_struct (feature, "_bndcfgu");
+ tdesc_set_struct_size (type, 8);
+ tdesc_add_bitfield (type, "base", 12, 63);
+ tdesc_add_bitfield (type, "reserved", 2, 11);
+ tdesc_add_bitfield (type, "preserved", 1, 1);
+ tdesc_add_bitfield (type, "enabled", 0, 0);
+
+ type = tdesc_create_union (feature, "cfgu");
+ field_type = tdesc_named_type (feature, "data_ptr");
+ tdesc_add_field (type, "raw", field_type);
+ field_type = tdesc_named_type (feature, "_bndcfgu");
+ tdesc_add_field (type, "config", field_type);
+
+ tdesc_create_reg (feature, "bnd0raw", 73, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd1raw", 74, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd2raw", 75, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bnd3raw", 76, 1, NULL, 128, "br128");
+ tdesc_create_reg (feature, "bndcfgu", 77, 1, NULL, 64, "cfgu");
+ tdesc_create_reg (feature, "bndstatus", 78, 1, NULL, 64, "status");
+
+ tdesc_x32_mpx = result;
+}
diff --git a/gdb/features/i386/x32-mpx.xml b/gdb/features/i386/x32-mpx.xml
new file mode 100644
index 0000000..3bed447
--- /dev/null
+++ b/gdb/features/i386/x32-mpx.xml
@@ -0,0 +1,17 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2013 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- X32 with MPX -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>i386:x64-32</architecture>
+ <xi:include href="x32-core.xml"/>
+ <xi:include href="64bit-sse.xml"/>
+ <xi:include href="64bit-avx.xml"/>
+ <xi:include href="64bit-mpx.xml"/>
+</target>
diff --git a/gdb/regformats/i386/amd64-mpx-linux.dat b/gdb/regformats/i386/amd64-mpx-linux.dat
new file mode 100644
index 0000000..992541d
--- /dev/null
+++ b/gdb/regformats/i386/amd64-mpx-linux.dat
@@ -0,0 +1,84 @@
+# DO NOT EDIT: generated from i386/amd64-mpx-linux.xml
+name:amd64_mpx_linux
+xmltarget:amd64-mpx-linux.xml
+expedite:rbp,rsp,rip
+64:rax
+64:rbx
+64:rcx
+64:rdx
+64:rsi
+64:rdi
+64:rbp
+64:rsp
+64:r8
+64:r9
+64:r10
+64:r11
+64:r12
+64:r13
+64:r14
+64:r15
+64:rip
+32:eflags
+32:cs
+32:ss
+32:ds
+32:es
+32:fs
+32:gs
+80:st0
+80:st1
+80:st2
+80:st3
+80:st4
+80:st5
+80:st6
+80:st7
+32:fctrl
+32:fstat
+32:ftag
+32:fiseg
+32:fioff
+32:foseg
+32:fooff
+32:fop
+128:xmm0
+128:xmm1
+128:xmm2
+128:xmm3
+128:xmm4
+128:xmm5
+128:xmm6
+128:xmm7
+128:xmm8
+128:xmm9
+128:xmm10
+128:xmm11
+128:xmm12
+128:xmm13
+128:xmm14
+128:xmm15
+32:mxcsr
+64:orig_rax
+128:ymm0h
+128:ymm1h
+128:ymm2h
+128:ymm3h
+128:ymm4h
+128:ymm5h
+128:ymm6h
+128:ymm7h
+128:ymm8h
+128:ymm9h
+128:ymm10h
+128:ymm11h
+128:ymm12h
+128:ymm13h
+128:ymm14h
+128:ymm15h
+128:bnd0raw
+128:bnd1raw
+128:bnd2raw
+128:bnd3raw
+64:bndcfgu
+64:bndstatus
diff --git a/gdb/regformats/i386/amd64-mpx.dat b/gdb/regformats/i386/amd64-mpx.dat
new file mode 100644
index 0000000..e411ebd
--- /dev/null
+++ b/gdb/regformats/i386/amd64-mpx.dat
@@ -0,0 +1,83 @@
+# DO NOT EDIT: generated from i386/amd64-mpx.xml
+name:amd64_mpx
+xmltarget:amd64-mpx.xml
+expedite:rbp,rsp,rip
+64:rax
+64:rbx
+64:rcx
+64:rdx
+64:rsi
+64:rdi
+64:rbp
+64:rsp
+64:r8
+64:r9
+64:r10
+64:r11
+64:r12
+64:r13
+64:r14
+64:r15
+64:rip
+32:eflags
+32:cs
+32:ss
+32:ds
+32:es
+32:fs
+32:gs
+80:st0
+80:st1
+80:st2
+80:st3
+80:st4
+80:st5
+80:st6
+80:st7
+32:fctrl
+32:fstat
+32:ftag
+32:fiseg
+32:fioff
+32:foseg
+32:fooff
+32:fop
+128:xmm0
+128:xmm1
+128:xmm2
+128:xmm3
+128:xmm4
+128:xmm5
+128:xmm6
+128:xmm7
+128:xmm8
+128:xmm9
+128:xmm10
+128:xmm11
+128:xmm12
+128:xmm13
+128:xmm14
+128:xmm15
+32:mxcsr
+128:ymm0h
+128:ymm1h
+128:ymm2h
+128:ymm3h
+128:ymm4h
+128:ymm5h
+128:ymm6h
+128:ymm7h
+128:ymm8h
+128:ymm9h
+128:ymm10h
+128:ymm11h
+128:ymm12h
+128:ymm13h
+128:ymm14h
+128:ymm15h
+128:bnd0raw
+128:bnd1raw
+128:bnd2raw
+128:bnd3raw
+64:bndcfgu
+64:bndstatus
diff --git a/gdb/regformats/i386/i386-mpx-linux.dat b/gdb/regformats/i386/i386-mpx-linux.dat
new file mode 100644
index 0000000..1ba08d3
--- /dev/null
+++ b/gdb/regformats/i386/i386-mpx-linux.dat
@@ -0,0 +1,60 @@
+# DO NOT EDIT: generated from i386/i386-mpx-linux.xml
+name:i386_mpx_linux
+xmltarget:i386-mpx-linux.xml
+expedite:ebp,esp,eip
+32:eax
+32:ecx
+32:edx
+32:ebx
+32:esp
+32:ebp
+32:esi
+32:edi
+32:eip
+32:eflags
+32:cs
+32:ss
+32:ds
+32:es
+32:fs
+32:gs
+80:st0
+80:st1
+80:st2
+80:st3
+80:st4
+80:st5
+80:st6
+80:st7
+32:fctrl
+32:fstat
+32:ftag
+32:fiseg
+32:fioff
+32:foseg
+32:fooff
+32:fop
+128:xmm0
+128:xmm1
+128:xmm2
+128:xmm3
+128:xmm4
+128:xmm5
+128:xmm6
+128:xmm7
+32:mxcsr
+32:orig_eax
+128:ymm0h
+128:ymm1h
+128:ymm2h
+128:ymm3h
+128:ymm4h
+128:ymm5h
+128:ymm6h
+128:ymm7h
+128:bnd0raw
+128:bnd1raw
+128:bnd2raw
+128:bnd3raw
+64:bndcfgu
+64:bndstatus
diff --git a/gdb/regformats/i386/i386-mpx.dat b/gdb/regformats/i386/i386-mpx.dat
new file mode 100644
index 0000000..8b0c95b
--- /dev/null
+++ b/gdb/regformats/i386/i386-mpx.dat
@@ -0,0 +1,59 @@
+# DO NOT EDIT: generated from i386/i386-mpx.xml
+name:i386_mpx
+xmltarget:i386-mpx.xml
+expedite:ebp,esp,eip
+32:eax
+32:ecx
+32:edx
+32:ebx
+32:esp
+32:ebp
+32:esi
+32:edi
+32:eip
+32:eflags
+32:cs
+32:ss
+32:ds
+32:es
+32:fs
+32:gs
+80:st0
+80:st1
+80:st2
+80:st3
+80:st4
+80:st5
+80:st6
+80:st7
+32:fctrl
+32:fstat
+32:ftag
+32:fiseg
+32:fioff
+32:foseg
+32:fooff
+32:fop
+128:xmm0
+128:xmm1
+128:xmm2
+128:xmm3
+128:xmm4
+128:xmm5
+128:xmm6
+128:xmm7
+32:mxcsr
+128:ymm0h
+128:ymm1h
+128:ymm2h
+128:ymm3h
+128:ymm4h
+128:ymm5h
+128:ymm6h
+128:ymm7h
+128:bnd0raw
+128:bnd1raw
+128:bnd2raw
+128:bnd3raw
+64:bndcfgu
+64:bndstatus
diff --git a/gdb/regformats/i386/x32-mpx-linux.dat b/gdb/regformats/i386/x32-mpx-linux.dat
new file mode 100644
index 0000000..f8fb244
--- /dev/null
+++ b/gdb/regformats/i386/x32-mpx-linux.dat
@@ -0,0 +1,84 @@
+# DO NOT EDIT: generated from i386/x32-mpx-linux.xml
+name:x32_mpx_linux
+xmltarget:x32-mpx-linux.xml
+expedite:rbp,rsp,rip
+64:rax
+64:rbx
+64:rcx
+64:rdx
+64:rsi
+64:rdi
+64:rbp
+64:rsp
+64:r8
+64:r9
+64:r10
+64:r11
+64:r12
+64:r13
+64:r14
+64:r15
+64:rip
+32:eflags
+32:cs
+32:ss
+32:ds
+32:es
+32:fs
+32:gs
+80:st0
+80:st1
+80:st2
+80:st3
+80:st4
+80:st5
+80:st6
+80:st7
+32:fctrl
+32:fstat
+32:ftag
+32:fiseg
+32:fioff
+32:foseg
+32:fooff
+32:fop
+128:xmm0
+128:xmm1
+128:xmm2
+128:xmm3
+128:xmm4
+128:xmm5
+128:xmm6
+128:xmm7
+128:xmm8
+128:xmm9
+128:xmm10
+128:xmm11
+128:xmm12
+128:xmm13
+128:xmm14
+128:xmm15
+32:mxcsr
+64:orig_rax
+128:ymm0h
+128:ymm1h
+128:ymm2h
+128:ymm3h
+128:ymm4h
+128:ymm5h
+128:ymm6h
+128:ymm7h
+128:ymm8h
+128:ymm9h
+128:ymm10h
+128:ymm11h
+128:ymm12h
+128:ymm13h
+128:ymm14h
+128:ymm15h
+128:bnd0raw
+128:bnd1raw
+128:bnd2raw
+128:bnd3raw
+64:bndcfgu
+64:bndstatus
diff --git a/gdb/regformats/i386/x32-mpx.dat b/gdb/regformats/i386/x32-mpx.dat
new file mode 100644
index 0000000..5104f6d
--- /dev/null
+++ b/gdb/regformats/i386/x32-mpx.dat
@@ -0,0 +1,83 @@
+# DO NOT EDIT: generated from i386/x32-mpx.xml
+name:x32_mpx
+xmltarget:x32-mpx.xml
+expedite:rbp,rsp,rip
+64:rax
+64:rbx
+64:rcx
+64:rdx
+64:rsi
+64:rdi
+64:rbp
+64:rsp
+64:r8
+64:r9
+64:r10
+64:r11
+64:r12
+64:r13
+64:r14
+64:r15
+64:rip
+32:eflags
+32:cs
+32:ss
+32:ds
+32:es
+32:fs
+32:gs
+80:st0
+80:st1
+80:st2
+80:st3
+80:st4
+80:st5
+80:st6
+80:st7
+32:fctrl
+32:fstat
+32:ftag
+32:fiseg
+32:fioff
+32:foseg
+32:fooff
+32:fop
+128:xmm0
+128:xmm1
+128:xmm2
+128:xmm3
+128:xmm4
+128:xmm5
+128:xmm6
+128:xmm7
+128:xmm8
+128:xmm9
+128:xmm10
+128:xmm11
+128:xmm12
+128:xmm13
+128:xmm14
+128:xmm15
+32:mxcsr
+128:ymm0h
+128:ymm1h
+128:ymm2h
+128:ymm3h
+128:ymm4h
+128:ymm5h
+128:ymm6h
+128:ymm7h
+128:ymm8h
+128:ymm9h
+128:ymm10h
+128:ymm11h
+128:ymm12h
+128:ymm13h
+128:ymm14h
+128:ymm15h
+128:bnd0raw
+128:bnd1raw
+128:bnd2raw
+128:bnd3raw
+64:bndcfgu
+64:bndstatus
--
1.7.10.4
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH V7 0/8] Intel(R) MPX register support
2013-10-09 12:01 [PATCH V7 0/8] Intel(R) MPX register support Walfred Tedeschi
` (7 preceding siblings ...)
2013-10-09 12:02 ` [PATCH V7 2/8] Add MPX registers XML files Walfred Tedeschi
@ 2013-10-20 19:23 ` Mark Kettenis
2013-10-21 11:33 ` Tedeschi, Walfred
8 siblings, 1 reply; 23+ messages in thread
From: Mark Kettenis @ 2013-10-20 19:23 UTC (permalink / raw)
To: walfred.tedeschi; +Cc: tromey, gdb-patches, walfred.tedeschi
> From: Walfred Tedeschi <walfred.tedeschi@intel.com>
> Cc: gdb-patches@sourceware.org, Walfred Tedeschi <walfred.tedeschi@intel.com>
>
> Mark and all,
>
> I have noticed no feedback on this patch series.
> Is there a major change that you would like to see in here?
>
> Thanks a lot for your support,
> Best regards,
> -Fred
Walfred,
The only thing I'm still somewhat unhappy about the fact that this
introduces the "bndNraw" register names in addition to the "bndN"
names. I think having both the "raw" and "cooked" variants present in
GDB's user interface will be confusing. But it is hard to decide what
the right interface is for a feature that isn't available in hardware
yet and people don't really have any experience with debugging code
that uses MPX.
^ permalink raw reply [flat|nested] 23+ messages in thread
* RE: [PATCH V7 0/8] Intel(R) MPX register support
2013-10-20 19:23 ` [PATCH V7 0/8] Intel(R) MPX register support Mark Kettenis
@ 2013-10-21 11:33 ` Tedeschi, Walfred
2013-11-04 9:07 ` Tedeschi, Walfred
0 siblings, 1 reply; 23+ messages in thread
From: Tedeschi, Walfred @ 2013-10-21 11:33 UTC (permalink / raw)
To: Mark Kettenis; +Cc: tromey, gdb-patches
Mark,
Our internal users of MPX found it useful to see the raw value, processed values and size together.
They found out that it was really handy to avoid doing the complement of one for every bound manipulation.
(I our first patch we changed the type system to add a complement of one type, but this was considered overkill)
In this sense we would like still to display the bounds on a friendly manner to the user. When I say friendly I mean displaying values that are meaningful to the user.
->Lower and upper bound should be presented as address format.
->No additional manipulation needed to calculate the upper bound limit.
On the other hand we could add the nice display on the python script and eliminate the pseudo register set, having only "bndN".
Would you be ok with such a change?
(Having the pretty print only on the python side and eliminating the bndraws)
Thanks and regards,
-Fred.
PS: You might use SDE to have an idea how it looks like.
http://software.intel.com/en-us/articles/using-intel-mpx-with-the-intel-software-development-emulator
http://software.intel.com/en-us/articles/intel-software-development-emulator
-----Original Message-----
From: gdb-patches-owner@sourceware.org [mailto:gdb-patches-owner@sourceware.org] On Behalf Of Mark Kettenis
Sent: Sunday, October 20, 2013 9:23 PM
To: Tedeschi, Walfred
Cc: tromey@redhat.com; gdb-patches@sourceware.org; Tedeschi, Walfred
Subject: Re: [PATCH V7 0/8] Intel(R) MPX register support
> From: Walfred Tedeschi <walfred.tedeschi@intel.com>
> Cc: gdb-patches@sourceware.org, Walfred Tedeschi
> <walfred.tedeschi@intel.com>
>
> Mark and all,
>
> I have noticed no feedback on this patch series.
> Is there a major change that you would like to see in here?
>
> Thanks a lot for your support,
> Best regards,
> -Fred
Walfred,
The only thing I'm still somewhat unhappy about the fact that this introduces the "bndNraw" register names in addition to the "bndN"
names. I think having both the "raw" and "cooked" variants present in GDB's user interface will be confusing. But it is hard to decide what the right interface is for a feature that isn't available in hardware yet and people don't really have any experience with debugging code that uses MPX.
Intel GmbH
Dornacher Strasse 1
85622 Feldkirchen/Muenchen, Deutschland
Sitz der Gesellschaft: Feldkirchen bei Muenchen
Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
Registergericht: Muenchen HRB 47456
Ust.-IdNr./VAT Registration No.: DE129385895
Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
^ permalink raw reply [flat|nested] 23+ messages in thread
* RE: [PATCH V7 0/8] Intel(R) MPX register support
2013-10-21 11:33 ` Tedeschi, Walfred
@ 2013-11-04 9:07 ` Tedeschi, Walfred
2013-11-04 10:30 ` Mark Kettenis
0 siblings, 1 reply; 23+ messages in thread
From: Tedeschi, Walfred @ 2013-11-04 9:07 UTC (permalink / raw)
To: Tedeschi, Walfred, Mark Kettenis; +Cc: tromey, gdb-patches
Mark,
Do you think the proposal makes sense?
Regards,
-Fred
-----Original Message-----
From: gdb-patches-owner@sourceware.org [mailto:gdb-patches-owner@sourceware.org] On Behalf Of Tedeschi, Walfred
Sent: Monday, October 21, 2013 1:33 PM
To: Mark Kettenis
Cc: tromey@redhat.com; gdb-patches@sourceware.org
Subject: RE: [PATCH V7 0/8] Intel(R) MPX register support
Mark,
Our internal users of MPX found it useful to see the raw value, processed values and size together.
They found out that it was really handy to avoid doing the complement of one for every bound manipulation.
(I our first patch we changed the type system to add a complement of one type, but this was considered overkill)
In this sense we would like still to display the bounds on a friendly manner to the user. When I say friendly I mean displaying values that are meaningful to the user.
->Lower and upper bound should be presented as address format.
->No additional manipulation needed to calculate the upper bound limit.
On the other hand we could add the nice display on the python script and eliminate the pseudo register set, having only "bndN".
Would you be ok with such a change?
(Having the pretty print only on the python side and eliminating the bndraws)
Thanks and regards,
-Fred.
PS: You might use SDE to have an idea how it looks like.
http://software.intel.com/en-us/articles/using-intel-mpx-with-the-intel-software-development-emulator
http://software.intel.com/en-us/articles/intel-software-development-emulator
-----Original Message-----
From: gdb-patches-owner@sourceware.org [mailto:gdb-patches-owner@sourceware.org] On Behalf Of Mark Kettenis
Sent: Sunday, October 20, 2013 9:23 PM
To: Tedeschi, Walfred
Cc: tromey@redhat.com; gdb-patches@sourceware.org; Tedeschi, Walfred
Subject: Re: [PATCH V7 0/8] Intel(R) MPX register support
> From: Walfred Tedeschi <walfred.tedeschi@intel.com>
> Cc: gdb-patches@sourceware.org, Walfred Tedeschi
> <walfred.tedeschi@intel.com>
>
> Mark and all,
>
> I have noticed no feedback on this patch series.
> Is there a major change that you would like to see in here?
>
> Thanks a lot for your support,
> Best regards,
> -Fred
Walfred,
The only thing I'm still somewhat unhappy about the fact that this introduces the "bndNraw" register names in addition to the "bndN"
names. I think having both the "raw" and "cooked" variants present in GDB's user interface will be confusing. But it is hard to decide what the right interface is for a feature that isn't available in hardware yet and people don't really have any experience with debugging code that uses MPX.
Intel GmbH
Dornacher Strasse 1
85622 Feldkirchen/Muenchen, Deutschland
Sitz der Gesellschaft: Feldkirchen bei Muenchen
Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
Registergericht: Muenchen HRB 47456
Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
Intel GmbH
Dornacher Strasse 1
85622 Feldkirchen/Muenchen, Deutschland
Sitz der Gesellschaft: Feldkirchen bei Muenchen
Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
Registergericht: Muenchen HRB 47456
Ust.-IdNr./VAT Registration No.: DE129385895
Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH V7 0/8] Intel(R) MPX register support
2013-11-04 9:07 ` Tedeschi, Walfred
@ 2013-11-04 10:30 ` Mark Kettenis
2013-11-11 8:24 ` Tedeschi, Walfred
0 siblings, 1 reply; 23+ messages in thread
From: Mark Kettenis @ 2013-11-04 10:30 UTC (permalink / raw)
To: walfred.tedeschi; +Cc: walfred.tedeschi, tromey, gdb-patches
> From: "Tedeschi, Walfred" <walfred.tedeschi@intel.com>
> Date: Mon, 4 Nov 2013 09:06:06 +0000
>
> Mark,
>
> Do you think the proposal makes sense?
Sorry. No I don't think that makes sense. So I think you should go
ahead and commit your diff as-is (i.e. with both bndN and bndNraw
register names).
Cheers,
Mark
> -----Original Message-----
> From: gdb-patches-owner@sourceware.org [mailto:gdb-patches-owner@sourceware.org] On Behalf Of Tedeschi, Walfred
> Sent: Monday, October 21, 2013 1:33 PM
> To: Mark Kettenis
> Cc: tromey@redhat.com; gdb-patches@sourceware.org
> Subject: RE: [PATCH V7 0/8] Intel(R) MPX register support
>
> Mark,
>
> Our internal users of MPX found it useful to see the raw value, processed values and size together.
> They found out that it was really handy to avoid doing the complement of one for every bound manipulation.
> (I our first patch we changed the type system to add a complement of one type, but this was considered overkill)
>
> In this sense we would like still to display the bounds on a friendly manner to the user. When I say friendly I mean displaying values that are meaningful to the user.
> ->Lower and upper bound should be presented as address format.
> ->No additional manipulation needed to calculate the upper bound limit.
>
> On the other hand we could add the nice display on the python script and eliminate the pseudo register set, having only "bndN".
>
> Would you be ok with such a change?
> (Having the pretty print only on the python side and eliminating the bndraws)
>
>
> Thanks and regards,
> -Fred.
>
> PS: You might use SDE to have an idea how it looks like.
> http://software.intel.com/en-us/articles/using-intel-mpx-with-the-intel-software-development-emulator
> http://software.intel.com/en-us/articles/intel-software-development-emulator
>
>
>
> -----Original Message-----
> From: gdb-patches-owner@sourceware.org [mailto:gdb-patches-owner@sourceware.org] On Behalf Of Mark Kettenis
> Sent: Sunday, October 20, 2013 9:23 PM
> To: Tedeschi, Walfred
> Cc: tromey@redhat.com; gdb-patches@sourceware.org; Tedeschi, Walfred
> Subject: Re: [PATCH V7 0/8] Intel(R) MPX register support
>
> > From: Walfred Tedeschi <walfred.tedeschi@intel.com>
> > Cc: gdb-patches@sourceware.org, Walfred Tedeschi
> > <walfred.tedeschi@intel.com>
> >
> > Mark and all,
> >
> > I have noticed no feedback on this patch series.
> > Is there a major change that you would like to see in here?
> >
> > Thanks a lot for your support,
> > Best regards,
> > -Fred
>
> Walfred,
>
> The only thing I'm still somewhat unhappy about the fact that this introduces the "bndNraw" register names in addition to the "bndN"
> names. I think having both the "raw" and "cooked" variants present in GDB's user interface will be confusing. But it is hard to decide what the right interface is for a feature that isn't available in hardware yet and people don't really have any experience with debugging code that uses MPX.
>
> Intel GmbH
> Dornacher Strasse 1
> 85622 Feldkirchen/Muenchen, Deutschland
> Sitz der Gesellschaft: Feldkirchen bei Muenchen
> Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
> Registergericht: Muenchen HRB 47456
> Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
>
> Intel GmbH
> Dornacher Strasse 1
> 85622 Feldkirchen/Muenchen, Deutschland
> Sitz der Gesellschaft: Feldkirchen bei Muenchen
> Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
> Registergericht: Muenchen HRB 47456
> Ust.-IdNr./VAT Registration No.: DE129385895
> Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
>
>
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* RE: [PATCH V7 0/8] Intel(R) MPX register support
2013-11-04 10:30 ` Mark Kettenis
@ 2013-11-11 8:24 ` Tedeschi, Walfred
2013-11-11 10:12 ` Mark Kettenis
0 siblings, 1 reply; 23+ messages in thread
From: Tedeschi, Walfred @ 2013-11-11 8:24 UTC (permalink / raw)
To: Mark Kettenis, gdb-patches
Hello Mark,
I am not sure I got it right. Is this a ok to commit?
If so, I still would like to do some changes before proceeding.
Basically I want to remove the x32 support since it makes no sense and a regression I caused.
Those changes where mentioned here:
https://sourceware.org/ml/gdb-patches/2013-10/msg00513.html
To avoid sending you a full patch again my Idea is to send an ad-hoc patch to be added on top of my V7.
While doing the commit then I would join then on the respective place.
Thanks a lot for your support and best regards,
-Fred
-----Original Message-----
From: Mark Kettenis [mailto:mark.kettenis@xs4all.nl]
Sent: Monday, November 04, 2013 11:30 AM
To: Tedeschi, Walfred
Cc: Tedeschi, Walfred; tromey@redhat.com; gdb-patches@sourceware.org
Subject: Re: [PATCH V7 0/8] Intel(R) MPX register support
> From: "Tedeschi, Walfred" <walfred.tedeschi@intel.com>
> Date: Mon, 4 Nov 2013 09:06:06 +0000
>
> Mark,
>
> Do you think the proposal makes sense?
Sorry. No I don't think that makes sense. So I think you should go ahead and commit your diff as-is (i.e. with both bndN and bndNraw register names).
Cheers,
Mark
> -----Original Message-----
> From: gdb-patches-owner@sourceware.org
> [mailto:gdb-patches-owner@sourceware.org] On Behalf Of Tedeschi,
> Walfred
> Sent: Monday, October 21, 2013 1:33 PM
> To: Mark Kettenis
> Cc: tromey@redhat.com; gdb-patches@sourceware.org
> Subject: RE: [PATCH V7 0/8] Intel(R) MPX register support
>
> Mark,
>
> Our internal users of MPX found it useful to see the raw value, processed values and size together.
> They found out that it was really handy to avoid doing the complement of one for every bound manipulation.
> (I our first patch we changed the type system to add a complement of
> one type, but this was considered overkill)
>
> In this sense we would like still to display the bounds on a friendly manner to the user. When I say friendly I mean displaying values that are meaningful to the user.
> ->Lower and upper bound should be presented as address format.
> ->No additional manipulation needed to calculate the upper bound limit.
>
> On the other hand we could add the nice display on the python script and eliminate the pseudo register set, having only "bndN".
>
> Would you be ok with such a change?
> (Having the pretty print only on the python side and eliminating the
> bndraws)
>
>
> Thanks and regards,
> -Fred.
>
> PS: You might use SDE to have an idea how it looks like.
> http://software.intel.com/en-us/articles/using-intel-mpx-with-the-inte
> l-software-development-emulator
> http://software.intel.com/en-us/articles/intel-software-development-em
> ulator
>
>
>
> -----Original Message-----
> From: gdb-patches-owner@sourceware.org
> [mailto:gdb-patches-owner@sourceware.org] On Behalf Of Mark Kettenis
> Sent: Sunday, October 20, 2013 9:23 PM
> To: Tedeschi, Walfred
> Cc: tromey@redhat.com; gdb-patches@sourceware.org; Tedeschi, Walfred
> Subject: Re: [PATCH V7 0/8] Intel(R) MPX register support
>
> > From: Walfred Tedeschi <walfred.tedeschi@intel.com>
> > Cc: gdb-patches@sourceware.org, Walfred Tedeschi
> > <walfred.tedeschi@intel.com>
> >
> > Mark and all,
> >
> > I have noticed no feedback on this patch series.
> > Is there a major change that you would like to see in here?
> >
> > Thanks a lot for your support,
> > Best regards,
> > -Fred
>
> Walfred,
>
> The only thing I'm still somewhat unhappy about the fact that this introduces the "bndNraw" register names in addition to the "bndN"
> names. I think having both the "raw" and "cooked" variants present in GDB's user interface will be confusing. But it is hard to decide what the right interface is for a feature that isn't available in hardware yet and people don't really have any experience with debugging code that uses MPX.
>
> Intel GmbH
> Dornacher Strasse 1
> 85622 Feldkirchen/Muenchen, Deutschland Sitz der Gesellschaft:
> Feldkirchen bei Muenchen
> Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas
> Lusk
> Registergericht: Muenchen HRB 47456
> Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M.
> (BLZ 502 109 00) 600119052
>
> Intel GmbH
> Dornacher Strasse 1
> 85622 Feldkirchen/Muenchen, Deutschland Sitz der Gesellschaft:
> Feldkirchen bei Muenchen
> Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas
> Lusk
> Registergericht: Muenchen HRB 47456
> Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M.
> (BLZ 502 109 00) 600119052
>
>
>
Intel GmbH
Dornacher Strasse 1
85622 Feldkirchen/Muenchen, Deutschland
Sitz der Gesellschaft: Feldkirchen bei Muenchen
Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
Registergericht: Muenchen HRB 47456
Ust.-IdNr./VAT Registration No.: DE129385895
Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH V7 0/8] Intel(R) MPX register support
2013-11-11 8:24 ` Tedeschi, Walfred
@ 2013-11-11 10:12 ` Mark Kettenis
2013-11-11 11:48 ` Walfred Tedeschi
0 siblings, 1 reply; 23+ messages in thread
From: Mark Kettenis @ 2013-11-11 10:12 UTC (permalink / raw)
To: walfred.tedeschi; +Cc: gdb-patches
> From: "Tedeschi, Walfred" <walfred.tedeschi@intel.com>
> Date: Mon, 11 Nov 2013 08:15:36 +0000
>
> Hello Mark,
>
> I am not sure I got it right. Is this a ok to commit?
Pretty much.
> If so, I still would like to do some changes before proceeding.
> Basically I want to remove the x32 support since it makes no sense
> and a regression I caused. Those changes where mentioned here:
> https://sourceware.org/ml/gdb-patches/2013-10/msg00513.html
I'll await your patch then ;).
> To avoid sending you a full patch again my Idea is to send an ad-hoc
> patch to be added on top of my V7. While doing the commit then I
> would join then on the respective place.
Not sure what you mean by that. As long as all the intermediate
states compile and you don't introduce regressions for non-MPX
support, this should be fine.
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH V7 0/8] Intel(R) MPX register support
2013-11-11 10:12 ` Mark Kettenis
@ 2013-11-11 11:48 ` Walfred Tedeschi
2013-11-19 10:28 ` Tedeschi, Walfred
0 siblings, 1 reply; 23+ messages in thread
From: Walfred Tedeschi @ 2013-11-11 11:48 UTC (permalink / raw)
To: Mark Kettenis, gdb-patches
[-- Attachment #1: Type: text/plain, Size: 1620 bytes --]
Hi Mark,
What I mean is the appended patch. This is what I added on top of v7.
1. It removes MPX support for x32.
2. Improves i386-xstate.h macros. (identation was weird)
3. Fix the regression on MPX initialization on i386-tdep.c
I considered that to be easy to review than having all the patch series
again.
:)
Thanks a lot!
Best regards,
-Fred
Am 11/11/2013 11:08 AM, schrieb Mark Kettenis:
>> From: "Tedeschi, Walfred" <walfred.tedeschi@intel.com>
>> Date: Mon, 11 Nov 2013 08:15:36 +0000
>>
>> Hello Mark,
>>
>> I am not sure I got it right. Is this a ok to commit?
> Pretty much.
>
>> If so, I still would like to do some changes before proceeding.
>> Basically I want to remove the x32 support since it makes no sense
>> and a regression I caused. Those changes where mentioned here:
>> https://sourceware.org/ml/gdb-patches/2013-10/msg00513.html
> I'll await your patch then ;).
>
>> To avoid sending you a full patch again my Idea is to send an ad-hoc
>> patch to be added on top of my V7. While doing the commit then I
>> would join then on the respective place.
> Not sure what you mean by that. As long as all the intermediate
> states compile and you don't introduce regressions for non-MPX
> support, this should be fine.
Intel GmbH
Dornacher Strasse 1
85622 Feldkirchen/Muenchen, Deutschland
Sitz der Gesellschaft: Feldkirchen bei Muenchen
Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
Registergericht: Muenchen HRB 47456
Ust.-IdNr./VAT Registration No.: DE129385895
Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
[-- Attachment #2: mpx_no_x32.diff --]
[-- Type: text/plain, Size: 36874 bytes --]
diff --git a/gdb/amd64-linux-nat.c b/gdb/amd64-linux-nat.c
index a24b415..c2b20f3 100644
--- a/gdb/amd64-linux-nat.c
+++ b/gdb/amd64-linux-nat.c
@@ -1104,7 +1104,7 @@ amd64_linux_read_description (struct target_ops *ops)
if (is_64bit)
{
if (is_x32)
- return tdesc_x32_mpx_linux;
+ return tdesc_x32_avx_linux; /* No MPX on x32 using AVX. */
else
return tdesc_amd64_mpx_linux;
}
diff --git a/gdb/amd64-linux-tdep.c b/gdb/amd64-linux-tdep.c
index 9740aff..538238e 100644
--- a/gdb/amd64-linux-tdep.c
+++ b/gdb/amd64-linux-tdep.c
@@ -45,7 +45,6 @@
#include "features/i386/amd64-mpx-linux.c"
#include "features/i386/x32-linux.c"
#include "features/i386/x32-avx-linux.c"
-#include "features/i386/x32-mpx-linux.c"
/* The syscall's XML filename for i386. */
#define XML_SYSCALL_FILENAME_AMD64 "syscalls/amd64-linux.xml"
@@ -1296,7 +1295,7 @@ amd64_linux_core_read_description (struct gdbarch *gdbarch,
{
case I386_XSTATE_MPX_MASK:
if (gdbarch_ptr_bit (gdbarch) == 32)
- return tdesc_x32_mpx_linux;
+ return tdesc_x32_avx_linux; /* No x32 MPX falling back to AVX. */
else
return tdesc_amd64_mpx_linux;
case I386_XSTATE_AVX_MASK:
@@ -1636,5 +1635,4 @@ _initialize_amd64_linux_tdep (void)
initialize_tdesc_amd64_mpx_linux ();
initialize_tdesc_x32_linux ();
initialize_tdesc_x32_avx_linux ();
- initialize_tdesc_x32_mpx_linux ();
}
diff --git a/gdb/amd64-linux-tdep.h b/gdb/amd64-linux-tdep.h
index 5783fa3..6e85a5b 100644
--- a/gdb/amd64-linux-tdep.h
+++ b/gdb/amd64-linux-tdep.h
@@ -37,7 +37,6 @@ extern struct target_desc *tdesc_amd64_avx_linux;
extern struct target_desc *tdesc_amd64_mpx_linux;
extern struct target_desc *tdesc_x32_linux;
extern struct target_desc *tdesc_x32_avx_linux;
-extern struct target_desc *tdesc_x32_mpx_linux;
/* Enum that defines the syscall identifiers for amd64 linux.
Used for process record/replay, these will be translated into
diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index d0a62a7..1bb72ca 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -46,7 +46,6 @@
#include "features/i386/amd64-mpx.c"
#include "features/i386/x32.c"
#include "features/i386/x32-avx.c"
-#include "features/i386/x32-mpx.c"
#include "ax.h"
#include "ax-gdb.h"
@@ -3003,7 +3002,6 @@ _initialize_amd64_tdep (void)
initialize_tdesc_amd64_mpx ();
initialize_tdesc_x32 ();
initialize_tdesc_x32_avx ();
- initialize_tdesc_x32_mpx ();
}
\f
diff --git a/gdb/common/i386-xstate.h b/gdb/common/i386-xstate.h
index 37e68f8..e76ecc1 100644
--- a/gdb/common/i386-xstate.h
+++ b/gdb/common/i386-xstate.h
@@ -31,9 +31,9 @@
#define I386_XSTATE_X87_MASK I386_XSTATE_X87
#define I386_XSTATE_SSE_MASK (I386_XSTATE_X87 | I386_XSTATE_SSE)
#define I386_XSTATE_AVX_MASK (I386_XSTATE_SSE_MASK | I386_XSTATE_AVX)
-#define I386_XSTATE_MPX_MASK (I386_XSTATE_AVX_MASK | \
- I386_XSTATE_BNDREGS | \
- I386_XSTATE_BNDCFG)
+#define I386_XSTATE_MPX_MASK (I386_XSTATE_AVX_MASK \
+ | I386_XSTATE_BNDREGS \
+ | I386_XSTATE_BNDCFG)
#define I386_XSTATE_ALL_MASK I386_XSTATE_MPX_MASK
@@ -45,13 +45,10 @@
#define I386_XSTATE_MAX_SIZE 1088
/* Get I386 XSAVE extended state size. */
-#define I386_XSTATE_SIZE(XCR0) \
- (((XCR0) & I386_XSTATE_BNDCFG) != 0 \
- ? I386_XSTATE_BNDCFG_SIZE : \
- (((XCR0) & I386_XSTATE_BNDREGS) != 0 \
- ? I386_XSTATE_BNDCFG_SIZE : \
- (((XCR0) & I386_XSTATE_AVX_SIZE) != 0 \
- ? I386_XSTATE_AVX_SIZE : \
- I386_XSTATE_SSE_SIZE)))\
+#define I386_XSTATE_SIZE(XCR0) \
+ (((XCR0) & I386_XSTATE_BNDCFG) != 0 ? I386_XSTATE_BNDCFG_SIZE \
+ : (((XCR0) & I386_XSTATE_BNDREGS) != 0 ? I386_XSTATE_BNDCFG_SIZE \
+ : (((XCR0) & I386_XSTATE_AVX_SIZE) != 0 ? I386_XSTATE_AVX_SIZE \
+ : I386_XSTATE_SSE_SIZE)))
#endif /* I386_XSTATE_H */
diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index c0bc0de..1d78d1d 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -42,7 +42,6 @@ WHICH = aarch64 \
i386/amd64-mpx i386/amd64-mpx-linux \
i386/x32 i386/x32-linux \
i386/x32-avx i386/x32-avx-linux \
- i386/x32-mpx i386/x32-mpx-linux \
mips-linux mips-dsp-linux \
mips64-linux mips64-dsp-linux \
nios2-linux \
@@ -78,8 +77,6 @@ i386/x32-expedite = rbp,rsp,rip
i386/x32-linux-expedite = rbp,rsp,rip
i386/x32-avx-expedite = rbp,rsp,rip
i386/x32-avx-linux-expedite = rbp,rsp,rip
-i386/x32-mpx-expedite = rbp,rsp,rip
-i386/x32-mpx-linux-expedite = rbp,rsp,rip
mips-expedite = r29,pc
mips-dsp-expedite = r29,pc
mips64-expedite = r29,pc
@@ -141,7 +138,7 @@ $(outdir)/i386/i386-linux.dat: i386/32bit-core.xml i386/32bit-sse.xml \
i386/32bit-linux.xml
$(outdir)/i386/amd64.dat: i386/64bit-core.xml i386/64bit-sse.xml
$(outdir)/i386/amd64-linux.dat: i386/64bit-core.xml i386/64bit-sse.xml \
- i386/64bit-linux.xml
+ i386/64bit-linux.xml
$(outdir)/i386/i386-avx.dat: i386/32bit-core.xml i386/32bit-avx.xml
$(outdir)/i386/i386-avx-linux.dat: i386/32bit-core.xml i386/32bit-avx.xml \
i386/32bit-linux.xml
@@ -153,27 +150,14 @@ $(outdir)/i386/i386-mmx.dat: i386/32bit-core.xml
$(outdir)/i386/i386-mmx-linux.dat: i386/32bit-core.xml i386/32bit-linux.xml
$(outdir)/i386/amd64-avx.dat: i386/64bit-core.xml i386/64bit-avx.xml
$(outdir)/i386/amd64-avx-linux.dat: i386/64bit-core.xml i386/64bit-avx.xml \
- i386/64bit-linux.xml
+ i386/64bit-linux.xml
$(outdir)/i386/amd64-mpx-linux.dat: i386/64bit-core.xml i386/64bit-avx.xml \
i386/64bit-linux.xml i386/64bit-mpx.xml
$(outdir)/i386/amd64-mpx.dat: i386/64bit-core.xml i386/64bit-avx.xml \
i386/64bit-mpx.xml
$(outdir)/i386/x32.dat: i386/x32-core.xml i386/64bit-sse.xml
$(outdir)/i386/x32-linux.dat: i386/x32-core.xml i386/64bit-sse.xml \
- i386/64bit-linux.xml
+ i386/64bit-linux.xml
$(outdir)/i386/x32-avx.dat: i386/x32-core.xml i386/64bit-avx.xml
$(outdir)/i386/x32-avx-linux.dat: i386/x32-core.xml i386/64bit-avx.xml \
- i386/64bit-linux.xml
-$(outdir)/i386/amd64-mpx.dat: i386/64bit-core.xml i386/64bit-avx.xml \
- i386/64bit-mpx.xml
-$(outdir)/i386/amd64-mpx-linux.dat: i386/64bit-core.xml i386/64bit-avx.xml \
- i386/64bit-linux.xml i386/64bit-mpx.xml
-$(outdir)/i386/x32.dat: i386/x32-core.xml i386/64bit-sse.xml
-$(outdir)/i386/x32-linux.dat: i386/x32-core.xml i386/64bit-sse.xml \
- i386/64bit-linux.xml
-$(outdir)/i386/x32-avx.dat: i386/x32-core.xml i386/64bit-avx.xml
-$(outdir)/i386/x32-avx-linux.dat: i386/x32-core.xml i386/64bit-avx.xml \
- i386/64bit-linux.xml
-$(outdir)/i386/x32-mpx.dat: i386/x32-core.xml i386/64bit-avx.xml i386/64bit-mpx.xml
-$(outdir)/i386/x32-mpx-linux.dat: i386/x32-core.xml i386/64bit-avx.xml \
- i386/64bit-linux.xml i386/64bit-mpx.xml
+ i386/64bit-linux.xml
diff --git a/gdb/features/i386/x32-mpx-linux.c b/gdb/features/i386/x32-mpx-linux.c
deleted file mode 100644
index 44ee9c8..0000000
--- a/gdb/features/i386/x32-mpx-linux.c
+++ /dev/null
@@ -1,211 +0,0 @@
-/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
- Original: x32-mpx-linux.xml */
-
-#include "defs.h"
-#include "osabi.h"
-#include "target-descriptions.h"
-
-struct target_desc *tdesc_x32_mpx_linux;
-static void
-initialize_tdesc_x32_mpx_linux (void)
-{
- struct target_desc *result = allocate_target_description ();
- struct tdesc_feature *feature;
- struct tdesc_type *field_type;
- struct tdesc_type *type;
-
- set_tdesc_architecture (result, bfd_scan_arch ("i386:x64-32"));
-
- set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
-
- feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core");
- field_type = tdesc_create_flags (feature, "i386_eflags", 4);
- tdesc_add_flag (field_type, 0, "CF");
- tdesc_add_flag (field_type, 1, "");
- tdesc_add_flag (field_type, 2, "PF");
- tdesc_add_flag (field_type, 4, "AF");
- tdesc_add_flag (field_type, 6, "ZF");
- tdesc_add_flag (field_type, 7, "SF");
- tdesc_add_flag (field_type, 8, "TF");
- tdesc_add_flag (field_type, 9, "IF");
- tdesc_add_flag (field_type, 10, "DF");
- tdesc_add_flag (field_type, 11, "OF");
- tdesc_add_flag (field_type, 14, "NT");
- tdesc_add_flag (field_type, 16, "RF");
- tdesc_add_flag (field_type, 17, "VM");
- tdesc_add_flag (field_type, 18, "AC");
- tdesc_add_flag (field_type, 19, "VIF");
- tdesc_add_flag (field_type, 20, "VIP");
- tdesc_add_flag (field_type, 21, "ID");
-
- tdesc_create_reg (feature, "rax", 0, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rbx", 1, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rcx", 2, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rdx", 3, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rsi", 4, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rdi", 5, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rbp", 6, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rsp", 7, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rip", 16, 1, NULL, 64, "uint64");
- tdesc_create_reg (feature, "eflags", 17, 1, NULL, 32, "i386_eflags");
- tdesc_create_reg (feature, "cs", 18, 1, NULL, 32, "int32");
- tdesc_create_reg (feature, "ss", 19, 1, NULL, 32, "int32");
- tdesc_create_reg (feature, "ds", 20, 1, NULL, 32, "int32");
- tdesc_create_reg (feature, "es", 21, 1, NULL, 32, "int32");
- tdesc_create_reg (feature, "fs", 22, 1, NULL, 32, "int32");
- tdesc_create_reg (feature, "gs", 23, 1, NULL, 32, "int32");
- tdesc_create_reg (feature, "st0", 24, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "st1", 25, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "st2", 26, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "st3", 27, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "st4", 28, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "st5", 29, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "st6", 30, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "st7", 31, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "fctrl", 32, 1, "float", 32, "int");
- tdesc_create_reg (feature, "fstat", 33, 1, "float", 32, "int");
- tdesc_create_reg (feature, "ftag", 34, 1, "float", 32, "int");
- tdesc_create_reg (feature, "fiseg", 35, 1, "float", 32, "int");
- tdesc_create_reg (feature, "fioff", 36, 1, "float", 32, "int");
- tdesc_create_reg (feature, "foseg", 37, 1, "float", 32, "int");
- tdesc_create_reg (feature, "fooff", 38, 1, "float", 32, "int");
- tdesc_create_reg (feature, "fop", 39, 1, "float", 32, "int");
-
- feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse");
- field_type = tdesc_named_type (feature, "ieee_single");
- tdesc_create_vector (feature, "v4f", field_type, 4);
-
- field_type = tdesc_named_type (feature, "ieee_double");
- tdesc_create_vector (feature, "v2d", field_type, 2);
-
- field_type = tdesc_named_type (feature, "int8");
- tdesc_create_vector (feature, "v16i8", field_type, 16);
-
- field_type = tdesc_named_type (feature, "int16");
- tdesc_create_vector (feature, "v8i16", field_type, 8);
-
- field_type = tdesc_named_type (feature, "int32");
- tdesc_create_vector (feature, "v4i32", field_type, 4);
-
- field_type = tdesc_named_type (feature, "int64");
- tdesc_create_vector (feature, "v2i64", field_type, 2);
-
- type = tdesc_create_union (feature, "vec128");
- field_type = tdesc_named_type (feature, "v4f");
- tdesc_add_field (type, "v4_float", field_type);
- field_type = tdesc_named_type (feature, "v2d");
- tdesc_add_field (type, "v2_double", field_type);
- field_type = tdesc_named_type (feature, "v16i8");
- tdesc_add_field (type, "v16_int8", field_type);
- field_type = tdesc_named_type (feature, "v8i16");
- tdesc_add_field (type, "v8_int16", field_type);
- field_type = tdesc_named_type (feature, "v4i32");
- tdesc_add_field (type, "v4_int32", field_type);
- field_type = tdesc_named_type (feature, "v2i64");
- tdesc_add_field (type, "v2_int64", field_type);
- field_type = tdesc_named_type (feature, "uint128");
- tdesc_add_field (type, "uint128", field_type);
-
- field_type = tdesc_create_flags (feature, "i386_mxcsr", 4);
- tdesc_add_flag (field_type, 0, "IE");
- tdesc_add_flag (field_type, 1, "DE");
- tdesc_add_flag (field_type, 2, "ZE");
- tdesc_add_flag (field_type, 3, "OE");
- tdesc_add_flag (field_type, 4, "UE");
- tdesc_add_flag (field_type, 5, "PE");
- tdesc_add_flag (field_type, 6, "DAZ");
- tdesc_add_flag (field_type, 7, "IM");
- tdesc_add_flag (field_type, 8, "DM");
- tdesc_add_flag (field_type, 9, "ZM");
- tdesc_add_flag (field_type, 10, "OM");
- tdesc_add_flag (field_type, 11, "UM");
- tdesc_add_flag (field_type, 12, "PM");
- tdesc_add_flag (field_type, 15, "FZ");
-
- tdesc_create_reg (feature, "xmm0", 40, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm1", 41, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm2", 42, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm3", 43, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm4", 44, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm5", 45, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm6", 46, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm7", 47, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm8", 48, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm9", 49, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm10", 50, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm11", 51, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm12", 52, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm13", 53, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm14", 54, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm15", 55, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "mxcsr", 56, 1, "vector", 32, "i386_mxcsr");
-
- feature = tdesc_create_feature (result, "org.gnu.gdb.i386.linux");
- tdesc_create_reg (feature, "orig_rax", 57, 1, NULL, 64, "int");
-
- feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx");
- tdesc_create_reg (feature, "ymm0h", 58, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm1h", 59, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm2h", 60, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm3h", 61, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm4h", 62, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm5h", 63, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm6h", 64, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm7h", 65, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm8h", 66, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm9h", 67, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm10h", 68, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm11h", 69, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm12h", 70, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm13h", 71, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm14h", 72, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm15h", 73, 1, NULL, 128, "uint128");
-
- feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
- type = tdesc_create_struct (feature, "br128");
- field_type = tdesc_named_type (feature, "uint64");
- tdesc_add_field (type, "lbound", field_type);
- field_type = tdesc_named_type (feature, "uint64");
- tdesc_add_field (type, "ubound_raw", field_type);
-
- type = tdesc_create_struct (feature, "_bndstatus");
- tdesc_set_struct_size (type, 8);
- tdesc_add_bitfield (type, "bde", 2, 63);
- tdesc_add_bitfield (type, "error", 0, 1);
-
- type = tdesc_create_union (feature, "status");
- field_type = tdesc_named_type (feature, "data_ptr");
- tdesc_add_field (type, "raw", field_type);
- field_type = tdesc_named_type (feature, "_bndstatus");
- tdesc_add_field (type, "status", field_type);
-
- type = tdesc_create_struct (feature, "_bndcfgu");
- tdesc_set_struct_size (type, 8);
- tdesc_add_bitfield (type, "base", 12, 63);
- tdesc_add_bitfield (type, "reserved", 2, 11);
- tdesc_add_bitfield (type, "preserved", 1, 1);
- tdesc_add_bitfield (type, "enabled", 0, 0);
-
- type = tdesc_create_union (feature, "cfgu");
- field_type = tdesc_named_type (feature, "data_ptr");
- tdesc_add_field (type, "raw", field_type);
- field_type = tdesc_named_type (feature, "_bndcfgu");
- tdesc_add_field (type, "config", field_type);
-
- tdesc_create_reg (feature, "bnd0raw", 74, 1, NULL, 128, "br128");
- tdesc_create_reg (feature, "bnd1raw", 75, 1, NULL, 128, "br128");
- tdesc_create_reg (feature, "bnd2raw", 76, 1, NULL, 128, "br128");
- tdesc_create_reg (feature, "bnd3raw", 77, 1, NULL, 128, "br128");
- tdesc_create_reg (feature, "bndcfgu", 78, 1, NULL, 64, "cfgu");
- tdesc_create_reg (feature, "bndstatus", 79, 1, NULL, 64, "status");
-
- tdesc_x32_mpx_linux = result;
-}
diff --git a/gdb/features/i386/x32-mpx-linux.xml b/gdb/features/i386/x32-mpx-linux.xml
deleted file mode 100644
index f803eb3..0000000
--- a/gdb/features/i386/x32-mpx-linux.xml
+++ /dev/null
@@ -1,19 +0,0 @@
-<?xml version="1.0"?>
-<!-- Copyright (C) 2013 Free Software Foundation, Inc.
-
- Copying and distribution of this file, with or without modification,
- are permitted in any medium without royalty provided the copyright
- notice and this notice are preserved. -->
-
-<!-- X32 with MPX - Includes Linux-only special "register". -->
-
-<!DOCTYPE target SYSTEM "gdb-target.dtd">
-<target>
- <architecture>i386:x64-32</architecture>
- <osabi>GNU/Linux</osabi>
- <xi:include href="x32-core.xml"/>
- <xi:include href="64bit-sse.xml"/>
- <xi:include href="64bit-linux.xml"/>
- <xi:include href="64bit-avx.xml"/>
- <xi:include href="64bit-mpx.xml"/>
-</target>
diff --git a/gdb/features/i386/x32-mpx.c b/gdb/features/i386/x32-mpx.c
deleted file mode 100644
index 57e2c5f..0000000
--- a/gdb/features/i386/x32-mpx.c
+++ /dev/null
@@ -1,206 +0,0 @@
-/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
- Original: x32-mpx.xml */
-
-#include "defs.h"
-#include "osabi.h"
-#include "target-descriptions.h"
-
-struct target_desc *tdesc_x32_mpx;
-static void
-initialize_tdesc_x32_mpx (void)
-{
- struct target_desc *result = allocate_target_description ();
- struct tdesc_feature *feature;
- struct tdesc_type *field_type;
- struct tdesc_type *type;
-
- set_tdesc_architecture (result, bfd_scan_arch ("i386:x64-32"));
-
- feature = tdesc_create_feature (result, "org.gnu.gdb.i386.core");
- field_type = tdesc_create_flags (feature, "i386_eflags", 4);
- tdesc_add_flag (field_type, 0, "CF");
- tdesc_add_flag (field_type, 1, "");
- tdesc_add_flag (field_type, 2, "PF");
- tdesc_add_flag (field_type, 4, "AF");
- tdesc_add_flag (field_type, 6, "ZF");
- tdesc_add_flag (field_type, 7, "SF");
- tdesc_add_flag (field_type, 8, "TF");
- tdesc_add_flag (field_type, 9, "IF");
- tdesc_add_flag (field_type, 10, "DF");
- tdesc_add_flag (field_type, 11, "OF");
- tdesc_add_flag (field_type, 14, "NT");
- tdesc_add_flag (field_type, 16, "RF");
- tdesc_add_flag (field_type, 17, "VM");
- tdesc_add_flag (field_type, 18, "AC");
- tdesc_add_flag (field_type, 19, "VIF");
- tdesc_add_flag (field_type, 20, "VIP");
- tdesc_add_flag (field_type, 21, "ID");
-
- tdesc_create_reg (feature, "rax", 0, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rbx", 1, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rcx", 2, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rdx", 3, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rsi", 4, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rdi", 5, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rbp", 6, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rsp", 7, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "int64");
- tdesc_create_reg (feature, "rip", 16, 1, NULL, 64, "uint64");
- tdesc_create_reg (feature, "eflags", 17, 1, NULL, 32, "i386_eflags");
- tdesc_create_reg (feature, "cs", 18, 1, NULL, 32, "int32");
- tdesc_create_reg (feature, "ss", 19, 1, NULL, 32, "int32");
- tdesc_create_reg (feature, "ds", 20, 1, NULL, 32, "int32");
- tdesc_create_reg (feature, "es", 21, 1, NULL, 32, "int32");
- tdesc_create_reg (feature, "fs", 22, 1, NULL, 32, "int32");
- tdesc_create_reg (feature, "gs", 23, 1, NULL, 32, "int32");
- tdesc_create_reg (feature, "st0", 24, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "st1", 25, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "st2", 26, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "st3", 27, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "st4", 28, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "st5", 29, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "st6", 30, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "st7", 31, 1, NULL, 80, "i387_ext");
- tdesc_create_reg (feature, "fctrl", 32, 1, "float", 32, "int");
- tdesc_create_reg (feature, "fstat", 33, 1, "float", 32, "int");
- tdesc_create_reg (feature, "ftag", 34, 1, "float", 32, "int");
- tdesc_create_reg (feature, "fiseg", 35, 1, "float", 32, "int");
- tdesc_create_reg (feature, "fioff", 36, 1, "float", 32, "int");
- tdesc_create_reg (feature, "foseg", 37, 1, "float", 32, "int");
- tdesc_create_reg (feature, "fooff", 38, 1, "float", 32, "int");
- tdesc_create_reg (feature, "fop", 39, 1, "float", 32, "int");
-
- feature = tdesc_create_feature (result, "org.gnu.gdb.i386.sse");
- field_type = tdesc_named_type (feature, "ieee_single");
- tdesc_create_vector (feature, "v4f", field_type, 4);
-
- field_type = tdesc_named_type (feature, "ieee_double");
- tdesc_create_vector (feature, "v2d", field_type, 2);
-
- field_type = tdesc_named_type (feature, "int8");
- tdesc_create_vector (feature, "v16i8", field_type, 16);
-
- field_type = tdesc_named_type (feature, "int16");
- tdesc_create_vector (feature, "v8i16", field_type, 8);
-
- field_type = tdesc_named_type (feature, "int32");
- tdesc_create_vector (feature, "v4i32", field_type, 4);
-
- field_type = tdesc_named_type (feature, "int64");
- tdesc_create_vector (feature, "v2i64", field_type, 2);
-
- type = tdesc_create_union (feature, "vec128");
- field_type = tdesc_named_type (feature, "v4f");
- tdesc_add_field (type, "v4_float", field_type);
- field_type = tdesc_named_type (feature, "v2d");
- tdesc_add_field (type, "v2_double", field_type);
- field_type = tdesc_named_type (feature, "v16i8");
- tdesc_add_field (type, "v16_int8", field_type);
- field_type = tdesc_named_type (feature, "v8i16");
- tdesc_add_field (type, "v8_int16", field_type);
- field_type = tdesc_named_type (feature, "v4i32");
- tdesc_add_field (type, "v4_int32", field_type);
- field_type = tdesc_named_type (feature, "v2i64");
- tdesc_add_field (type, "v2_int64", field_type);
- field_type = tdesc_named_type (feature, "uint128");
- tdesc_add_field (type, "uint128", field_type);
-
- field_type = tdesc_create_flags (feature, "i386_mxcsr", 4);
- tdesc_add_flag (field_type, 0, "IE");
- tdesc_add_flag (field_type, 1, "DE");
- tdesc_add_flag (field_type, 2, "ZE");
- tdesc_add_flag (field_type, 3, "OE");
- tdesc_add_flag (field_type, 4, "UE");
- tdesc_add_flag (field_type, 5, "PE");
- tdesc_add_flag (field_type, 6, "DAZ");
- tdesc_add_flag (field_type, 7, "IM");
- tdesc_add_flag (field_type, 8, "DM");
- tdesc_add_flag (field_type, 9, "ZM");
- tdesc_add_flag (field_type, 10, "OM");
- tdesc_add_flag (field_type, 11, "UM");
- tdesc_add_flag (field_type, 12, "PM");
- tdesc_add_flag (field_type, 15, "FZ");
-
- tdesc_create_reg (feature, "xmm0", 40, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm1", 41, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm2", 42, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm3", 43, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm4", 44, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm5", 45, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm6", 46, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm7", 47, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm8", 48, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm9", 49, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm10", 50, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm11", 51, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm12", 52, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm13", 53, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm14", 54, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "xmm15", 55, 1, NULL, 128, "vec128");
- tdesc_create_reg (feature, "mxcsr", 56, 1, "vector", 32, "i386_mxcsr");
-
- feature = tdesc_create_feature (result, "org.gnu.gdb.i386.avx");
- tdesc_create_reg (feature, "ymm0h", 57, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm1h", 58, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm2h", 59, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm3h", 60, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm4h", 61, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm5h", 62, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm6h", 63, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm7h", 64, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm8h", 65, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm9h", 66, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm10h", 67, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm11h", 68, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm12h", 69, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm13h", 70, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm14h", 71, 1, NULL, 128, "uint128");
- tdesc_create_reg (feature, "ymm15h", 72, 1, NULL, 128, "uint128");
-
- feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
- type = tdesc_create_struct (feature, "br128");
- field_type = tdesc_named_type (feature, "uint64");
- tdesc_add_field (type, "lbound", field_type);
- field_type = tdesc_named_type (feature, "uint64");
- tdesc_add_field (type, "ubound_raw", field_type);
-
- type = tdesc_create_struct (feature, "_bndstatus");
- tdesc_set_struct_size (type, 8);
- tdesc_add_bitfield (type, "bde", 2, 63);
- tdesc_add_bitfield (type, "error", 0, 1);
-
- type = tdesc_create_union (feature, "status");
- field_type = tdesc_named_type (feature, "data_ptr");
- tdesc_add_field (type, "raw", field_type);
- field_type = tdesc_named_type (feature, "_bndstatus");
- tdesc_add_field (type, "status", field_type);
-
- type = tdesc_create_struct (feature, "_bndcfgu");
- tdesc_set_struct_size (type, 8);
- tdesc_add_bitfield (type, "base", 12, 63);
- tdesc_add_bitfield (type, "reserved", 2, 11);
- tdesc_add_bitfield (type, "preserved", 1, 1);
- tdesc_add_bitfield (type, "enabled", 0, 0);
-
- type = tdesc_create_union (feature, "cfgu");
- field_type = tdesc_named_type (feature, "data_ptr");
- tdesc_add_field (type, "raw", field_type);
- field_type = tdesc_named_type (feature, "_bndcfgu");
- tdesc_add_field (type, "config", field_type);
-
- tdesc_create_reg (feature, "bnd0raw", 73, 1, NULL, 128, "br128");
- tdesc_create_reg (feature, "bnd1raw", 74, 1, NULL, 128, "br128");
- tdesc_create_reg (feature, "bnd2raw", 75, 1, NULL, 128, "br128");
- tdesc_create_reg (feature, "bnd3raw", 76, 1, NULL, 128, "br128");
- tdesc_create_reg (feature, "bndcfgu", 77, 1, NULL, 64, "cfgu");
- tdesc_create_reg (feature, "bndstatus", 78, 1, NULL, 64, "status");
-
- tdesc_x32_mpx = result;
-}
diff --git a/gdb/features/i386/x32-mpx.xml b/gdb/features/i386/x32-mpx.xml
deleted file mode 100644
index 3bed447..0000000
--- a/gdb/features/i386/x32-mpx.xml
+++ /dev/null
@@ -1,17 +0,0 @@
-<?xml version="1.0"?>
-<!-- Copyright (C) 2013 Free Software Foundation, Inc.
-
- Copying and distribution of this file, with or without modification,
- are permitted in any medium without royalty provided the copyright
- notice and this notice are preserved. -->
-
-<!-- X32 with MPX -->
-
-<!DOCTYPE target SYSTEM "gdb-target.dtd">
-<target>
- <architecture>i386:x64-32</architecture>
- <xi:include href="x32-core.xml"/>
- <xi:include href="64bit-sse.xml"/>
- <xi:include href="64bit-avx.xml"/>
- <xi:include href="64bit-mpx.xml"/>
-</target>
diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
index 81d223c..1814155 100644
--- a/gdb/gdbserver/Makefile.in
+++ b/gdb/gdbserver/Makefile.in
@@ -348,7 +348,6 @@ clean:
rm -f i386-mmx.c i386-mmx-linux.c
rm -f x32.c x32-linux.c
rm -f x32-avx.c x32-avx-linux.c
- rm -f x32-mpx.c x32-mpx-linux.c
@$(MAKE) $(FLAGS_TO_PASS) DO=$@ "DODIRS=$(SUBDIRS)" subdir_do
maintainer-clean realclean distclean: clean
@@ -685,10 +684,6 @@ x32-avx.c : $(srcdir)/../regformats/i386/x32-avx.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/x32-avx.dat x32-avx.c
x32-avx-linux.c : $(srcdir)/../regformats/i386/x32-avx-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/x32-avx-linux.dat x32-avx-linux.c
-x32-mpx.c : $(srcdir)/../regformats/i386/x32-mpx.dat $(regdat_sh)
- $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/x32-mpx.dat x32-mpx.c
-x32-mpx-linux.c : $(srcdir)/../regformats/i386/x32-mpx-linux.dat $(regdat_sh)
- $(SHELL) $(regdat_sh) $(srcdir)/../regformats/i386/x32-mpx-linux.dat x32-mpx-linux.c
reg-xtensa.c : $(srcdir)/../regformats/reg-xtensa.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-xtensa.dat reg-xtensa.c
reg-tilegx.c : $(srcdir)/../regformats/reg-tilegx.dat $(regdat_sh)
diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
index 276452e..32d935a 100644
--- a/gdb/gdbserver/configure.srv
+++ b/gdb/gdbserver/configure.srv
@@ -26,8 +26,8 @@ srv_hostio_err_objs="hostio-errno.o"
srv_i386_regobj="i386.o i386-avx.o i386-mpx.o i386-mmx.o"
srv_i386_linux_regobj="i386-linux.o i386-avx-linux.o i386-mpx-linux.o i386-mmx-linux.o"
-srv_amd64_regobj="amd64.o amd64-avx.o amd64-mpx.o x32.o x32-avx.o x32-mpx.o"
-srv_amd64_linux_regobj="amd64-linux.o amd64-avx-linux.o amd64-mpx-linux.o x32-linux.o x32-avx-linux.o x32-mpx-linux.o"
+srv_amd64_regobj="amd64.o amd64-avx.o amd64-mpx.o x32.o x32-avx.o"
+srv_amd64_linux_regobj="amd64-linux.o amd64-avx-linux.o amd64-mpx-linux.o x32-linux.o x32-avx-linux.o"
ipa_i386_linux_regobj=i386-linux-ipa.o
ipa_amd64_linux_regobj=amd64-linux-ipa.o
@@ -37,7 +37,7 @@ srv_i386_64bit_xmlfiles="i386/64bit-core.xml i386/64bit-sse.xml i386/64bit-avx.x
srv_i386_xmlfiles="i386/i386.xml i386/i386-avx.xml i386/i386-mpx.xml i386/i386-mmx.xml $srv_i386_32bit_xmlfiles"
srv_amd64_xmlfiles="i386/amd64.xml i386/amd64-avx.xml i386/x32.xml i386/x32-avx.xml i386/amd64-mpx.xml $srv_i386_64bit_xmlfiles"
srv_i386_linux_xmlfiles="i386/i386-linux.xml i386/i386-avx-linux.xml i386/i386-mmx-linux.xml i386/32bit-linux.xml i386/i386-mpx-linux.xml $srv_i386_32bit_xmlfiles"
-srv_amd64_linux_xmlfiles="i386/amd64-linux.xml i386/amd64-avx-linux.xml i386/64bit-linux.xml i386/amd64-mpx-linux.xml i386/x32-linux.xml i386/x32-avx-linux.xml i386/x32-mpx-linux.xml $srv_i386_64bit_xmlfiles"
+srv_amd64_linux_xmlfiles="i386/amd64-linux.xml i386/amd64-avx-linux.xml i386/64bit-linux.xml i386/amd64-mpx-linux.xml i386/x32-linux.xml i386/x32-avx-linux.xml $srv_i386_64bit_xmlfiles"
# Linux object files. This is so we don't have to repeat
diff --git a/gdb/gdbserver/linux-x86-low.c b/gdb/gdbserver/linux-x86-low.c
index 8c2bfc9..e8505bf 100644
--- a/gdb/gdbserver/linux-x86-low.c
+++ b/gdb/gdbserver/linux-x86-low.c
@@ -55,10 +55,6 @@ extern const struct target_desc *tdesc_x32_linux;
void init_registers_x32_avx_linux (void);
extern const struct target_desc *tdesc_x32_avx_linux;
-/* Defined in auto-generated file x32-mpx-linux.c. */
-void init_registers_x32_mpx_linux (void);
-extern const struct target_desc *tdesc_x32_mpx_linux;
-
#endif
/* Defined in auto-generated file i386-linux.c. */
@@ -1362,9 +1358,7 @@ x86_linux_read_description (void)
{
switch (xcr0 & I386_XSTATE_ALL_MASK)
{
- case I386_XSTATE_MPX_MASK:
- return tdesc_x32_mpx_linux;
-
+ case I386_XSTATE_MPX_MASK: /* No MPX on x32. */
case I386_XSTATE_AVX_MASK:
return tdesc_x32_avx_linux;
@@ -3393,7 +3387,6 @@ initialize_low_arch (void)
init_registers_x32_linux ();
init_registers_x32_avx_linux ();
- init_registers_x32_mpx_linux ();
tdesc_amd64_linux_no_xml = xmalloc (sizeof (struct target_desc));
copy_target_description (tdesc_amd64_linux_no_xml, tdesc_amd64_linux);
diff --git a/gdb/i386-linux-tdep.h b/gdb/i386-linux-tdep.h
index f0e2c19..54b5058 100644
--- a/gdb/i386-linux-tdep.h
+++ b/gdb/i386-linux-tdep.h
@@ -29,7 +29,7 @@
/* Register number for the "orig_eax" pseudo-register. If this
pseudo-register contains a value >= 0 it is interpreted as the
system call number that the kernel is supposed to restart. */
-#define I386_LINUX_ORIG_EAX_REGNUM I386_BNDSTATUS_REGNUM + 1
+#define I386_LINUX_ORIG_EAX_REGNUM I386_MPX_NUM_REGS
/* Total number of registers for GNU/Linux. */
#define I386_LINUX_NUM_REGS (I386_LINUX_ORIG_EAX_REGNUM + 1)
diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index f1efa94..ecd34e0 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -7732,7 +7732,7 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep,
{
tdep->xcr0 = I386_XSTATE_MPX_MASK;
- if (tdep->bnd0r_regnum == 0)
+ if (tdep->bnd0r_regnum < 0)
{
tdep->mpx_register_names = i386_mpx_names;
tdep->bnd0r_regnum = I386_BND0R_REGNUM;
diff --git a/gdb/regformats/i386/x32-mpx-linux.dat b/gdb/regformats/i386/x32-mpx-linux.dat
deleted file mode 100644
index f8fb244..0000000
--- a/gdb/regformats/i386/x32-mpx-linux.dat
+++ /dev/null
@@ -1,84 +0,0 @@
-# DO NOT EDIT: generated from i386/x32-mpx-linux.xml
-name:x32_mpx_linux
-xmltarget:x32-mpx-linux.xml
-expedite:rbp,rsp,rip
-64:rax
-64:rbx
-64:rcx
-64:rdx
-64:rsi
-64:rdi
-64:rbp
-64:rsp
-64:r8
-64:r9
-64:r10
-64:r11
-64:r12
-64:r13
-64:r14
-64:r15
-64:rip
-32:eflags
-32:cs
-32:ss
-32:ds
-32:es
-32:fs
-32:gs
-80:st0
-80:st1
-80:st2
-80:st3
-80:st4
-80:st5
-80:st6
-80:st7
-32:fctrl
-32:fstat
-32:ftag
-32:fiseg
-32:fioff
-32:foseg
-32:fooff
-32:fop
-128:xmm0
-128:xmm1
-128:xmm2
-128:xmm3
-128:xmm4
-128:xmm5
-128:xmm6
-128:xmm7
-128:xmm8
-128:xmm9
-128:xmm10
-128:xmm11
-128:xmm12
-128:xmm13
-128:xmm14
-128:xmm15
-32:mxcsr
-64:orig_rax
-128:ymm0h
-128:ymm1h
-128:ymm2h
-128:ymm3h
-128:ymm4h
-128:ymm5h
-128:ymm6h
-128:ymm7h
-128:ymm8h
-128:ymm9h
-128:ymm10h
-128:ymm11h
-128:ymm12h
-128:ymm13h
-128:ymm14h
-128:ymm15h
-128:bnd0raw
-128:bnd1raw
-128:bnd2raw
-128:bnd3raw
-64:bndcfgu
-64:bndstatus
diff --git a/gdb/regformats/i386/x32-mpx.dat b/gdb/regformats/i386/x32-mpx.dat
deleted file mode 100644
index 5104f6d..0000000
--- a/gdb/regformats/i386/x32-mpx.dat
+++ /dev/null
@@ -1,83 +0,0 @@
-# DO NOT EDIT: generated from i386/x32-mpx.xml
-name:x32_mpx
-xmltarget:x32-mpx.xml
-expedite:rbp,rsp,rip
-64:rax
-64:rbx
-64:rcx
-64:rdx
-64:rsi
-64:rdi
-64:rbp
-64:rsp
-64:r8
-64:r9
-64:r10
-64:r11
-64:r12
-64:r13
-64:r14
-64:r15
-64:rip
-32:eflags
-32:cs
-32:ss
-32:ds
-32:es
-32:fs
-32:gs
-80:st0
-80:st1
-80:st2
-80:st3
-80:st4
-80:st5
-80:st6
-80:st7
-32:fctrl
-32:fstat
-32:ftag
-32:fiseg
-32:fioff
-32:foseg
-32:fooff
-32:fop
-128:xmm0
-128:xmm1
-128:xmm2
-128:xmm3
-128:xmm4
-128:xmm5
-128:xmm6
-128:xmm7
-128:xmm8
-128:xmm9
-128:xmm10
-128:xmm11
-128:xmm12
-128:xmm13
-128:xmm14
-128:xmm15
-32:mxcsr
-128:ymm0h
-128:ymm1h
-128:ymm2h
-128:ymm3h
-128:ymm4h
-128:ymm5h
-128:ymm6h
-128:ymm7h
-128:ymm8h
-128:ymm9h
-128:ymm10h
-128:ymm11h
-128:ymm12h
-128:ymm13h
-128:ymm14h
-128:ymm15h
-128:bnd0raw
-128:bnd1raw
-128:bnd2raw
-128:bnd3raw
-64:bndcfgu
-64:bndstatus
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH V7 8/8] Add MPX feature description to GDB manual.
2013-10-09 12:01 ` [PATCH V7 8/8] Add MPX feature description to GDB manual Walfred Tedeschi
@ 2013-11-18 20:26 ` Pedro Alves
2013-11-19 8:32 ` Tedeschi, Walfred
0 siblings, 1 reply; 23+ messages in thread
From: Pedro Alves @ 2013-11-18 20:26 UTC (permalink / raw)
To: Walfred Tedeschi; +Cc: tromey, mark.kettenis, gdb-patches
On 10/09/2013 01:00 PM, Walfred Tedeschi wrote:
> +The @samp{org.gnu.gdb.i386.mpx} is an optional feature representing Intel(R)
> +Memory Protection Extension (MPX). MPX adds the bound registers @samp{BND0}
> +@footnote{Capital letters were used to distinguish between architecture
> +registers and pseudo registers.
I'd suggest s/were/are. (here and elsewhere)
> A set of pseudo register for the bound
> +registers were created to simplify the display.} through @samp{BND3}. Bound
> +registers store a pair of 64-bit values which are the lower bound and upper
> +bound. Bounds are effective addresses or memory locations. The upper bounds
> +are architecturally represented in 1's complement form. A bound having lower
> +bound = 0, and upper bound = 0 (1's complement of all bits set) will allow
> +access to the entire address space.
> +
> +In order to take the upper bound complement
> +of one into account the @samp{BND0} through @samp{BND3} are described in GDB
> +as @samp{bnd0raw} through @samp{bnd3raw}. Pseudo registers @samp{bnd0} through
> +@samp{bnd3} display the upper bound performing the complement of one operation,
> +i.e.@ when upper bound in @samp{bnd0raw} is 0 in the GDB @samp{bnd0} it will be
> +@code{0xfff...}. The feature adds the following registers:
This node is mostly meant for remote stub writers.
I'd suggest only describing here what's included in the description (the raw
registers), and describe the pseudo registers elsewhere where regular users will
look (making sure to word things in a user-friendly way, perhaps with examples.)
Perhaps in Architectures->i386 (x86 Architecture-specific Issues)?
> +
> +@itemize @minus
> +@item
> +@samp{bnd0raw} through @samp{bnd3raw} for i386, amd64 and x32.
> +@item
> +@samp{bndcfgu} and @samp{bndstatus} for i386, amd64 and x32.
> +@end itemize
> +
> The @samp{org.gnu.gdb.i386.linux} feature is optional. It should
> describe a single register, @samp{orig_eax}.
--
Pedro Alves
^ permalink raw reply [flat|nested] 23+ messages in thread
* RE: [PATCH V7 8/8] Add MPX feature description to GDB manual.
2013-11-18 20:26 ` Pedro Alves
@ 2013-11-19 8:32 ` Tedeschi, Walfred
0 siblings, 0 replies; 23+ messages in thread
From: Tedeschi, Walfred @ 2013-11-19 8:32 UTC (permalink / raw)
To: Pedro Alves; +Cc: tromey, mark.kettenis, gdb-patches
Hello Pedro,
Thanks a lot for your feedback. I will incorporate all.
Best Regards,
-Fred
-----Original Message-----
From: Pedro Alves [mailto:palves@redhat.com]
Sent: Monday, November 18, 2013 8:20 PM
To: Tedeschi, Walfred
Cc: tromey@redhat.com; mark.kettenis@xs4all.nl; gdb-patches@sourceware.org
Subject: Re: [PATCH V7 8/8] Add MPX feature description to GDB manual.
On 10/09/2013 01:00 PM, Walfred Tedeschi wrote:
> +The @samp{org.gnu.gdb.i386.mpx} is an optional feature representing
> +Intel(R) Memory Protection Extension (MPX). MPX adds the bound
> +registers @samp{BND0} @footnote{Capital letters were used to
> +distinguish between architecture registers and pseudo registers.
I'd suggest s/were/are. (here and elsewhere)
> A set of pseudo register for the bound
> +registers were created to simplify the display.} through @samp{BND3}.
> +Bound registers store a pair of 64-bit values which are the lower
> +bound and upper bound. Bounds are effective addresses or memory
> +locations. The upper bounds are architecturally represented in 1's
> +complement form. A bound having lower bound = 0, and upper bound = 0
> +(1's complement of all bits set) will allow access to the entire address space.
> +
> +In order to take the upper bound complement of one into account the
> +@samp{BND0} through @samp{BND3} are described in GDB as
> +@samp{bnd0raw} through @samp{bnd3raw}. Pseudo registers @samp{bnd0}
> +through @samp{bnd3} display the upper bound performing the complement
> +of one operation, i.e.@ when upper bound in @samp{bnd0raw} is 0 in
> +the GDB @samp{bnd0} it will be @code{0xfff...}. The feature adds the following registers:
This node is mostly meant for remote stub writers.
I'd suggest only describing here what's included in the description (the raw registers), and describe the pseudo registers elsewhere where regular users will look (making sure to word things in a user-friendly way, perhaps with examples.)
Perhaps in Architectures->i386 (x86 Architecture-specific Issues)?
> +
> +@itemize @minus
> +@item
> +@samp{bnd0raw} through @samp{bnd3raw} for i386, amd64 and x32.
> +@item
> +@samp{bndcfgu} and @samp{bndstatus} for i386, amd64 and x32.
> +@end itemize
> +
> The @samp{org.gnu.gdb.i386.linux} feature is optional. It should
> describe a single register, @samp{orig_eax}.
--
Pedro Alves
Intel GmbH
Dornacher Strasse 1
85622 Feldkirchen/Muenchen, Deutschland
Sitz der Gesellschaft: Feldkirchen bei Muenchen
Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
Registergericht: Muenchen HRB 47456
Ust.-IdNr./VAT Registration No.: DE129385895
Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
^ permalink raw reply [flat|nested] 23+ messages in thread
* RE: [PATCH V7 0/8] Intel(R) MPX register support
2013-11-11 11:48 ` Walfred Tedeschi
@ 2013-11-19 10:28 ` Tedeschi, Walfred
2013-11-19 11:13 ` Mark Kettenis
0 siblings, 1 reply; 23+ messages in thread
From: Tedeschi, Walfred @ 2013-11-19 10:28 UTC (permalink / raw)
To: Tedeschi, Walfred, Mark Kettenis, gdb-patches
Hello Mark,
Do you agree with this diff? Of course I will distribute it where it belongs to in the patch.
Thanks a lot for your support and best regards,
-Fred
-----Original Message-----
From: gdb-patches-owner@sourceware.org [mailto:gdb-patches-owner@sourceware.org] On Behalf Of Walfred Tedeschi
Sent: Monday, November 11, 2013 11:53 AM
To: Mark Kettenis; gdb-patches@sourceware.org
Subject: Re: [PATCH V7 0/8] Intel(R) MPX register support
Hi Mark,
What I mean is the appended patch. This is what I added on top of v7.
1. It removes MPX support for x32.
2. Improves i386-xstate.h macros. (identation was weird) 3. Fix the regression on MPX initialization on i386-tdep.c
I considered that to be easy to review than having all the patch series again.
:)
Thanks a lot!
Best regards,
-Fred
Am 11/11/2013 11:08 AM, schrieb Mark Kettenis:
>> From: "Tedeschi, Walfred" <walfred.tedeschi@intel.com>
>> Date: Mon, 11 Nov 2013 08:15:36 +0000
>>
>> Hello Mark,
>>
>> I am not sure I got it right. Is this a ok to commit?
> Pretty much.
>
>> If so, I still would like to do some changes before proceeding.
>> Basically I want to remove the x32 support since it makes no sense
>> and a regression I caused. Those changes where mentioned here:
>> https://sourceware.org/ml/gdb-patches/2013-10/msg00513.html
> I'll await your patch then ;).
>
>> To avoid sending you a full patch again my Idea is to send an ad-hoc
>> patch to be added on top of my V7. While doing the commit then I
>> would join then on the respective place.
> Not sure what you mean by that. As long as all the intermediate
> states compile and you don't introduce regressions for non-MPX
> support, this should be fine.
Intel GmbH
Dornacher Strasse 1
85622 Feldkirchen/Muenchen, Deutschland
Sitz der Gesellschaft: Feldkirchen bei Muenchen
Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
Registergericht: Muenchen HRB 47456
Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
Intel GmbH
Dornacher Strasse 1
85622 Feldkirchen/Muenchen, Deutschland
Sitz der Gesellschaft: Feldkirchen bei Muenchen
Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
Registergericht: Muenchen HRB 47456
Ust.-IdNr./VAT Registration No.: DE129385895
Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH V7 0/8] Intel(R) MPX register support
2013-11-19 10:28 ` Tedeschi, Walfred
@ 2013-11-19 11:13 ` Mark Kettenis
2013-11-19 12:15 ` Tedeschi, Walfred
0 siblings, 1 reply; 23+ messages in thread
From: Mark Kettenis @ 2013-11-19 11:13 UTC (permalink / raw)
To: walfred.tedeschi; +Cc: gdb-patches
> From: "Tedeschi, Walfred" <walfred.tedeschi@intel.com>
> Date: Tue, 19 Nov 2013 08:31:19 +0000
>
> Hello Mark,
>
> Do you agree with this diff? Of course I will distribute it where it belongs to in the patch.
>
> Thanks a lot for your support and best regards,
> -Fred
Sorry, thought I already replied to your message.
It's not enitrely clear to me why MPX for x32 can't work, but since I
don't particularly care about x32 (and even think it's a silly idea
and its implementation on Linux is actually broken) I'm not going to
let that stand in the way of getting this stuff in.
I also think that this whole splitting up of diffs is going too far.
Why don't you just squash this one together with all the other ones
and commit them in one go?
Cheers,
Mark
> -----Original Message-----
> From: gdb-patches-owner@sourceware.org [mailto:gdb-patches-owner@sourceware.org] On Behalf Of Walfred Tedeschi
> Sent: Monday, November 11, 2013 11:53 AM
> To: Mark Kettenis; gdb-patches@sourceware.org
> Subject: Re: [PATCH V7 0/8] Intel(R) MPX register support
>
> Hi Mark,
>
> What I mean is the appended patch. This is what I added on top of v7.
>
> 1. It removes MPX support for x32.
> 2. Improves i386-xstate.h macros. (identation was weird) 3. Fix the regression on MPX initialization on i386-tdep.c
>
> I considered that to be easy to review than having all the patch series again.
> :)
>
> Thanks a lot!
>
> Best regards,
> -Fred
>
>
> Am 11/11/2013 11:08 AM, schrieb Mark Kettenis:
> >> From: "Tedeschi, Walfred" <walfred.tedeschi@intel.com>
> >> Date: Mon, 11 Nov 2013 08:15:36 +0000
> >>
> >> Hello Mark,
> >>
> >> I am not sure I got it right. Is this a ok to commit?
> > Pretty much.
> >
> >> If so, I still would like to do some changes before proceeding.
> >> Basically I want to remove the x32 support since it makes no sense
> >> and a regression I caused. Those changes where mentioned here:
> >> https://sourceware.org/ml/gdb-patches/2013-10/msg00513.html
> > I'll await your patch then ;).
> >
> >> To avoid sending you a full patch again my Idea is to send an ad-hoc
> >> patch to be added on top of my V7. While doing the commit then I
> >> would join then on the respective place.
> > Not sure what you mean by that. As long as all the intermediate
> > states compile and you don't introduce regressions for non-MPX
> > support, this should be fine.
>
> Intel GmbH
> Dornacher Strasse 1
> 85622 Feldkirchen/Muenchen, Deutschland
> Sitz der Gesellschaft: Feldkirchen bei Muenchen
> Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
> Registergericht: Muenchen HRB 47456
> Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
> Intel GmbH
> Dornacher Strasse 1
> 85622 Feldkirchen/Muenchen, Deutschland
> Sitz der Gesellschaft: Feldkirchen bei Muenchen
> Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
> Registergericht: Muenchen HRB 47456
> Ust.-IdNr./VAT Registration No.: DE129385895
> Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
>
>
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* RE: [PATCH V7 0/8] Intel(R) MPX register support
2013-11-19 11:13 ` Mark Kettenis
@ 2013-11-19 12:15 ` Tedeschi, Walfred
0 siblings, 0 replies; 23+ messages in thread
From: Tedeschi, Walfred @ 2013-11-19 12:15 UTC (permalink / raw)
To: Mark Kettenis; +Cc: gdb-patches
Hello Mark,
In fact this small diff was only intended to be reviewed, changes for that are already spread among the other commits.
So I am going to commit everything except documentation, Pedro did some comments on that today.
THANKS A LOT!!!
Regards,
-Fred
-----Original Message-----
From: Mark Kettenis [mailto:mark.kettenis@xs4all.nl]
Sent: Tuesday, November 19, 2013 11:28 AM
To: Tedeschi, Walfred
Cc: gdb-patches@sourceware.org
Subject: Re: [PATCH V7 0/8] Intel(R) MPX register support
> From: "Tedeschi, Walfred" <walfred.tedeschi@intel.com>
> Date: Tue, 19 Nov 2013 08:31:19 +0000
>
> Hello Mark,
>
> Do you agree with this diff? Of course I will distribute it where it belongs to in the patch.
>
> Thanks a lot for your support and best regards, -Fred
Sorry, thought I already replied to your message.
It's not enitrely clear to me why MPX for x32 can't work, but since I don't particularly care about x32 (and even think it's a silly idea and its implementation on Linux is actually broken) I'm not going to let that stand in the way of getting this stuff in.
I also think that this whole splitting up of diffs is going too far.
Why don't you just squash this one together with all the other ones and commit them in one go?
Cheers,
Mark
> -----Original Message-----
> From: gdb-patches-owner@sourceware.org
> [mailto:gdb-patches-owner@sourceware.org] On Behalf Of Walfred
> Tedeschi
> Sent: Monday, November 11, 2013 11:53 AM
> To: Mark Kettenis; gdb-patches@sourceware.org
> Subject: Re: [PATCH V7 0/8] Intel(R) MPX register support
>
> Hi Mark,
>
> What I mean is the appended patch. This is what I added on top of v7.
>
> 1. It removes MPX support for x32.
> 2. Improves i386-xstate.h macros. (identation was weird) 3. Fix the
> regression on MPX initialization on i386-tdep.c
>
> I considered that to be easy to review than having all the patch series again.
> :)
>
> Thanks a lot!
>
> Best regards,
> -Fred
>
>
> Am 11/11/2013 11:08 AM, schrieb Mark Kettenis:
> >> From: "Tedeschi, Walfred" <walfred.tedeschi@intel.com>
> >> Date: Mon, 11 Nov 2013 08:15:36 +0000
> >>
> >> Hello Mark,
> >>
> >> I am not sure I got it right. Is this a ok to commit?
> > Pretty much.
> >
> >> If so, I still would like to do some changes before proceeding.
> >> Basically I want to remove the x32 support since it makes no sense
> >> and a regression I caused. Those changes where mentioned here:
> >> https://sourceware.org/ml/gdb-patches/2013-10/msg00513.html
> > I'll await your patch then ;).
> >
> >> To avoid sending you a full patch again my Idea is to send an
> >> ad-hoc patch to be added on top of my V7. While doing the commit
> >> then I would join then on the respective place.
> > Not sure what you mean by that. As long as all the intermediate
> > states compile and you don't introduce regressions for non-MPX
> > support, this should be fine.
>
> Intel GmbH
> Dornacher Strasse 1
> 85622 Feldkirchen/Muenchen, Deutschland Sitz der Gesellschaft:
> Feldkirchen bei Muenchen
> Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas
> Lusk
> Registergericht: Muenchen HRB 47456
> Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M.
> (BLZ 502 109 00) 600119052 Intel GmbH Dornacher Strasse 1
> 85622 Feldkirchen/Muenchen, Deutschland Sitz der Gesellschaft:
> Feldkirchen bei Muenchen
> Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas
> Lusk
> Registergericht: Muenchen HRB 47456
> Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M.
> (BLZ 502 109 00) 600119052
>
>
>
Intel GmbH
Dornacher Strasse 1
85622 Feldkirchen/Muenchen, Deutschland
Sitz der Gesellschaft: Feldkirchen bei Muenchen
Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
Registergericht: Muenchen HRB 47456
Ust.-IdNr./VAT Registration No.: DE129385895
Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH V7 5/8] Add MPX support to gdbserver.
2013-10-09 12:01 ` [PATCH V7 5/8] Add MPX support to gdbserver Walfred Tedeschi
@ 2013-11-19 15:14 ` Pedro Alves
2013-11-19 15:43 ` Tedeschi, Walfred
0 siblings, 1 reply; 23+ messages in thread
From: Pedro Alves @ 2013-11-19 15:14 UTC (permalink / raw)
To: Walfred Tedeschi; +Cc: tromey, mark.kettenis, gdb-patches
(Huh, I thought I had pushed the send button for this
yesterday, but turns out I didn't.)
On 10/09/2013 01:00 PM, Walfred Tedeschi wrote:
> 2013-05-22 Walfred Tedeschi <walfred.tedeschi@intel.com>
>
> gdbserver/
> * Makefile.in: Add i386-mpx.c, i386-mpx-linux.c, amd64-mpx.c,
> amd64-mpx-linux.c, x32-mpx.c and x32-mpx-linux.c generation.
>
> * configure.srv (srv_i386_regobj): Add i386-mpx.o.
> (srv_i386_linux_regobj): Add i386-mpx-linux.o.
> (srv_amd64_regobj): Add amd64-mpx.o.
> (srv_amd64_linux_regobj): Add amd64-mpx-linux.o.
> (srv_i386_32bit_xmlfiles): Add i386/32bit-mpx.xml.
> (srv_i386_64bit_xmlfiles): Add i386/64bit-mpx.xml.
>
> * i387-fp.c (num_pl_bnd_register) Added constant.
> (num_pl_bnd_cfg_registers) Added constant.
> (struct i387_xsave) Added reserved area and MPX fields.
> (i387_cache_to_xsave, i387_xsave_to_cache) Add MPX.
>
> * linux-x86-low.c (init_registers_i386_mpx_linux): Declare new
> function.
> (tdesc_i386_mpx_linux): Add MPX amd64 target.
> (init_registers_amd64_mpx_linux): Declare new function.
> (tdesc_amd64_mpx_linux): Add MPX amd64 target.
> (init_registers_x32_mpx_linux): Declare new function.
> (tdesc_x32_mpx_linux): Add MPX amd64 target.
> (x86_64_regmap): Add MPX registers.
> (x86_linux_read_description): Add MPX case.
> (initialize_low_arch): Initialize MPX targets.
FWIW, this looks fine from a add-new-port-to-gdbserver perspective.
--
Pedro Alves
^ permalink raw reply [flat|nested] 23+ messages in thread
* RE: [PATCH V7 5/8] Add MPX support to gdbserver.
2013-11-19 15:14 ` Pedro Alves
@ 2013-11-19 15:43 ` Tedeschi, Walfred
0 siblings, 0 replies; 23+ messages in thread
From: Tedeschi, Walfred @ 2013-11-19 15:43 UTC (permalink / raw)
To: Pedro Alves, gdb-patches
Hi Pedro,
Thanks a lot and Best regards,
-Fred
-----Original Message-----
From: Pedro Alves [mailto:palves@redhat.com]
Sent: Tuesday, November 19, 2013 4:10 PM
To: Tedeschi, Walfred
Cc: tromey@redhat.com; mark.kettenis@xs4all.nl; gdb-patches@sourceware.org
Subject: Re: [PATCH V7 5/8] Add MPX support to gdbserver.
(Huh, I thought I had pushed the send button for this yesterday, but turns out I didn't.)
On 10/09/2013 01:00 PM, Walfred Tedeschi wrote:
> 2013-05-22 Walfred Tedeschi <walfred.tedeschi@intel.com>
>
> gdbserver/
> * Makefile.in: Add i386-mpx.c, i386-mpx-linux.c, amd64-mpx.c,
> amd64-mpx-linux.c, x32-mpx.c and x32-mpx-linux.c generation.
>
> * configure.srv (srv_i386_regobj): Add i386-mpx.o.
> (srv_i386_linux_regobj): Add i386-mpx-linux.o.
> (srv_amd64_regobj): Add amd64-mpx.o.
> (srv_amd64_linux_regobj): Add amd64-mpx-linux.o.
> (srv_i386_32bit_xmlfiles): Add i386/32bit-mpx.xml.
> (srv_i386_64bit_xmlfiles): Add i386/64bit-mpx.xml.
>
> * i387-fp.c (num_pl_bnd_register) Added constant.
> (num_pl_bnd_cfg_registers) Added constant.
> (struct i387_xsave) Added reserved area and MPX fields.
> (i387_cache_to_xsave, i387_xsave_to_cache) Add MPX.
>
> * linux-x86-low.c (init_registers_i386_mpx_linux): Declare new
> function.
> (tdesc_i386_mpx_linux): Add MPX amd64 target.
> (init_registers_amd64_mpx_linux): Declare new function.
> (tdesc_amd64_mpx_linux): Add MPX amd64 target.
> (init_registers_x32_mpx_linux): Declare new function.
> (tdesc_x32_mpx_linux): Add MPX amd64 target.
> (x86_64_regmap): Add MPX registers.
> (x86_linux_read_description): Add MPX case.
> (initialize_low_arch): Initialize MPX targets.
FWIW, this looks fine from a add-new-port-to-gdbserver perspective.
--
Pedro Alves
Intel GmbH
Dornacher Strasse 1
85622 Feldkirchen/Muenchen, Deutschland
Sitz der Gesellschaft: Feldkirchen bei Muenchen
Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
Registergericht: Muenchen HRB 47456
Ust.-IdNr./VAT Registration No.: DE129385895
Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2013-11-19 15:31 UTC | newest]
Thread overview: 23+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-10-09 12:01 [PATCH V7 0/8] Intel(R) MPX register support Walfred Tedeschi
2013-10-09 12:01 ` [PATCH V7 8/8] Add MPX feature description to GDB manual Walfred Tedeschi
2013-11-18 20:26 ` Pedro Alves
2013-11-19 8:32 ` Tedeschi, Walfred
2013-10-09 12:01 ` [PATCH V7 5/8] Add MPX support to gdbserver Walfred Tedeschi
2013-11-19 15:14 ` Pedro Alves
2013-11-19 15:43 ` Tedeschi, Walfred
2013-10-09 12:01 ` [PATCH V7 3/8] Add MPX support for i386 Walfred Tedeschi
2013-10-09 12:01 ` [PATCH V7 4/8] MPX for amd64 Walfred Tedeschi
2013-10-09 12:01 ` [PATCH V7 6/8] Add pretty-printer for MPX bnd registers Walfred Tedeschi
2013-10-09 12:01 ` [PATCH V7 7/8] Add MPX registers tests Walfred Tedeschi
2013-10-09 12:01 ` [PATCH V7 1/8] Fix conditions in creating a bitfield Walfred Tedeschi
2013-10-09 12:02 ` [PATCH V7 2/8] Add MPX registers XML files Walfred Tedeschi
2013-10-20 19:23 ` [PATCH V7 0/8] Intel(R) MPX register support Mark Kettenis
2013-10-21 11:33 ` Tedeschi, Walfred
2013-11-04 9:07 ` Tedeschi, Walfred
2013-11-04 10:30 ` Mark Kettenis
2013-11-11 8:24 ` Tedeschi, Walfred
2013-11-11 10:12 ` Mark Kettenis
2013-11-11 11:48 ` Walfred Tedeschi
2013-11-19 10:28 ` Tedeschi, Walfred
2013-11-19 11:13 ` Mark Kettenis
2013-11-19 12:15 ` Tedeschi, Walfred
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