From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 105641 invoked by alias); 17 Feb 2016 05:51:57 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 105628 invoked by uid 89); 17 Feb 2016 05:51:55 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.7 required=5.0 tests=AWL,BAYES_40,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 spammy=cfa, H*r:Wed, dispense, Hx-languages-length:1889 X-HELO: eusmtp01.atmel.com Received: from eusmtp01.atmel.com (HELO eusmtp01.atmel.com) (212.144.249.242) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Wed, 17 Feb 2016 05:51:54 +0000 Received: from HNOCHT02.corp.atmel.com (10.161.30.162) by eusmtp01.atmel.com (10.161.101.30) with Microsoft SMTP Server (TLS) id 14.3.235.1; Wed, 17 Feb 2016 06:51:46 +0100 Received: from CHELT0346 (10.161.30.18) by HNOCHT02.corp.atmel.com (10.161.30.162) with Microsoft SMTP Server (TLS) id 14.3.235.1; Wed, 17 Feb 2016 06:51:49 +0100 Date: Wed, 17 Feb 2016 05:51:00 -0000 From: Pitchumani Sivanupandi To: Kevin Buettner CC: Subject: Re: [patch] [v2] Enable dwarf unwind for AVR target Message-ID: <20160217055143.GA7128@CHELT0346> References: <20160203094534.0ec066aa@pinnacle.lan> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20160203094534.0ec066aa@pinnacle.lan> User-Agent: Mutt/1.5.24 (2015-08-30) X-IsSubscribed: yes X-SW-Source: 2016-02/txt/msg00497.txt.bz2 On Wed, Feb 03, 2016 at 09:45:34AM -0700, Kevin Buettner wrote: > On Fri, 8 Jan 2016 08:52:33 +0000 > "Sivanupandi, Pitchumani" wrote: > > > Dwarf debug info generated by avr-gcc denotes the return address by register > > 36 which is not an actual register. > > e.g. .debug_frame > > (--snip--) > > 00000000 00000010 ffffffff CIE > > Version: 1 > > Augmentation: "" > > Code alignment factor: 2 > > Data alignment factor: -1 > > Return address column: 36 > > > > DW_CFA_def_cfa: r32 ofs 3 > > DW_CFA_offset: r36 at cfa-2 > > (--snip--) > > > > The fix is to add a pseudo register (36 - AVR_DWARF2_PC_REGNUM/LR) to gdb to > > map return address register. Register name is "LR" (link register). When dwarf > > frame unwind asks for PC, target function will read return address value from > > AVR_DWARF2_PC_REGNUM's CFA address. > > The usual way to handle this problem is to define a dwarf2_reg_to_regnum > method which maps the index of DWARF's return address column to GDB's PC > register. So, for the AVR, you'd map 36 to 35. > > If you do this, I think you can dispense with all of the stuff > which adds and manipulates the pseudo-register. > > Here's an example (from rx-tdep.c) where this is done: > > static int > rx_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) > { > if (0 <= reg && reg <= 15) > return reg; > else if (reg == 16) > return RX_PSW_REGNUM; > else if (reg == 17) > return RX_PC_REGNUM; > else > return -1; > } > > Then, in rx_gdbarch_init, this function is registered as follows: > > set_gdbarch_dwarf2_reg_to_regnum (gdbarch, rx_dwarf_reg_to_regnum); > > Hope this helps... Sorry for delayed response. Thanks for the comments. It is working, however I found few regressions when running the gdb tests. I'll check those and post the updated patch. Regards, Pitchumani