From: Stafford Horne <shorne@gmail.com>
To: Simon Marchi <simon.marchi@polymtl.ca>
Cc: GDB patches <gdb-patches@sourceware.org>,
Openrisc <openrisc@lists.librecores.org>,
Mike Frysinger <vapier@gentoo.org>,
Peter Gavin <pgavin@gmail.com>
Subject: Re: [PATCH v4 1/5] sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd])
Date: Thu, 31 Aug 2017 22:33:00 -0000 [thread overview]
Message-ID: <20170831223321.GE2609@lianli.shorne-pla.net> (raw)
In-Reply-To: <fefc0514a4141b314871eb50efc9abf8@polymtl.ca>
On Thu, Aug 31, 2017 at 11:10:47PM +0200, Simon Marchi wrote:
> On 2017-05-29 16:47, Stafford Horne wrote:
> > diff --git a/sim/common/sim-fpu.c b/sim/common/sim-fpu.c
> > index 0d4d08a..1a79e71 100644
> > --- a/sim/common/sim-fpu.c
> > +++ b/sim/common/sim-fpu.c
> > @@ -41,6 +41,7 @@ along with this program. If not, see
> > <http://www.gnu.org/licenses/>. */
> > #include "sim-io.h"
> > #include "sim-assert.h"
> >
> > +#include <math.h> /* for drem, remove when soft-float version is
> > implemented */
> >
> > /* Debugging support.
> > If digits is -1, then print all digits. */
> > @@ -1551,6 +1552,68 @@ sim_fpu_div (sim_fpu *f,
> >
> >
> > INLINE_SIM_FPU (int)
> > +sim_fpu_rem (sim_fpu *f,
> > + const sim_fpu *l,
> > + const sim_fpu *r)
> > +{
> > + if (sim_fpu_is_snan (l))
> > + {
> > + *f = *l;
> > + f->class = sim_fpu_class_qnan;
> > + return sim_fpu_status_invalid_snan;
> > + }
> > + if (sim_fpu_is_snan (r))
> > + {
> > + *f = *r;
> > + f->class = sim_fpu_class_qnan;
> > + return sim_fpu_status_invalid_snan;
> > + }
> > + if (sim_fpu_is_qnan (l))
> > + {
> > + *f = *l;
> > + f->class = sim_fpu_class_qnan;
> > + return 0;
> > + }
> > + if (sim_fpu_is_qnan (r))
> > + {
> > + *f = *r;
> > + f->class = sim_fpu_class_qnan;
> > + return 0;
> > + }
> > + if (sim_fpu_is_infinity (l))
> > + {
> > + *f = sim_fpu_qnan;
> > + return sim_fpu_status_invalid_irx;
> > + }
> > + if (sim_fpu_is_zero (r))
> > + {
> > + *f = sim_fpu_qnan;
> > + return sim_fpu_status_invalid_div0;
> > + }
> > + if (sim_fpu_is_zero (l))
> > + {
> > + *f = *l;
> > + return 0;
> > + }
> > + if (sim_fpu_is_infinity (r))
> > + {
> > + *f = *l;
> > + return 0;
> > + }
> > + {
> > + /* TODO: Implement remainder here. */
> > +
> > + sim_fpu_map lval, rval, fval;
> > + lval.i = pack_fpu(l, 1);
> > + rval.i = pack_fpu(r, 1);
> > + fval.d = remainder(lval.d, rval.d);
> > + unpack_fpu(f, fval.i, 1);
> > + return 0;
> > + }
>
> I can't tell for sure because I'm not maintainer of sim/, but I suppose that
> we would need a proper implementation that doesn't use the host fpu here.
Right, as mentioned in the summary, this is the one place that is a bit
controversial.
I was thinking its kind of strange to not allow using libmath, since
integer math runs on the host system, why not FPU as well?
(probably to implement this I would just copy from libmath in the end:)
https://sourceware.org/git/?p=glibc.git;a=blob_plain;f=sysdeps/ieee754/dbl-64/e_remainder.c;hb=HEAD
There are actually no OpenRISC cores that implement the remainder
instruction (as its a bit complicated to do in hardware and not really used
much). I could remove it if the implementation is beyond the scope of this
series.
> > +}
> > +
> > +
> > +INLINE_SIM_FPU (int)
> > sim_fpu_max (sim_fpu *f,
> > const sim_fpu *l,
> > const sim_fpu *r)
> > diff --git a/sim/common/sim-fpu.h b/sim/common/sim-fpu.h
> > index d27d80a..c108f1f 100644
> > --- a/sim/common/sim-fpu.h
> > +++ b/sim/common/sim-fpu.h
> > @@ -151,6 +151,7 @@ typedef enum
> > sim_fpu_status_overflow = 4096,
> > sim_fpu_status_underflow = 8192,
> > sim_fpu_status_denorm = 16384,
> > + sim_fpu_status_invalid_irx = 32768, /* (inf % X) */
> > } sim_fpu_status;
>
> I think it would make sense to put the new entry with the other "invalid"
> ones and shift the others.
OK.
Thanks for the review and picking this up.
-Stafford
>
> Simon
next prev parent reply other threads:[~2017-08-31 22:33 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-29 14:47 [PATCH v4 0/5] sim port for OpenRISC Stafford Horne
2017-05-29 14:47 ` [PATCH v4 1/5] sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd]) Stafford Horne
2017-08-31 21:11 ` Simon Marchi
2017-08-31 22:33 ` Stafford Horne [this message]
2017-09-01 7:57 ` Simon Marchi
2017-09-01 8:29 ` Stafford Horne
2017-05-29 14:47 ` [PATCH v4 2/5] sim: cgen: add MUL2OFSI and MUL1OFSI macros (needed for OR1K l.mul[u]) Stafford Horne
2017-09-04 20:32 ` Simon Marchi
2017-09-04 21:05 ` Stafford Horne
2017-05-29 14:48 ` [PATCH v4 3/5] sim: or1k: add or1k target to sim Stafford Horne
2017-09-04 21:14 ` Simon Marchi
2017-09-04 21:49 ` Stafford Horne
2017-09-05 18:53 ` Simon Marchi
2017-05-29 14:49 ` [PATCH v4 5/5] sim: testsuite: add testsuite for or1k sim Stafford Horne
2017-06-13 10:15 ` [PATCH v4 0/5] sim port for OpenRISC Stafford Horne
2017-08-10 13:22 ` Stafford Horne
2017-08-23 6:29 ` Stafford Horne
2017-08-31 19:57 ` Simon Marchi
2017-08-31 21:58 ` Stafford Horne
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