From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 6171 invoked by alias); 31 Aug 2017 22:33:29 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 6112 invoked by uid 89); 31 Aug 2017 22:33:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-23.9 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,RCVD_IN_SORBS_SPAM,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-pg0-f53.google.com Received: from mail-pg0-f53.google.com (HELO mail-pg0-f53.google.com) (74.125.83.53) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 31 Aug 2017 22:33:26 +0000 Received: by mail-pg0-f53.google.com with SMTP id t193so2887543pgc.1 for ; Thu, 31 Aug 2017 15:33:26 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=11zmrBstXYS2z+tyWJVo/gMt5Goju9Go043XisIEnmU=; b=cKDGTum1jUWSA9+7fK64PYJNXpdQKnel2C30s76mXHrJHCxSd9wdlPXTnErl41oHnn qwv7mSU0jTbZBrmRyjZXNkdjEVUdfWuEVu6+/ebYLnCPZqzJ96eD3Q7Ok06gPGlz/eyS oUAhHmqPcv16YgXZNFgKNMAo5Oo6MMy2coO8tR2ZCooDXMMYziz8x460O3oZROR7Xfd9 Y7cygA6lgHXNF3L+2+WIG1nFMN73umlcZzm/UXcL8r+s3KgN3bD6MHUwfRGPzWA0Udcv xIKo03v4TKgqBEVuqzws3hhopy15dqG1WKwSyQRKwPSC9GTcynmYvXLhPfEWGJ/dfow+ ihnA== X-Gm-Message-State: AHYfb5gvCd9kCo6HatbclSytzx9O0tgscOClO0e0JoCUBh691+dh/boR VdR7yGS+2A5Tuw== X-Google-Smtp-Source: ADKCNb52Krz57HI58rWVtwTGHkJG4DMeHetiZ4vTCP3Ivmt9GoeD+9HPe96F313mdgtLfpTEVsgalw== X-Received: by 10.84.212.136 with SMTP id e8mr4103573pli.83.1504218804650; Thu, 31 Aug 2017 15:33:24 -0700 (PDT) Received: from localhost (g206.61-45-91.ppp.wakwak.ne.jp. [61.45.91.206]) by smtp.gmail.com with ESMTPSA id v187sm744066pgv.67.2017.08.31.15.33.23 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 31 Aug 2017 15:33:23 -0700 (PDT) Date: Thu, 31 Aug 2017 22:33:00 -0000 From: Stafford Horne To: Simon Marchi Cc: GDB patches , Openrisc , Mike Frysinger , Peter Gavin Subject: Re: [PATCH v4 1/5] sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd]) Message-ID: <20170831223321.GE2609@lianli.shorne-pla.net> References: <643da7dcb7d9913a1b239f3aae0ebaebb85a00d7.1496066478.git.shorne@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.8.3 (2017-05-23) X-IsSubscribed: yes X-SW-Source: 2017-08/txt/msg00555.txt.bz2 On Thu, Aug 31, 2017 at 11:10:47PM +0200, Simon Marchi wrote: > On 2017-05-29 16:47, Stafford Horne wrote: > > diff --git a/sim/common/sim-fpu.c b/sim/common/sim-fpu.c > > index 0d4d08a..1a79e71 100644 > > --- a/sim/common/sim-fpu.c > > +++ b/sim/common/sim-fpu.c > > @@ -41,6 +41,7 @@ along with this program. If not, see > > . */ > > #include "sim-io.h" > > #include "sim-assert.h" > > > > +#include /* for drem, remove when soft-float version is > > implemented */ > > > > /* Debugging support. > > If digits is -1, then print all digits. */ > > @@ -1551,6 +1552,68 @@ sim_fpu_div (sim_fpu *f, > > > > > > INLINE_SIM_FPU (int) > > +sim_fpu_rem (sim_fpu *f, > > + const sim_fpu *l, > > + const sim_fpu *r) > > +{ > > + if (sim_fpu_is_snan (l)) > > + { > > + *f = *l; > > + f->class = sim_fpu_class_qnan; > > + return sim_fpu_status_invalid_snan; > > + } > > + if (sim_fpu_is_snan (r)) > > + { > > + *f = *r; > > + f->class = sim_fpu_class_qnan; > > + return sim_fpu_status_invalid_snan; > > + } > > + if (sim_fpu_is_qnan (l)) > > + { > > + *f = *l; > > + f->class = sim_fpu_class_qnan; > > + return 0; > > + } > > + if (sim_fpu_is_qnan (r)) > > + { > > + *f = *r; > > + f->class = sim_fpu_class_qnan; > > + return 0; > > + } > > + if (sim_fpu_is_infinity (l)) > > + { > > + *f = sim_fpu_qnan; > > + return sim_fpu_status_invalid_irx; > > + } > > + if (sim_fpu_is_zero (r)) > > + { > > + *f = sim_fpu_qnan; > > + return sim_fpu_status_invalid_div0; > > + } > > + if (sim_fpu_is_zero (l)) > > + { > > + *f = *l; > > + return 0; > > + } > > + if (sim_fpu_is_infinity (r)) > > + { > > + *f = *l; > > + return 0; > > + } > > + { > > + /* TODO: Implement remainder here. */ > > + > > + sim_fpu_map lval, rval, fval; > > + lval.i = pack_fpu(l, 1); > > + rval.i = pack_fpu(r, 1); > > + fval.d = remainder(lval.d, rval.d); > > + unpack_fpu(f, fval.i, 1); > > + return 0; > > + } > > I can't tell for sure because I'm not maintainer of sim/, but I suppose that > we would need a proper implementation that doesn't use the host fpu here. Right, as mentioned in the summary, this is the one place that is a bit controversial. I was thinking its kind of strange to not allow using libmath, since integer math runs on the host system, why not FPU as well? (probably to implement this I would just copy from libmath in the end:) https://sourceware.org/git/?p=glibc.git;a=blob_plain;f=sysdeps/ieee754/dbl-64/e_remainder.c;hb=HEAD There are actually no OpenRISC cores that implement the remainder instruction (as its a bit complicated to do in hardware and not really used much). I could remove it if the implementation is beyond the scope of this series. > > +} > > + > > + > > +INLINE_SIM_FPU (int) > > sim_fpu_max (sim_fpu *f, > > const sim_fpu *l, > > const sim_fpu *r) > > diff --git a/sim/common/sim-fpu.h b/sim/common/sim-fpu.h > > index d27d80a..c108f1f 100644 > > --- a/sim/common/sim-fpu.h > > +++ b/sim/common/sim-fpu.h > > @@ -151,6 +151,7 @@ typedef enum > > sim_fpu_status_overflow = 4096, > > sim_fpu_status_underflow = 8192, > > sim_fpu_status_denorm = 16384, > > + sim_fpu_status_invalid_irx = 32768, /* (inf % X) */ > > } sim_fpu_status; > > I think it would make sense to put the new entry with the other "invalid" > ones and shift the others. OK. Thanks for the review and picking this up. -Stafford > > Simon