From: Trent Piepho <tpiepho@impinj.com>
To: "gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
Cc: Trent Piepho <tpiepho@impinj.com>
Subject: [PATCH v2 1/2] Record ARM THUMB2 PLD/PLI cache instructions
Date: Mon, 01 Oct 2018 22:08:00 -0000 [thread overview]
Message-ID: <20181001220826.10429-1-tpiepho@impinj.com> (raw)
These weren't decoded correctly and trigger an unknown instruction error
when recording. The ARM format was handled, but not the 32-bit THUMB2
format.
Since they are only hints that may affect cache state, there is nothing
to record.
gdb/ChangeLog
2018-09-28 Trent Piepho <tpiepho@impinj.com>
PR gdb/23725
* gdb/arm-tdep.c (thumb2_record_ld_mem_hints): Decode thumb2 PLD/PLI
---
gdb/arm-tdep.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index c3280ee211..90936ada8e 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -12683,6 +12683,14 @@ thumb2_record_ld_mem_hints (insn_decode_record *thumb2_insn_r)
record_buf);
return ARM_RECORD_SUCCESS;
}
+ else
+ {
+ if (bits (thumb2_insn_r->arm_insn, 20, 22) == 0x1)
+ {
+ /* Handle PLD, PLI affect only caches, so nothing to record */
+ return ARM_RECORD_SUCCESS;
+ }
+ }
return ARM_RECORD_FAILURE;
}
--
2.14.4
next reply other threads:[~2018-10-01 22:08 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-01 22:08 Trent Piepho [this message]
2018-10-01 22:08 ` [PATCH v2 2/2] Check thumb2 load/store and cache hit addressing mode Trent Piepho
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