From: Jim Wilson <jimw@sifive.com>
To: gdb-patches@sourceware.org
Cc: Andrew Burgess <andrew.burgess@embecosm.com>,
Jim Wilson <jimw@sifive.com>
Subject: [PATCH 2/2] RISC-V: NaN-box FP values smaller than an FP register.
Date: Fri, 19 Oct 2018 21:50:00 -0000 [thread overview]
Message-ID: <20181019214953.9010-1-jimw@sifive.com> (raw)
In-Reply-To: <CAFyWVabswzH+cwN6aBgPbP-ccUjUC2iya+HUyLjYzxLgUaM_Zg@mail.gmail.com>
The hardware requires that values in FP registers be NaN-boxed, so we must
extend them with 1's instead of 0's as we do for integer values.
gdb/
* riscv-tdep.c (riscv_push_dummy_call) <in_reg>: Check for value in
FP reg smaller than FP reg size, and fill with -1 instead of 0.
---
gdb/riscv-tdep.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index a4d732f6f9..5be889d300 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -2408,7 +2408,12 @@ riscv_push_dummy_call (struct gdbarch *gdbarch,
gdb_byte tmp [sizeof (ULONGEST)];
gdb_assert (info->argloc[0].c_length <= info->length);
- memset (tmp, 0, sizeof (tmp));
+ /* FP values in FP registers must be NaN-boxed. */
+ if (riscv_is_fp_regno_p (info->argloc[0].loc_data.regno)
+ && info->argloc[0].c_length < call_info.flen)
+ memset (tmp, -1, sizeof (tmp));
+ else
+ memset (tmp, 0, sizeof (tmp));
memcpy (tmp, info->contents, info->argloc[0].c_length);
regcache->cooked_write (info->argloc[0].loc_data.regno, tmp);
second_arg_length =
@@ -2447,7 +2452,12 @@ riscv_push_dummy_call (struct gdbarch *gdbarch,
gdb_assert ((riscv_is_fp_regno_p (info->argloc[1].loc_data.regno)
&& second_arg_length <= call_info.flen)
|| second_arg_length <= call_info.xlen);
- memset (tmp, 0, sizeof (tmp));
+ /* FP values in FP registers must be NaN-boxed. */
+ if (riscv_is_fp_regno_p (info->argloc[1].loc_data.regno)
+ && second_arg_length < call_info.flen)
+ memset (tmp, -1, sizeof (tmp));
+ else
+ memset (tmp, 0, sizeof (tmp));
memcpy (tmp, second_arg_data, second_arg_length);
regcache->cooked_write (info->argloc[1].loc_data.regno, tmp);
}
--
2.17.1
next prev parent reply other threads:[~2018-10-19 21:50 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-19 21:46 [PATCH 0/2] RISC-V: Improve FP register support Jim Wilson
2018-10-19 21:49 ` [PATCH 1/2] RISC-V: Print FP regs as union of float types Jim Wilson
2018-10-20 21:38 ` Kevin Buettner
2018-10-22 21:22 ` Jim Wilson
2018-10-19 21:50 ` Jim Wilson [this message]
2018-10-20 21:39 ` [PATCH 2/2] RISC-V: NaN-box FP values smaller than an FP register Kevin Buettner
2018-10-22 21:21 ` Jim Wilson
2018-10-23 11:18 ` [PATCH 0/2] RISC-V: Improve FP register support Pedro Alves
2018-10-25 23:49 ` Jim Wilson
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