From: Kamil Rytarowski <n54@gmx.com>
To: gdb-patches@sourceware.org
Cc: simark@simark.ca, cbiesinger@google.com, Kamil Rytarowski <n54@gmx.com>
Subject: [PATCH v4] Add support for NetBSD threads in sparc-nat.c
Date: Tue, 17 Mar 2020 17:46:03 +0100 [thread overview]
Message-ID: <20200317164603.10840-1-n54@gmx.com> (raw)
In-Reply-To: <f779383b-7223-b1b5-fdc6-98d25bbeb28e@simark.ca>
NetBSD ptrace(2) accepts thread id (LWP) as the 4th argument for threads.
This file is still shared with other targets that use different 4th argument
type, that is always unused.
---
gdb/sparc-nat.c | 50 ++++++++++++++++++++++---------------------------
1 file changed, 22 insertions(+), 28 deletions(-)
diff --git a/gdb/sparc-nat.c b/gdb/sparc-nat.c
index dff0f521565..10cc01375ed 100644
--- a/gdb/sparc-nat.c
+++ b/gdb/sparc-nat.c
@@ -78,6 +78,19 @@ typedef struct fp_status fpregset_t;
#define PTRACE_SETFPREGS PT_SETFPREGS
#endif
+static int
+gdb_ptrace (int request, ptid_t pid, void *addr)
+{
+#ifdef __NetBSD__
+ /* Support for NetBSD threads: unlike other ptrace implementations in this
+ file, NetBSD requires that we pass both the pid and lwp. */
+ return ptrace (request, ptid (). pid (), addr, ptid ().lwp ());
+#else
+ pid_t pid = get_ptrace_pid (ptid);
+ return ptrace (request, pid, addr, 0);
+#endif
+}
+
/* Register set description. */
const struct sparc_gregmap *sparc_gregmap;
const struct sparc_fpregmap *sparc_fpregmap;
@@ -137,22 +150,7 @@ void
sparc_fetch_inferior_registers (struct regcache *regcache, int regnum)
{
struct gdbarch *gdbarch = regcache->arch ();
- pid_t pid;
-
- /* NOTE: cagney/2002-12-03: This code assumes that the currently
- selected light weight processes' registers can be written
- directly into the selected thread's register cache. This works
- fine when given an 1:1 LWP:thread model (such as found on
- GNU/Linux) but will, likely, have problems when used on an N:1
- (userland threads) or N:M (userland multiple LWP) model. In the
- case of the latter two, the LWP's registers do not necessarily
- belong to the selected thread (the LWP could be in the middle of
- executing the thread switch code).
-
- These functions should instead be parameterized with an explicit
- object (struct regcache, struct thread_info?) into which the LWPs
- registers can be written. */
- pid = get_ptrace_pid (regcache->ptid ());
+ ptid_t ptid = regcache->ptid ();
if (regnum == SPARC_G0_REGNUM)
{
@@ -166,7 +164,7 @@ sparc_fetch_inferior_registers (struct regcache *regcache, int regnum)
{
gregset_t regs;
- if (ptrace (PTRACE_GETREGS, pid, (PTRACE_TYPE_ARG3) ®s, 0) == -1)
+ if (gdb_ptrace (PTRACE_GETREGS, ptid, (PTRACE_TYPE_ARG3) ®s) == -1)
perror_with_name (_("Couldn't get registers"));
sparc_supply_gregset (sparc_gregmap, regcache, -1, ®s);
@@ -178,7 +176,7 @@ sparc_fetch_inferior_registers (struct regcache *regcache, int regnum)
{
fpregset_t fpregs;
- if (ptrace (PTRACE_GETFPREGS, pid, (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
+ if (gdb_ptrace (PTRACE_GETFPREGS, ptid, (PTRACE_TYPE_ARG3) &fpregs) == -1)
perror_with_name (_("Couldn't get floating point status"));
sparc_supply_fpregset (sparc_fpregmap, regcache, -1, &fpregs);
@@ -189,22 +187,18 @@ void
sparc_store_inferior_registers (struct regcache *regcache, int regnum)
{
struct gdbarch *gdbarch = regcache->arch ();
- pid_t pid;
-
- /* NOTE: cagney/2002-12-02: See comment in fetch_inferior_registers
- about threaded assumptions. */
- pid = get_ptrace_pid (regcache->ptid ());
+ ptid_t ptid = regcache->ptid ();
if (regnum == -1 || sparc_gregset_supplies_p (gdbarch, regnum))
{
gregset_t regs;
- if (ptrace (PTRACE_GETREGS, pid, (PTRACE_TYPE_ARG3) ®s, 0) == -1)
+ if (gdb_ptrace (PTRACE_GETREGS, ptid, (PTRACE_TYPE_ARG3) ®s) == -1)
perror_with_name (_("Couldn't get registers"));
sparc_collect_gregset (sparc_gregmap, regcache, regnum, ®s);
- if (ptrace (PTRACE_SETREGS, pid, (PTRACE_TYPE_ARG3) ®s, 0) == -1)
+ if (gdb_ptrace (PTRACE_SETREGS, ptid, (PTRACE_TYPE_ARG3) ®s) == -1)
perror_with_name (_("Couldn't write registers"));
/* Deal with the stack regs. */
@@ -225,7 +219,7 @@ sparc_store_inferior_registers (struct regcache *regcache, int regnum)
{
fpregset_t fpregs, saved_fpregs;
- if (ptrace (PTRACE_GETFPREGS, pid, (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
+ if (gdb_ptrace (PTRACE_GETFPREGS, ptid, (PTRACE_TYPE_ARG3) &fpregs) == -1)
perror_with_name (_("Couldn't get floating-point registers"));
memcpy (&saved_fpregs, &fpregs, sizeof (fpregs));
@@ -237,8 +231,8 @@ sparc_store_inferior_registers (struct regcache *regcache, int regnum)
to write the registers if nothing changed. */
if (memcmp (&saved_fpregs, &fpregs, sizeof (fpregs)) != 0)
{
- if (ptrace (PTRACE_SETFPREGS, pid,
- (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
+ if (gdb_ptrace (PTRACE_SETFPREGS, ptid,
+ (PTRACE_TYPE_ARG3) &fpregs) == -1)
perror_with_name (_("Couldn't write floating-point registers"));
}
--
2.25.0
next prev parent reply other threads:[~2020-03-17 16:46 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-17 9:40 [PATCH] " Kamil Rytarowski
2020-03-17 15:10 ` [PATCH v3] " Kamil Rytarowski
2020-03-17 16:03 ` Simon Marchi
2020-03-17 16:46 ` Kamil Rytarowski [this message]
2020-03-17 16:51 ` [PATCH v4] " Simon Marchi
2020-03-17 16:59 ` Simon Marchi
2020-03-17 17:07 ` Kamil Rytarowski
2020-03-17 17:10 ` Simon Marchi
2020-03-17 18:14 ` Kamil Rytarowski
2020-03-17 18:18 ` [PATCH v5] " Kamil Rytarowski
2020-03-17 19:07 ` Simon Marchi
2020-03-17 19:09 ` Simon Marchi
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