From: Luis Machado <luis.machado@linaro.org>
To: gdb-patches@sourceware.org
Cc: alan.hayward@arm.com, jhb@FreeBSD.org, david.spickett@linaro.org
Subject: [PATCH v2 20/24] Documentation for the new mtag commands
Date: Thu, 22 Oct 2020 17:00:10 -0300 [thread overview]
Message-ID: <20201022200014.5189-21-luis.machado@linaro.org> (raw)
In-Reply-To: <20201022200014.5189-1-luis.machado@linaro.org>
Document the new "mtag" command prefix and all of its subcommands.
gdb/doc/ChangeLog:
YYYY-MM-DD Luis Machado <luis.machado@linaro.org>
* gdb.texinfo (Memory Tagging): New subsection and node.
(AArch64 Memory Tagging Extension): New subsection.
---
gdb/doc/gdb.texinfo | 78 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 78 insertions(+)
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index b778e48dd4..5056a021a5 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -10810,6 +10810,49 @@ target supports computing the CRC checksum of a block of memory
(@pxref{qCRC packet}).
@end table
+@node Memory Tagging
+@subsection Memory Tagging
+
+Memory tagging is a memory protection technology that uses tags to validate
+memory accesses through pointers. The pointer tag must match the memory tag
+for the memory access to be validated.
+
+There are two types of tags: logical and allocation. A logical tag is
+stored in the pointers themselves. A allocation tag is the tag associated
+with the physical address space, against which the logical tags from pointers
+are compared.
+
+If the underlying architecture supports memory tagging, like AArch64 MTE
+or SPARC ADI do, @value{GDBN} can make use of it to validate addresses and
+pointers against memory allocation tags.
+
+A command prefix of @code{mtag} gives access to the various memory tagging
+commands.
+
+The @code{mtag} commands are the following:
+
+@table @code
+@kindex mtag showltag
+@item mtag showltag @var{address_expression}
+Show the logical tag stored at the address given by @var{address_expression}.
+@kindex mtag setltag
+@item mtag setltag @var{address_expression} @var{tag_bytes}
+Print the address given by @var{address_expression}, augmented with a logical
+tag of @var{tag_bytes}.
+@kindex mtag showatag
+@item mtag showatag @var{address_expression}
+Show the allocation tag associated with the memory address given by
+@var{address_expression}.
+@kindex mtag setatag
+@item mtag setatag @var{starting_address} @var{length} @var{tag_bytes}
+Set the allocation tag(s) for memory range @r{[}@var{starting_address},
+@var{starting_address} + @var{length}@r{)} to @var{tag_bytes}.
+@kindex mtag check
+@item mtag check @var{address_expression}
+Check that the logical tag stored at the address given by
+@var{address_expression} matches the allocation tag for the same address.
+@end table
+
@node Auto Display
@section Automatic Display
@cindex automatic display
@@ -24895,6 +24938,41 @@ When GDB prints a backtrace, any addresses that required unmasking will be
postfixed with the marker [PAC]. When using the MI, this is printed as part
of the @code{addr_flags} field.
+@subsubsection AArch64 Memory Tagging Extension.
+@cindex AArch64 Memory Tagging Extension.
+
+When @value{GDBN} is debugging the AArch64 architecture, the program is
+using the v8.5-A feature Memory Tagging Extension (MTE) and there is support
+in the kernel for MTE, @value{GDBN} will make memory tagging functionality
+available for inspection and editing of logical and allocation tags.
+@xref{Memory Tagging}.
+
+To aid debugging, @value{GDBN} will output additional information when SIGSEGV
+signals are generated as a result of memory tag failures.
+
+If the tag violation is synchronous, the following will be shown:
+
+@smallexample
+Program received signal SIGSEGV, Segmentation fault
+Memory tag violation while accessing address 0x0000fffff7ff8000
+Allocation tag 0x0000000000000001.
+@end smallexample
+
+If the tag violation is asynchronous, the fault address is not available.
+In this case @value{GDBN} will show the following:
+
+@smallexample
+Program received signal SIGSEGV, Segmentation fault
+Memory tag violation
+Fault address unavailable.
+@end smallexample
+
+A special register, @code{tag_ctl}, is made available through the
+@code{org.gnu.gdb.aarch64.mte} feature. This register exposes some
+options that can be controlled at runtime and emulates the @code{prctl}
+option @code{PR_SET_TAGGED_ADDR_CTRL}. For further information, see the
+documentation in the Linux kernel.
+
@node i386
@subsection x86 Architecture-specific Issues
--
2.17.1
next prev parent reply other threads:[~2020-10-22 20:01 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-22 19:59 [PATCH v2 00/24] Memory Tagging Support + AArch64 Linux implementation Luis Machado
2020-10-22 19:59 ` [PATCH v2 01/24] New target methods for memory tagging support Luis Machado
2020-10-27 13:22 ` Simon Marchi
2020-10-27 13:43 ` Luis Machado
2020-10-27 13:50 ` Simon Marchi
2020-10-22 19:59 ` [PATCH v2 02/24] New gdbarch memory tagging hooks Luis Machado
2020-10-22 19:59 ` [PATCH v2 03/24] Add GDB-side remote target support for memory tagging Luis Machado
2020-10-29 14:22 ` Alan Hayward
2020-10-29 14:41 ` Luis Machado
2020-10-22 19:59 ` [PATCH v2 04/24] Unit testing for GDB-side remote memory tagging handling Luis Machado
2020-10-22 19:59 ` [PATCH v2 05/24] GDBserver remote packet support for memory tagging Luis Machado
2020-10-22 19:59 ` [PATCH v2 06/24] Unit tests for gdbserver memory tagging remote packets Luis Machado
2020-10-22 19:59 ` [PATCH v2 07/24] Documentation for " Luis Machado
2020-10-23 6:25 ` Eli Zaretskii
2020-10-23 14:07 ` Luis Machado
2020-10-23 14:33 ` Eli Zaretskii
2020-10-23 14:39 ` Luis Machado
2020-10-22 19:59 ` [PATCH v2 08/24] AArch64: Add MTE CPU feature check support Luis Machado
2020-10-22 19:59 ` [PATCH v2 09/24] AArch64: Add target description/feature for MTE registers Luis Machado
2020-10-22 20:00 ` [PATCH v2 10/24] AArch64: Add MTE register set support for GDB and gdbserver Luis Machado
2020-10-22 20:00 ` [PATCH v2 11/24] AArch64: Add MTE ptrace requests Luis Machado
2020-10-22 20:00 ` [PATCH v2 12/24] AArch64: Implement memory tagging target methods for AArch64 Luis Machado
2020-10-29 14:21 ` Alan Hayward
2020-10-29 14:39 ` Luis Machado
2020-10-29 14:45 ` Luis Machado
2020-10-29 17:32 ` Alan Hayward
2020-10-22 20:00 ` [PATCH v2 13/24] Refactor parsing of /proc/<pid>/smaps Luis Machado
2020-10-22 20:00 ` [PATCH v2 14/24] AArch64: Implement the memory tagging gdbarch hooks Luis Machado
2020-10-22 20:00 ` [PATCH v2 15/24] AArch64: Add unit testing for logical tag set/get operations Luis Machado
2020-10-22 20:00 ` [PATCH v2 16/24] AArch64: Report tag violation error information Luis Machado
2020-10-22 20:00 ` [PATCH v2 17/24] AArch64: Add gdbserver MTE support Luis Machado
2020-10-22 20:00 ` [PATCH v2 18/24] AArch64: Add MTE register set support for core files Luis Machado
2020-10-22 20:00 ` [PATCH v2 19/24] New mtag commands Luis Machado
2020-10-22 20:00 ` Luis Machado [this message]
2020-10-23 6:35 ` [PATCH v2 20/24] Documentation for the new " Eli Zaretskii
2020-10-23 14:33 ` Luis Machado
2020-10-23 17:52 ` Eli Zaretskii
2020-10-23 19:04 ` Luis Machado
2020-10-23 19:34 ` Eli Zaretskii
2020-10-26 14:59 ` Luis Machado
2020-10-26 15:35 ` Eli Zaretskii
2020-10-26 16:57 ` Luis Machado
2020-10-22 20:00 ` [PATCH v2 21/24] Extend "x" and "print" commands to support memory tagging Luis Machado
2020-10-22 20:00 ` [PATCH v2 22/24] Document new "x" and "print" memory tagging extensions Luis Machado
2020-10-23 6:37 ` Eli Zaretskii
2020-10-22 20:00 ` [PATCH v2 23/24] Add NEWS entry Luis Machado
2020-10-23 6:38 ` Eli Zaretskii
2020-10-22 20:00 ` [PATCH v2 24/24] Add memory tagging testcases Luis Machado
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